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267 lines
6.7 KiB
C
267 lines
6.7 KiB
C
/*
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2002 Shane Nay (shane@minirl.com)
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* Copyright 2005-2007 Freescale Semiconductor, Inc. All Rights Reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/clk.h>
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#include <linux/serial_8250.h>
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#include <linux/irq.h>
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#include <mach/hardware.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/time.h>
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#include <asm/memory.h>
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#include <asm/mach/map.h>
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#include <mach/common.h>
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#include <mach/board-mx31ads.h>
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#include <mach/imx-uart.h>
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#include <mach/iomux-mx3.h>
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/*!
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* @file mx31ads.c
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*
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* @brief This file contains the board-specific initialization routines.
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*
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* @ingroup System
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*/
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#if defined(CONFIG_SERIAL_8250) || defined(CONFIG_SERIAL_8250_MODULE)
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/*!
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* The serial port definition structure.
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*/
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTA),
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.mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTA),
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.irq = EXPIO_INT_XUART_INTA,
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.uartclk = 14745600,
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.regshift = 0,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
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}, {
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.membase = (void *)(PBC_BASE_ADDRESS + PBC_SC16C652_UARTB),
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.mapbase = (unsigned long)(CS4_BASE_ADDR + PBC_SC16C652_UARTB),
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.irq = EXPIO_INT_XUART_INTB,
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.uartclk = 14745600,
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.regshift = 0,
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.iotype = UPIO_MEM,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_AUTO_IRQ,
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},
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{},
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = 0,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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static int __init mxc_init_extuart(void)
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{
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return platform_device_register(&serial_device);
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}
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#else
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static inline int mxc_init_extuart(void)
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{
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return 0;
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}
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#endif
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#if defined(CONFIG_SERIAL_IMX) || defined(CONFIG_SERIAL_IMX_MODULE)
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static struct imxuart_platform_data uart_pdata = {
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.flags = IMXUART_HAVE_RTSCTS,
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};
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static inline void mxc_init_imx_uart(void)
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{
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mxc_iomux_mode(MX31_PIN_CTS1__CTS1);
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mxc_iomux_mode(MX31_PIN_RTS1__RTS1);
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mxc_iomux_mode(MX31_PIN_TXD1__TXD1);
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mxc_iomux_mode(MX31_PIN_RXD1__RXD1);
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mxc_register_device(&mxc_uart_device0, &uart_pdata);
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}
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#else /* !SERIAL_IMX */
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static inline void mxc_init_imx_uart(void)
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{
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}
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#endif /* !SERIAL_IMX */
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static void mx31ads_expio_irq_handler(u32 irq, struct irq_desc *desc)
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{
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u32 imr_val;
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u32 int_valid;
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u32 expio_irq;
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imr_val = __raw_readw(PBC_INTMASK_SET_REG);
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int_valid = __raw_readw(PBC_INTSTATUS_REG) & imr_val;
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expio_irq = MXC_EXP_IO_BASE;
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for (; int_valid != 0; int_valid >>= 1, expio_irq++) {
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if ((int_valid & 1) == 0)
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continue;
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generic_handle_irq(expio_irq);
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}
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}
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/*
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* Disable an expio pin's interrupt by setting the bit in the imr.
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* @param irq an expio virtual irq number
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*/
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static void expio_mask_irq(u32 irq)
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{
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u32 expio = MXC_IRQ_TO_EXPIO(irq);
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/* mask the interrupt */
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__raw_writew(1 << expio, PBC_INTMASK_CLEAR_REG);
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__raw_readw(PBC_INTMASK_CLEAR_REG);
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}
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/*
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* Acknowledge an expanded io pin's interrupt by clearing the bit in the isr.
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* @param irq an expanded io virtual irq number
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*/
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static void expio_ack_irq(u32 irq)
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{
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u32 expio = MXC_IRQ_TO_EXPIO(irq);
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/* clear the interrupt status */
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__raw_writew(1 << expio, PBC_INTSTATUS_REG);
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}
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/*
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* Enable a expio pin's interrupt by clearing the bit in the imr.
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* @param irq a expio virtual irq number
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*/
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static void expio_unmask_irq(u32 irq)
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{
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u32 expio = MXC_IRQ_TO_EXPIO(irq);
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/* unmask the interrupt */
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__raw_writew(1 << expio, PBC_INTMASK_SET_REG);
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}
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static struct irq_chip expio_irq_chip = {
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.ack = expio_ack_irq,
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.mask = expio_mask_irq,
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.unmask = expio_unmask_irq,
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};
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static void __init mx31ads_init_expio(void)
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{
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int i;
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printk(KERN_INFO "MX31ADS EXPIO(CPLD) hardware\n");
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/*
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* Configure INT line as GPIO input
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*/
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mxc_iomux_mode(IOMUX_MODE(MX31_PIN_GPIO1_4, IOMUX_CONFIG_GPIO));
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/* disable the interrupt and clear the status */
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__raw_writew(0xFFFF, PBC_INTMASK_CLEAR_REG);
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__raw_writew(0xFFFF, PBC_INTSTATUS_REG);
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for (i = MXC_EXP_IO_BASE; i < (MXC_EXP_IO_BASE + MXC_MAX_EXP_IO_LINES);
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i++) {
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set_irq_chip(i, &expio_irq_chip);
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set_irq_handler(i, handle_level_irq);
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set_irq_flags(i, IRQF_VALID);
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}
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set_irq_type(EXPIO_PARENT_INT, IRQ_TYPE_LEVEL_HIGH);
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set_irq_chained_handler(EXPIO_PARENT_INT, mx31ads_expio_irq_handler);
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}
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/*!
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* This structure defines static mappings for the i.MX31ADS board.
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*/
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static struct map_desc mx31ads_io_desc[] __initdata = {
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{
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.virtual = AIPS1_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(AIPS1_BASE_ADDR),
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.length = AIPS1_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = SPBA0_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(SPBA0_BASE_ADDR),
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.length = SPBA0_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = AIPS2_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(AIPS2_BASE_ADDR),
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.length = AIPS2_SIZE,
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.type = MT_DEVICE_NONSHARED
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}, {
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.virtual = CS4_BASE_ADDR_VIRT,
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.pfn = __phys_to_pfn(CS4_BASE_ADDR),
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.length = CS4_SIZE / 2,
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.type = MT_DEVICE
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},
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};
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/*!
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* Set up static virtual mappings.
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*/
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void __init mx31ads_map_io(void)
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{
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mxc_map_io();
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iotable_init(mx31ads_io_desc, ARRAY_SIZE(mx31ads_io_desc));
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}
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void __init mx31ads_init_irq(void)
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{
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mxc_init_irq();
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mx31ads_init_expio();
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}
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/*!
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* Board specific initialization.
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*/
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static void __init mxc_board_init(void)
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{
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mxc_init_extuart();
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mxc_init_imx_uart();
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}
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static void __init mx31ads_timer_init(void)
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{
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mxc_clocks_init(26000000);
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mxc_timer_init("ipg_clk.0");
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}
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struct sys_timer mx31ads_timer = {
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.init = mx31ads_timer_init,
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};
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/*
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* The following uses standard kernel macros defined in arch.h in order to
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* initialize __mach_desc_MX31ADS data structure.
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*/
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MACHINE_START(MX31ADS, "Freescale MX31ADS")
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/* Maintainer: Freescale Semiconductor, Inc. */
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.phys_io = AIPS1_BASE_ADDR,
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.io_pg_offst = ((AIPS1_BASE_ADDR_VIRT) >> 18) & 0xfffc,
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.boot_params = PHYS_OFFSET + 0x100,
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.map_io = mx31ads_map_io,
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.init_irq = mx31ads_init_irq,
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.init_machine = mxc_board_init,
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.timer = &mx31ads_timer,
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MACHINE_END
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