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If the driver needs to change a clock rate, then it must be propogated through the MSTP clock to the parent clock (such as shdi0 -> sd0). Without this we cannot up-rate default clocks which are really slow (such as the mmcif1 which defaults to 12MHz where it could be running at 97MHz) Signed-off-by: Ben Dooks <ben.dooks@codethink.co.uk> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Mike Turquette <mturquette@linaro.org> |
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clk-div6.c | ||
clk-emev2.c | ||
clk-mstp.c | ||
clk-rcar-gen2.c | ||
clk-rz.c | ||
Makefile |