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a7fbfd44c0
power_supply_is_system_supplied() checks whether any power supplies are present that aren't batteries to decide whether the system is running on DC or AC. Downstream drivers use this to make performance decisions. Navi dGPUs include an UCSI function that has been exported since commit17631e8ca2("i2c: designware: Add driver support for AMD NAVI GPU"). This UCSI function registers a power supply since commit992a60ed0d("usb: typec: ucsi: register with power_supply class") but this is not a system power supply. As the power supply for a dGPU is only for powering devices connected to dGPU, create a device property to indicate that the UCSI endpoint is only for the scope of `POWER_SUPPLY_SCOPE_DEVICE`. Link: https://lore.kernel.org/lkml/20230516182541.5836-2-mario.limonciello@amd.com/ Reviewed-by: Evan Quan <evan.quan@amd.com> Tested-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Reviewed-by: Sebastian Reichel <sebastian.reichel@collabora.com> Acked-by: Andi Shyti <andi.shyti@kernel.org> Signed-off-by: Wolfram Sang <wsa@kernel.org>
432 lines
10 KiB
C
432 lines
10 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Synopsys DesignWare I2C adapter driver (master only).
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*
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* Based on the TI DAVINCI I2C adapter driver.
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*
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* Copyright (C) 2006 Texas Instruments.
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* Copyright (C) 2007 MontaVista Software Inc.
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* Copyright (C) 2009 Provigent Ltd.
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* Copyright (C) 2011, 2015, 2016 Intel Corporation.
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*/
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#include <linux/acpi.h>
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#include <linux/delay.h>
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#include <linux/err.h>
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#include <linux/errno.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/pm_runtime.h>
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#include <linux/power_supply.h>
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#include <linux/sched.h>
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#include <linux/slab.h>
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#include "i2c-designware-core.h"
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#include "i2c-ccgx-ucsi.h"
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#define DRIVER_NAME "i2c-designware-pci"
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enum dw_pci_ctl_id_t {
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medfield,
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merrifield,
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baytrail,
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cherrytrail,
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haswell,
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elkhartlake,
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navi_amd,
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};
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/*
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* This is a legacy structure to describe the hardware counters
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* to configure signal timings on the bus. For Device Tree platforms
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* one should use the respective properties and for ACPI there is
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* a set of ACPI methods that provide these counters. No new
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* platform should use this structure.
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*/
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struct dw_scl_sda_cfg {
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u16 ss_hcnt;
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u16 fs_hcnt;
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u16 ss_lcnt;
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u16 fs_lcnt;
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u32 sda_hold;
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};
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struct dw_pci_controller {
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u32 bus_num;
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u32 flags;
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struct dw_scl_sda_cfg *scl_sda_cfg;
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int (*setup)(struct pci_dev *pdev, struct dw_pci_controller *c);
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u32 (*get_clk_rate_khz)(struct dw_i2c_dev *dev);
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};
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/* Merrifield HCNT/LCNT/SDA hold time */
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static struct dw_scl_sda_cfg mrfld_config = {
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.ss_hcnt = 0x2f8,
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.fs_hcnt = 0x87,
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.ss_lcnt = 0x37b,
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.fs_lcnt = 0x10a,
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};
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/* BayTrail HCNT/LCNT/SDA hold time */
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static struct dw_scl_sda_cfg byt_config = {
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.ss_hcnt = 0x200,
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.fs_hcnt = 0x55,
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.ss_lcnt = 0x200,
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.fs_lcnt = 0x99,
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.sda_hold = 0x6,
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};
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/* Haswell HCNT/LCNT/SDA hold time */
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static struct dw_scl_sda_cfg hsw_config = {
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.ss_hcnt = 0x01b0,
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.fs_hcnt = 0x48,
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.ss_lcnt = 0x01fb,
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.fs_lcnt = 0xa0,
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.sda_hold = 0x9,
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};
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/* NAVI-AMD HCNT/LCNT/SDA hold time */
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static struct dw_scl_sda_cfg navi_amd_config = {
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.ss_hcnt = 0x1ae,
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.ss_lcnt = 0x23a,
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.sda_hold = 0x9,
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};
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static u32 mfld_get_clk_rate_khz(struct dw_i2c_dev *dev)
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{
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return 25000;
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}
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static int mfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
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{
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struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
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switch (pdev->device) {
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case 0x0817:
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dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
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fallthrough;
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case 0x0818:
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case 0x0819:
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c->bus_num = pdev->device - 0x817 + 3;
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return 0;
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case 0x082C:
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case 0x082D:
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case 0x082E:
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c->bus_num = pdev->device - 0x82C + 0;
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return 0;
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}
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return -ENODEV;
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}
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static int mrfld_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
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{
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/*
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* On Intel Merrifield the user visible i2c buses are enumerated
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* [1..7]. So, we add 1 to shift the default range. Besides that the
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* first PCI slot provides 4 functions, that's why we have to add 0 to
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* the first slot and 4 to the next one.
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*/
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switch (PCI_SLOT(pdev->devfn)) {
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case 8:
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c->bus_num = PCI_FUNC(pdev->devfn) + 0 + 1;
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return 0;
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case 9:
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c->bus_num = PCI_FUNC(pdev->devfn) + 4 + 1;
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return 0;
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}
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return -ENODEV;
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}
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static u32 ehl_get_clk_rate_khz(struct dw_i2c_dev *dev)
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{
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return 100000;
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}
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static u32 navi_amd_get_clk_rate_khz(struct dw_i2c_dev *dev)
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{
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return 100000;
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}
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static int navi_amd_setup(struct pci_dev *pdev, struct dw_pci_controller *c)
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{
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struct dw_i2c_dev *dev = dev_get_drvdata(&pdev->dev);
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dev->flags |= MODEL_AMD_NAVI_GPU;
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dev->timings.bus_freq_hz = I2C_MAX_STANDARD_MODE_FREQ;
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return 0;
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}
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static struct dw_pci_controller dw_pci_controllers[] = {
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[medfield] = {
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.bus_num = -1,
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.setup = mfld_setup,
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.get_clk_rate_khz = mfld_get_clk_rate_khz,
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},
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[merrifield] = {
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.bus_num = -1,
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.scl_sda_cfg = &mrfld_config,
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.setup = mrfld_setup,
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},
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[baytrail] = {
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.bus_num = -1,
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.scl_sda_cfg = &byt_config,
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},
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[haswell] = {
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.bus_num = -1,
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.scl_sda_cfg = &hsw_config,
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},
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[cherrytrail] = {
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.bus_num = -1,
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.scl_sda_cfg = &byt_config,
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},
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[elkhartlake] = {
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.bus_num = -1,
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.get_clk_rate_khz = ehl_get_clk_rate_khz,
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},
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[navi_amd] = {
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.bus_num = -1,
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.scl_sda_cfg = &navi_amd_config,
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.setup = navi_amd_setup,
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.get_clk_rate_khz = navi_amd_get_clk_rate_khz,
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},
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};
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static int __maybe_unused i2c_dw_pci_runtime_suspend(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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i_dev->disable(i_dev);
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return 0;
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}
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static int __maybe_unused i2c_dw_pci_suspend(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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i2c_mark_adapter_suspended(&i_dev->adapter);
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return i2c_dw_pci_runtime_suspend(dev);
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}
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static int __maybe_unused i2c_dw_pci_runtime_resume(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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return i_dev->init(i_dev);
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}
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static int __maybe_unused i2c_dw_pci_resume(struct device *dev)
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{
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struct dw_i2c_dev *i_dev = dev_get_drvdata(dev);
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int ret;
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ret = i2c_dw_pci_runtime_resume(dev);
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i2c_mark_adapter_resumed(&i_dev->adapter);
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return ret;
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}
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static const struct dev_pm_ops i2c_dw_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(i2c_dw_pci_suspend, i2c_dw_pci_resume)
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SET_RUNTIME_PM_OPS(i2c_dw_pci_runtime_suspend, i2c_dw_pci_runtime_resume, NULL)
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};
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static const struct property_entry dgpu_properties[] = {
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/* USB-C doesn't power the system */
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PROPERTY_ENTRY_U8("scope", POWER_SUPPLY_SCOPE_DEVICE),
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{}
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};
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static const struct software_node dgpu_node = {
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.properties = dgpu_properties,
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};
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static int i2c_dw_pci_probe(struct pci_dev *pdev,
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const struct pci_device_id *id)
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{
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struct dw_i2c_dev *dev;
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struct i2c_adapter *adap;
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int r;
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struct dw_pci_controller *controller;
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struct dw_scl_sda_cfg *cfg;
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struct i2c_timings *t;
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if (id->driver_data >= ARRAY_SIZE(dw_pci_controllers))
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return dev_err_probe(&pdev->dev, -EINVAL,
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"Invalid driver data %ld\n",
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id->driver_data);
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controller = &dw_pci_controllers[id->driver_data];
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r = pcim_enable_device(pdev);
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if (r)
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return dev_err_probe(&pdev->dev, r,
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"Failed to enable I2C PCI device\n");
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pci_set_master(pdev);
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r = pcim_iomap_regions(pdev, 1 << 0, pci_name(pdev));
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if (r)
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return dev_err_probe(&pdev->dev, r,
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"I/O memory remapping failed\n");
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dev = devm_kzalloc(&pdev->dev, sizeof(*dev), GFP_KERNEL);
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if (!dev)
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return -ENOMEM;
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r = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
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if (r < 0)
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return r;
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dev->get_clk_rate_khz = controller->get_clk_rate_khz;
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dev->base = pcim_iomap_table(pdev)[0];
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dev->dev = &pdev->dev;
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dev->irq = pci_irq_vector(pdev, 0);
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dev->flags |= controller->flags;
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t = &dev->timings;
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i2c_parse_fw_timings(&pdev->dev, t, false);
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pci_set_drvdata(pdev, dev);
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if (controller->setup) {
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r = controller->setup(pdev, controller);
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if (r) {
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pci_free_irq_vectors(pdev);
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return r;
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}
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}
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i2c_dw_adjust_bus_speed(dev);
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if (has_acpi_companion(&pdev->dev))
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i2c_dw_acpi_configure(&pdev->dev);
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r = i2c_dw_validate_speed(dev);
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if (r) {
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pci_free_irq_vectors(pdev);
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return r;
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}
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i2c_dw_configure(dev);
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if (controller->scl_sda_cfg) {
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cfg = controller->scl_sda_cfg;
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dev->ss_hcnt = cfg->ss_hcnt;
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dev->fs_hcnt = cfg->fs_hcnt;
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dev->ss_lcnt = cfg->ss_lcnt;
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dev->fs_lcnt = cfg->fs_lcnt;
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dev->sda_hold_time = cfg->sda_hold;
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}
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adap = &dev->adapter;
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adap->owner = THIS_MODULE;
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adap->class = 0;
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ACPI_COMPANION_SET(&adap->dev, ACPI_COMPANION(&pdev->dev));
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adap->nr = controller->bus_num;
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r = i2c_dw_probe(dev);
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if (r) {
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pci_free_irq_vectors(pdev);
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return r;
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}
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if ((dev->flags & MODEL_MASK) == MODEL_AMD_NAVI_GPU) {
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dev->slave = i2c_new_ccgx_ucsi(&dev->adapter, dev->irq, &dgpu_node);
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if (IS_ERR(dev->slave))
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return dev_err_probe(dev->dev, PTR_ERR(dev->slave),
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"register UCSI failed\n");
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}
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pm_runtime_set_autosuspend_delay(&pdev->dev, 1000);
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pm_runtime_use_autosuspend(&pdev->dev);
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pm_runtime_put_autosuspend(&pdev->dev);
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pm_runtime_allow(&pdev->dev);
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return 0;
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}
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static void i2c_dw_pci_remove(struct pci_dev *pdev)
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{
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struct dw_i2c_dev *dev = pci_get_drvdata(pdev);
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dev->disable(dev);
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pm_runtime_forbid(&pdev->dev);
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pm_runtime_get_noresume(&pdev->dev);
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i2c_del_adapter(&dev->adapter);
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devm_free_irq(&pdev->dev, dev->irq, dev);
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pci_free_irq_vectors(pdev);
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}
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static const struct pci_device_id i2_designware_pci_ids[] = {
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/* Medfield */
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{ PCI_VDEVICE(INTEL, 0x0817), medfield },
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{ PCI_VDEVICE(INTEL, 0x0818), medfield },
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{ PCI_VDEVICE(INTEL, 0x0819), medfield },
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{ PCI_VDEVICE(INTEL, 0x082C), medfield },
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{ PCI_VDEVICE(INTEL, 0x082D), medfield },
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{ PCI_VDEVICE(INTEL, 0x082E), medfield },
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/* Merrifield */
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{ PCI_VDEVICE(INTEL, 0x1195), merrifield },
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{ PCI_VDEVICE(INTEL, 0x1196), merrifield },
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/* Baytrail */
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{ PCI_VDEVICE(INTEL, 0x0F41), baytrail },
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{ PCI_VDEVICE(INTEL, 0x0F42), baytrail },
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{ PCI_VDEVICE(INTEL, 0x0F43), baytrail },
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{ PCI_VDEVICE(INTEL, 0x0F44), baytrail },
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{ PCI_VDEVICE(INTEL, 0x0F45), baytrail },
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{ PCI_VDEVICE(INTEL, 0x0F46), baytrail },
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{ PCI_VDEVICE(INTEL, 0x0F47), baytrail },
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/* Haswell */
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{ PCI_VDEVICE(INTEL, 0x9c61), haswell },
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{ PCI_VDEVICE(INTEL, 0x9c62), haswell },
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/* Braswell / Cherrytrail */
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{ PCI_VDEVICE(INTEL, 0x22C1), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C2), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C3), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C4), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C5), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C6), cherrytrail },
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{ PCI_VDEVICE(INTEL, 0x22C7), cherrytrail },
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/* Elkhart Lake (PSE I2C) */
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{ PCI_VDEVICE(INTEL, 0x4bb9), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bba), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bbb), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bbc), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bbd), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bbe), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bbf), elkhartlake },
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{ PCI_VDEVICE(INTEL, 0x4bc0), elkhartlake },
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/* AMD NAVI */
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{ PCI_VDEVICE(ATI, 0x7314), navi_amd },
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{ PCI_VDEVICE(ATI, 0x73a4), navi_amd },
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{ PCI_VDEVICE(ATI, 0x73e4), navi_amd },
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{ PCI_VDEVICE(ATI, 0x73c4), navi_amd },
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{ PCI_VDEVICE(ATI, 0x7444), navi_amd },
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{ PCI_VDEVICE(ATI, 0x7464), navi_amd },
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{ 0,}
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};
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MODULE_DEVICE_TABLE(pci, i2_designware_pci_ids);
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static struct pci_driver dw_i2c_driver = {
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.name = DRIVER_NAME,
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.id_table = i2_designware_pci_ids,
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.probe = i2c_dw_pci_probe,
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.remove = i2c_dw_pci_remove,
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.driver = {
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.pm = &i2c_dw_pm_ops,
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},
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};
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module_pci_driver(dw_i2c_driver);
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/* Work with hotplug and coldplug */
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MODULE_ALIAS("i2c_designware-pci");
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MODULE_AUTHOR("Baruch Siach <baruch@tkos.co.il>");
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MODULE_DESCRIPTION("Synopsys DesignWare PCI I2C bus adapter");
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MODULE_LICENSE("GPL");
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