mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-02 16:44:10 +08:00
b85a3ef4ac
The 1st board support is minimal to get a system up and running on the Xilinx platform. This platform reuses the clock implementation from plat-versatile, and it depends entirely on CONFIG_OF support. There is only one board support file which obtains all device information from a device tree dtb file which is passed to the kernel at boot time. Signed-off-by: John Linn <john.linn@xilinx.com>
26 lines
881 B
C
26 lines
881 B
C
/* arch/arm/mach-zynq/include/mach/uart.h
|
|
*
|
|
* Copyright (C) 2011 Xilinx
|
|
*
|
|
* This software is licensed under the terms of the GNU General Public
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
* may be copied, distributed, and modified under those terms.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
|
|
#ifndef __MACH_UART_H__
|
|
#define __MACH_UART_H__
|
|
|
|
#define UART_CR_OFFSET 0x00 /* Control Register [8:0] */
|
|
#define UART_SR_OFFSET 0x2C /* Channel Status [11:0] */
|
|
#define UART_FIFO_OFFSET 0x30 /* FIFO [15:0] or [7:0] */
|
|
|
|
#define UART_SR_TXFULL 0x00000010 /* TX FIFO full */
|
|
#define UART_SR_TXEMPTY 0x00000008 /* TX FIFO empty */
|
|
|
|
#endif
|