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In case of PREEMPT_RT, there is a raw_spinlock -> spinlock dependency as the lockdep report shows. __irq_set_handler irq_get_desc_buslock __irq_get_desc_lock raw_spin_lock_irqsave(&desc->lock, *flags); // raw spinlock get here __irq_do_set_handler mask_ack_irq dwapb_irq_ack spin_lock_irqsave(&gc->bgpio_lock, flags); // sleep able spinlock irq_put_desc_busunlock Replace with a raw lock to avoid BUGs. This lock is only used to access registers, and It's safe to replace with the raw lock without bad influence. [ 15.090359][ T1] ============================= [ 15.090365][ T1] [ BUG: Invalid wait context ] [ 15.090373][ T1] 5.10.59-rt52-00983-g186a6841c682-dirty #3 Not tainted [ 15.090386][ T1] ----------------------------- [ 15.090392][ T1] swapper/0/1 is trying to lock: [ 15.090402][ T1] 70ff00018507c188 (&gc->bgpio_lock){....}-{3:3}, at: _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090470][ T1] other info that might help us debug this: [ 15.090477][ T1] context-{5:5} [ 15.090485][ T1] 3 locks held by swapper/0/1: [ 15.090497][ T1] #0: c2ff0001816de1a0 (&dev->mutex){....}-{4:4}, at: __device_driver_lock+0x98/0x104 [ 15.090553][ T1] #1: ffff90001485b4b8 (irq_domain_mutex){+.+.}-{4:4}, at: irq_domain_associate+0xbc/0x6d4 [ 15.090606][ T1] #2: 4bff000185d7a8e0 (lock_class){....}-{2:2}, at: _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090654][ T1] stack backtrace: [ 15.090661][ T1] CPU: 4 PID: 1 Comm: swapper/0 Not tainted 5.10.59-rt52-00983-g186a6841c682-dirty #3 [ 15.090682][ T1] Hardware name: Horizon Robotics Journey 5 DVB (DT) [ 15.090692][ T1] Call trace: ...... [ 15.090811][ T1] _raw_spin_lock_irqsave+0x1c/0x28 [ 15.090828][ T1] dwapb_irq_ack+0xb4/0x300 [ 15.090846][ T1] __irq_do_set_handler+0x494/0xb2c [ 15.090864][ T1] __irq_set_handler+0x74/0x114 [ 15.090881][ T1] irq_set_chip_and_handler_name+0x44/0x58 [ 15.090900][ T1] gpiochip_irq_map+0x210/0x644 Signed-off-by: Schspa Shi <schspa@gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Doug Berger <opendmb@gmail.com> Acked-by: Serge Semin <fancer.lancer@gmail.com> Signed-off-by: Bartosz Golaszewski <brgl@bgdev.pl>
215 lines
5.0 KiB
C
215 lines
5.0 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* MEN 16Z127 GPIO driver
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*
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* Copyright (C) 2016 MEN Mikroelektronik GmbH (www.men.de)
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/io.h>
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#include <linux/err.h>
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#include <linux/mcb.h>
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#include <linux/bitops.h>
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#include <linux/gpio/driver.h>
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#define MEN_Z127_CTRL 0x00
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#define MEN_Z127_PSR 0x04
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#define MEN_Z127_IRQR 0x08
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#define MEN_Z127_GPIODR 0x0c
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#define MEN_Z127_IER1 0x10
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#define MEN_Z127_IER2 0x14
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#define MEN_Z127_DBER 0x18
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#define MEN_Z127_ODER 0x1C
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#define GPIO_TO_DBCNT_REG(gpio) ((gpio * 4) + 0x80)
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#define MEN_Z127_DB_MIN_US 50
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/* 16 bit compare register. Each bit represents 50us */
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#define MEN_Z127_DB_MAX_US (0xffff * MEN_Z127_DB_MIN_US)
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#define MEN_Z127_DB_IN_RANGE(db) ((db >= MEN_Z127_DB_MIN_US) && \
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(db <= MEN_Z127_DB_MAX_US))
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struct men_z127_gpio {
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struct gpio_chip gc;
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void __iomem *reg_base;
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struct resource *mem;
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};
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static int men_z127_debounce(struct gpio_chip *gc, unsigned gpio,
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unsigned debounce)
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{
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struct men_z127_gpio *priv = gpiochip_get_data(gc);
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struct device *dev = gc->parent;
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unsigned int rnd;
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u32 db_en, db_cnt;
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if (!MEN_Z127_DB_IN_RANGE(debounce)) {
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dev_err(dev, "debounce value %u out of range", debounce);
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return -EINVAL;
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}
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if (debounce > 0) {
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/* round up or down depending on MSB-1 */
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rnd = fls(debounce) - 1;
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if (rnd && (debounce & BIT(rnd - 1)))
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debounce = roundup(debounce, MEN_Z127_DB_MIN_US);
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else
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debounce = rounddown(debounce, MEN_Z127_DB_MIN_US);
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if (debounce > MEN_Z127_DB_MAX_US)
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debounce = MEN_Z127_DB_MAX_US;
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/* 50us per register unit */
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debounce /= 50;
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}
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raw_spin_lock(&gc->bgpio_lock);
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db_en = readl(priv->reg_base + MEN_Z127_DBER);
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if (debounce == 0) {
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db_en &= ~BIT(gpio);
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db_cnt = 0;
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} else {
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db_en |= BIT(gpio);
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db_cnt = debounce;
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}
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writel(db_en, priv->reg_base + MEN_Z127_DBER);
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writel(db_cnt, priv->reg_base + GPIO_TO_DBCNT_REG(gpio));
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raw_spin_unlock(&gc->bgpio_lock);
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return 0;
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}
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static int men_z127_set_single_ended(struct gpio_chip *gc,
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unsigned offset,
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enum pin_config_param param)
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{
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struct men_z127_gpio *priv = gpiochip_get_data(gc);
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u32 od_en;
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raw_spin_lock(&gc->bgpio_lock);
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od_en = readl(priv->reg_base + MEN_Z127_ODER);
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if (param == PIN_CONFIG_DRIVE_OPEN_DRAIN)
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od_en |= BIT(offset);
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else
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/* Implicitly PIN_CONFIG_DRIVE_PUSH_PULL */
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od_en &= ~BIT(offset);
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writel(od_en, priv->reg_base + MEN_Z127_ODER);
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raw_spin_unlock(&gc->bgpio_lock);
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return 0;
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}
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static int men_z127_set_config(struct gpio_chip *gc, unsigned offset,
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unsigned long config)
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{
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enum pin_config_param param = pinconf_to_config_param(config);
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switch (param) {
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case PIN_CONFIG_DRIVE_OPEN_DRAIN:
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case PIN_CONFIG_DRIVE_PUSH_PULL:
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return men_z127_set_single_ended(gc, offset, param);
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case PIN_CONFIG_INPUT_DEBOUNCE:
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return men_z127_debounce(gc, offset,
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pinconf_to_config_argument(config));
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default:
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break;
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}
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return -ENOTSUPP;
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}
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static int men_z127_probe(struct mcb_device *mdev,
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const struct mcb_device_id *id)
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{
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struct men_z127_gpio *men_z127_gpio;
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struct device *dev = &mdev->dev;
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int ret;
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men_z127_gpio = devm_kzalloc(dev, sizeof(struct men_z127_gpio),
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GFP_KERNEL);
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if (!men_z127_gpio)
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return -ENOMEM;
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men_z127_gpio->mem = mcb_request_mem(mdev, dev_name(dev));
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if (IS_ERR(men_z127_gpio->mem)) {
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dev_err(dev, "failed to request device memory");
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return PTR_ERR(men_z127_gpio->mem);
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}
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men_z127_gpio->reg_base = ioremap(men_z127_gpio->mem->start,
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resource_size(men_z127_gpio->mem));
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if (men_z127_gpio->reg_base == NULL) {
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ret = -ENXIO;
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goto err_release;
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}
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mcb_set_drvdata(mdev, men_z127_gpio);
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ret = bgpio_init(&men_z127_gpio->gc, &mdev->dev, 4,
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men_z127_gpio->reg_base + MEN_Z127_PSR,
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men_z127_gpio->reg_base + MEN_Z127_CTRL,
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NULL,
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men_z127_gpio->reg_base + MEN_Z127_GPIODR,
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NULL, 0);
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if (ret)
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goto err_unmap;
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men_z127_gpio->gc.set_config = men_z127_set_config;
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ret = gpiochip_add_data(&men_z127_gpio->gc, men_z127_gpio);
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if (ret) {
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dev_err(dev, "failed to register MEN 16Z127 GPIO controller");
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goto err_unmap;
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}
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dev_info(dev, "MEN 16Z127 GPIO driver registered");
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return 0;
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err_unmap:
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iounmap(men_z127_gpio->reg_base);
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err_release:
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mcb_release_mem(men_z127_gpio->mem);
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return ret;
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}
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static void men_z127_remove(struct mcb_device *mdev)
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{
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struct men_z127_gpio *men_z127_gpio = mcb_get_drvdata(mdev);
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gpiochip_remove(&men_z127_gpio->gc);
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iounmap(men_z127_gpio->reg_base);
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mcb_release_mem(men_z127_gpio->mem);
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}
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static const struct mcb_device_id men_z127_ids[] = {
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{ .device = 0x7f },
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{ }
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};
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MODULE_DEVICE_TABLE(mcb, men_z127_ids);
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static struct mcb_driver men_z127_driver = {
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.driver = {
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.name = "z127-gpio",
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},
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.probe = men_z127_probe,
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.remove = men_z127_remove,
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.id_table = men_z127_ids,
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};
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module_mcb_driver(men_z127_driver);
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MODULE_AUTHOR("Andreas Werner <andreas.werner@men.de>");
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MODULE_DESCRIPTION("MEN 16z127 GPIO Controller");
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MODULE_LICENSE("GPL v2");
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MODULE_ALIAS("mcb:16z127");
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MODULE_IMPORT_NS(MCB);
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