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168983a8e1
Currently we compare the value we are about to write to the Rx tail register with the previous value of next_to_use. The problem with this is we only write tail on 8 descriptor boundaries, but next_to_use is updated whenever we clean Rx descriptors. Fix this by comparing the value we are about to write to tail with the previously written tail value. This will prevent duplicate Rx tail bumps. Signed-off-by: Brett Creeley <brett.creeley@intel.com> Tested-by: Andrew Bowers <andrewx.bowers@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
274 lines
7.3 KiB
C
274 lines
7.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/* Copyright (c) 2019, Intel Corporation. */
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#include "ice_txrx_lib.h"
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/**
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* ice_release_rx_desc - Store the new tail and head values
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* @rx_ring: ring to bump
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* @val: new head index
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*/
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void ice_release_rx_desc(struct ice_ring *rx_ring, u32 val)
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{
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u16 prev_ntu = rx_ring->next_to_use & ~0x7;
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rx_ring->next_to_use = val;
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/* update next to alloc since we have filled the ring */
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rx_ring->next_to_alloc = val;
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/* QRX_TAIL will be updated with any tail value, but hardware ignores
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* the lower 3 bits. This makes it so we only bump tail on meaningful
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* boundaries. Also, this allows us to bump tail on intervals of 8 up to
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* the budget depending on the current traffic load.
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*/
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val &= ~0x7;
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if (prev_ntu != val) {
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/* Force memory writes to complete before letting h/w
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* know there are new descriptors to fetch. (Only
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* applicable for weak-ordered memory model archs,
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* such as IA-64).
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*/
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wmb();
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writel(val, rx_ring->tail);
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}
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}
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/**
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* ice_ptype_to_htype - get a hash type
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* @ptype: the ptype value from the descriptor
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*
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* Returns a hash type to be used by skb_set_hash
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*/
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static enum pkt_hash_types ice_ptype_to_htype(u8 __always_unused ptype)
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{
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return PKT_HASH_TYPE_NONE;
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}
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/**
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* ice_rx_hash - set the hash value in the skb
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* @rx_ring: descriptor ring
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* @rx_desc: specific descriptor
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* @skb: pointer to current skb
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* @rx_ptype: the ptype value from the descriptor
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*/
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static void
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ice_rx_hash(struct ice_ring *rx_ring, union ice_32b_rx_flex_desc *rx_desc,
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struct sk_buff *skb, u8 rx_ptype)
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{
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struct ice_32b_rx_flex_desc_nic *nic_mdid;
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u32 hash;
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if (!(rx_ring->netdev->features & NETIF_F_RXHASH))
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return;
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if (rx_desc->wb.rxdid != ICE_RXDID_FLEX_NIC)
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return;
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nic_mdid = (struct ice_32b_rx_flex_desc_nic *)rx_desc;
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hash = le32_to_cpu(nic_mdid->rss_hash);
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skb_set_hash(skb, hash, ice_ptype_to_htype(rx_ptype));
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}
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/**
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* ice_rx_csum - Indicate in skb if checksum is good
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* @ring: the ring we care about
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* @skb: skb currently being received and modified
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* @rx_desc: the receive descriptor
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* @ptype: the packet type decoded by hardware
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*
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* skb->protocol must be set before this function is called
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*/
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static void
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ice_rx_csum(struct ice_ring *ring, struct sk_buff *skb,
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union ice_32b_rx_flex_desc *rx_desc, u8 ptype)
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{
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struct ice_rx_ptype_decoded decoded;
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u32 rx_error, rx_status;
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bool ipv4, ipv6;
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rx_status = le16_to_cpu(rx_desc->wb.status_error0);
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rx_error = rx_status;
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decoded = ice_decode_rx_desc_ptype(ptype);
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/* Start with CHECKSUM_NONE and by default csum_level = 0 */
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skb->ip_summed = CHECKSUM_NONE;
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skb_checksum_none_assert(skb);
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/* check if Rx checksum is enabled */
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if (!(ring->netdev->features & NETIF_F_RXCSUM))
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return;
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/* check if HW has decoded the packet and checksum */
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if (!(rx_status & BIT(ICE_RX_FLEX_DESC_STATUS0_L3L4P_S)))
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return;
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if (!(decoded.known && decoded.outer_ip))
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return;
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ipv4 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
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(decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV4);
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ipv6 = (decoded.outer_ip == ICE_RX_PTYPE_OUTER_IP) &&
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(decoded.outer_ip_ver == ICE_RX_PTYPE_OUTER_IPV6);
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if (ipv4 && (rx_error & (BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_IPE_S) |
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BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_EIPE_S))))
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goto checksum_fail;
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else if (ipv6 && (rx_status &
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(BIT(ICE_RX_FLEX_DESC_STATUS0_IPV6EXADD_S))))
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goto checksum_fail;
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/* check for L4 errors and handle packets that were not able to be
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* checksummed due to arrival speed
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*/
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if (rx_error & BIT(ICE_RX_FLEX_DESC_STATUS0_XSUM_L4E_S))
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goto checksum_fail;
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/* Only report checksum unnecessary for TCP, UDP, or SCTP */
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switch (decoded.inner_prot) {
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case ICE_RX_PTYPE_INNER_PROT_TCP:
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case ICE_RX_PTYPE_INNER_PROT_UDP:
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case ICE_RX_PTYPE_INNER_PROT_SCTP:
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skb->ip_summed = CHECKSUM_UNNECESSARY;
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default:
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break;
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}
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return;
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checksum_fail:
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ring->vsi->back->hw_csum_rx_error++;
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}
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/**
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* ice_process_skb_fields - Populate skb header fields from Rx descriptor
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* @rx_ring: Rx descriptor ring packet is being transacted on
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* @rx_desc: pointer to the EOP Rx descriptor
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* @skb: pointer to current skb being populated
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* @ptype: the packet type decoded by hardware
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*
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* This function checks the ring, descriptor, and packet information in
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* order to populate the hash, checksum, VLAN, protocol, and
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* other fields within the skb.
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*/
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void
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ice_process_skb_fields(struct ice_ring *rx_ring,
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union ice_32b_rx_flex_desc *rx_desc,
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struct sk_buff *skb, u8 ptype)
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{
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ice_rx_hash(rx_ring, rx_desc, skb, ptype);
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/* modifies the skb - consumes the enet header */
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skb->protocol = eth_type_trans(skb, rx_ring->netdev);
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ice_rx_csum(rx_ring, skb, rx_desc, ptype);
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}
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/**
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* ice_receive_skb - Send a completed packet up the stack
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* @rx_ring: Rx ring in play
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* @skb: packet to send up
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* @vlan_tag: VLAN tag for packet
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*
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* This function sends the completed packet (via. skb) up the stack using
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* gro receive functions (with/without VLAN tag)
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*/
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void
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ice_receive_skb(struct ice_ring *rx_ring, struct sk_buff *skb, u16 vlan_tag)
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{
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if ((rx_ring->netdev->features & NETIF_F_HW_VLAN_CTAG_RX) &&
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(vlan_tag & VLAN_VID_MASK))
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__vlan_hwaccel_put_tag(skb, htons(ETH_P_8021Q), vlan_tag);
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napi_gro_receive(&rx_ring->q_vector->napi, skb);
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}
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/**
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* ice_xmit_xdp_ring - submit single packet to XDP ring for transmission
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* @data: packet data pointer
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* @size: packet data size
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* @xdp_ring: XDP ring for transmission
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*/
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int ice_xmit_xdp_ring(void *data, u16 size, struct ice_ring *xdp_ring)
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{
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u16 i = xdp_ring->next_to_use;
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struct ice_tx_desc *tx_desc;
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struct ice_tx_buf *tx_buf;
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dma_addr_t dma;
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if (!unlikely(ICE_DESC_UNUSED(xdp_ring))) {
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xdp_ring->tx_stats.tx_busy++;
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return ICE_XDP_CONSUMED;
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}
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dma = dma_map_single(xdp_ring->dev, data, size, DMA_TO_DEVICE);
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if (dma_mapping_error(xdp_ring->dev, dma))
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return ICE_XDP_CONSUMED;
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tx_buf = &xdp_ring->tx_buf[i];
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tx_buf->bytecount = size;
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tx_buf->gso_segs = 1;
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tx_buf->raw_buf = data;
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/* record length, and DMA address */
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dma_unmap_len_set(tx_buf, len, size);
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dma_unmap_addr_set(tx_buf, dma, dma);
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tx_desc = ICE_TX_DESC(xdp_ring, i);
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tx_desc->buf_addr = cpu_to_le64(dma);
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tx_desc->cmd_type_offset_bsz = build_ctob(ICE_TXD_LAST_DESC_CMD, 0,
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size, 0);
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/* Make certain all of the status bits have been updated
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* before next_to_watch is written.
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*/
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smp_wmb();
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i++;
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if (i == xdp_ring->count)
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i = 0;
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tx_buf->next_to_watch = tx_desc;
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xdp_ring->next_to_use = i;
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return ICE_XDP_TX;
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}
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/**
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* ice_xmit_xdp_buff - convert an XDP buffer to an XDP frame and send it
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* @xdp: XDP buffer
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* @xdp_ring: XDP Tx ring
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*
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* Returns negative on failure, 0 on success.
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*/
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int ice_xmit_xdp_buff(struct xdp_buff *xdp, struct ice_ring *xdp_ring)
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{
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struct xdp_frame *xdpf = convert_to_xdp_frame(xdp);
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if (unlikely(!xdpf))
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return ICE_XDP_CONSUMED;
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return ice_xmit_xdp_ring(xdpf->data, xdpf->len, xdp_ring);
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}
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/**
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* ice_finalize_xdp_rx - Bump XDP Tx tail and/or flush redirect map
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* @rx_ring: Rx ring
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* @xdp_res: Result of the receive batch
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*
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* This function bumps XDP Tx tail and/or flush redirect map, and
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* should be called when a batch of packets has been processed in the
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* napi loop.
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*/
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void ice_finalize_xdp_rx(struct ice_ring *rx_ring, unsigned int xdp_res)
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{
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if (xdp_res & ICE_XDP_REDIR)
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xdp_do_flush_map();
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if (xdp_res & ICE_XDP_TX) {
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struct ice_ring *xdp_ring =
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rx_ring->vsi->xdp_rings[rx_ring->q_index];
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ice_xdp_ring_update_tail(xdp_ring);
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}
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}
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