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Add initial pinctrl driver for Mediatek MT6797 SoC supporting only GPIO and pinmux configurations. Tested-by: Matthias Brugger <matthias.bgg@gmail.com> Acked-by: Sean Wang <sean.wang@kernel.org> Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
83 lines
2.3 KiB
C
83 lines
2.3 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Based on pinctrl-mt6765.c
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*
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* Copyright (C) 2018 MediaTek Inc.
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*
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* Author: ZH Chen <zh.chen@mediatek.com>
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*
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* Copyright (C) Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
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*
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*/
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#include "pinctrl-mtk-mt6797.h"
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#include "pinctrl-paris.h"
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/*
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* MT6797 have multiple bases to program pin configuration listed as the below:
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* gpio:0x10005000, iocfg[l]:0x10002000, iocfg[b]:0x10002400,
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* iocfg[r]:0x10002800, iocfg[t]:0x10002C00.
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* _i_base could be used to indicate what base the pin should be mapped into.
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*/
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static const struct mtk_pin_field_calc mt6797_pin_mode_range[] = {
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PIN_FIELD(0, 261, 0x300, 0x10, 0, 4),
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};
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static const struct mtk_pin_field_calc mt6797_pin_dir_range[] = {
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PIN_FIELD(0, 261, 0x0, 0x10, 0, 1),
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};
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static const struct mtk_pin_field_calc mt6797_pin_di_range[] = {
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PIN_FIELD(0, 261, 0x200, 0x10, 0, 1),
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};
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static const struct mtk_pin_field_calc mt6797_pin_do_range[] = {
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PIN_FIELD(0, 261, 0x100, 0x10, 0, 1),
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};
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static const struct mtk_pin_reg_calc mt6797_reg_cals[PINCTRL_PIN_REG_MAX] = {
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[PINCTRL_PIN_REG_MODE] = MTK_RANGE(mt6797_pin_mode_range),
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[PINCTRL_PIN_REG_DIR] = MTK_RANGE(mt6797_pin_dir_range),
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[PINCTRL_PIN_REG_DI] = MTK_RANGE(mt6797_pin_di_range),
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[PINCTRL_PIN_REG_DO] = MTK_RANGE(mt6797_pin_do_range),
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};
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static const char * const mt6797_pinctrl_register_base_names[] = {
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"gpio", "iocfgl", "iocfgb", "iocfgr", "iocfgt",
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};
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static const struct mtk_pin_soc mt6797_data = {
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.reg_cal = mt6797_reg_cals,
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.pins = mtk_pins_mt6797,
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.npins = ARRAY_SIZE(mtk_pins_mt6797),
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.ngrps = ARRAY_SIZE(mtk_pins_mt6797),
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.gpio_m = 0,
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.base_names = mt6797_pinctrl_register_base_names,
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.nbase_names = ARRAY_SIZE(mt6797_pinctrl_register_base_names),
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};
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static const struct of_device_id mt6797_pinctrl_of_match[] = {
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{ .compatible = "mediatek,mt6797-pinctrl", },
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{ }
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};
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static int mt6797_pinctrl_probe(struct platform_device *pdev)
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{
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return mtk_paris_pinctrl_probe(pdev, &mt6797_data);
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}
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static struct platform_driver mt6797_pinctrl_driver = {
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.driver = {
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.name = "mt6797-pinctrl",
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.of_match_table = mt6797_pinctrl_of_match,
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},
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.probe = mt6797_pinctrl_probe,
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};
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static int __init mt6797_pinctrl_init(void)
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{
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return platform_driver_register(&mt6797_pinctrl_driver);
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}
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arch_initcall(mt6797_pinctrl_init);
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