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https://mirrors.bfsu.edu.cn/git/linux.git
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bac8a20fa3
* Use refcount to prevent corruption * Call external _get and _put in right order * Fix use-after-free in mtd release * Explicitly include correct DT includes * Clean refcounting with MTD_PARTITIONED_MASTER * mtdblock: make warning messages ratelimited * dt-bindings: Add SEAMA partition bindings MTD device driver changes: * spear_smi: Use helper function devm_clk_get_enabled() * maps: fix -Wvoid-pointer-to-enum-cast warning * docg3: Remove unnecessary (void*) conversions * physmap-core, spear_smi, st_spi_fsm, lpddr2_nvm, lantiq-flash, plat-ram: - Use devm_platform_get_and_ioremap_resource() Raw NAND core changes: * Fix -Wvoid-pointer-to-enum-cast warning * Export 'nand_exit_status_op()' * dt-bindings: Fix nand-controller.yaml license Raw NAND controller driver changes: * Omap, Omap2, Samsung, Atmel, fsl_upm, lpc32xx_slc, lpc32xx_mlc, STM32_FMC2, sh_ftlctl, MXC, Sunxi: - Use devm_platform_get_and_ioremap_resource() * Orion, vf610_nfc, Sunxi, STM32_FMC2, MTK, mpc5121, lpc32xx_slc, Intel, FSMC, Arasan: - Use helper function devm_clk_get_optional_enabled() * Brcmnand: - Use devm_platform_ioremap_resource_byname() - Propagate init error -EPROBE_DEFER up - Propagate error and simplify ternary operators - Fix mtd oobsize - Fix potential out-of-bounds access in oob write - Fix crash during the panic_write - Fix potential false time out warning - Fix ECC level field setting for v7.2 controller * fsmc: Handle clk prepare error in fsmc_nand_resume() * Marvell: Add support for AC5 SoC * Meson: - Support for 512B ECC step size - Fix build error - Use NAND core API to check status - dt-bindings: * Make ECC properties dependent * Support for 512B ECC step size * Drop unneeded quotes * Oxnas: Remove driver and bindings * Qcom: - Conversion to ->exec_op() - Removal of the legacy interface - Two full series of improvements/misc fixes * Use the BIT() macro * Use u8 instead of uint8_t * Fix alignment with open parenthesis * Fix the spacing * Fix wrong indentation * Fix a typo * Early structure initialization * Fix address parsing within ->exec_op() * Remove superfluous initialization of "ret" * Rename variables in qcom_op_cmd_mapping() * Handle unsupported opcode in qcom_op_cmd_mapping() * Fix the opcode check in qcom_check_op() * Use EOPNOTSUPP instead of ENOTSUPP * Wrap qcom_nand_exec_op() to 80 columns * Unmap sg_list and free desc within submic_descs() * Simplify the call to nand_prog_page_end_op() * Do not override the error no of submit_descs() * Sort includes alphabetically * Clear buf_count and buf_start in raw read * Add read/read_start ops in exec_op path * vf610_nfc: Do not check 0 for platform_get_irq() SPI NAND manufacturer driver changes: * gigadevice: Add support for GD5F1GQ{4,5}RExxH * esmt: Add support for F50D2G41KA * toshiba: Add support for T{C,H}58NYG{0,2}S3HBAI4 and TH58NYG3S0HBAI6 SPI NOR core changes: * fix assumption on enabling quad mode in spi_nor_write_16bit_sr_and_check() * avoid setting SRWD bit in SR if WP# signal not connected as it will configure the SR permanently as read only. Add "no-wp" dt property. * clarify the need for spi-nor compatibles in dt-bindings SPI NOR manufacturer driver changes: * Spansion: - Add support for S28HS02GT - Switch methods to use vreg_offset from SFDP instead of hardcoding the register value * Microchip/SST: - Add support for sst26vf032b flash * Winbond: - Correct flags for Winbond w25q128 * NXP spifi: - Use helper function devm_clk_get_enabled() -----BEGIN PGP SIGNATURE----- iQEzBAABCgAdFiEE9HuaYnbmDhq/XIDIJWrqGEe9VoQFAmTstY0ACgkQJWrqGEe9 VoRpeggAmiUPLVEJRosvtOAaT+en2YTDiVZrRmQ8hjekjRc4FfY6C7DPNWNua3zx SaVqLEF7ScjnKH1YYwXN3XG3j4+1NPRV/VmR89yD6NVOcLs8BEJk/Ooc6LQrHAAf E87jVafbPLWq8MkcVcnHbdijgHVh2onMbUQtkqjFSn6WAolSmZFJotocfKT12uuY K9Hn5TLjRiH5e7O1rQnBcATMXjHIA1o0G1RCklm+T1MojNXIO1KN8yMYRjUoGbEJ afFdwczNiTFgL4MJ3qL6NhqhSGC6V6QsUcsYvEjmComepAuZBP2wGnuQMHOxKqYV Tl93LW8FOdyWHdCSgJdYkctoRPU6KQ== =uMXQ -----END PGP SIGNATURE----- Merge tag 'mtd/for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux Pull MTD updates from Miquel Raynal: "Core MTD changes: - Use refcount to prevent corruption - Call external _get and _put in right order - Fix use-after-free in mtd release - Explicitly include correct DT includes - Clean refcounting with MTD_PARTITIONED_MASTER - mtdblock: make warning messages ratelimited - dt-bindings: Add SEAMA partition bindings Device driver changes: - Use devm helper functions - Fix questionable cast, remove pointless ones. - error handling fixes - add support for new chip versions - update DT bindings - misc cleanups - fix typos, whitespace, indentation" * tag 'mtd/for-6.6' of git://git.kernel.org/pub/scm/linux/kernel/git/mtd/linux: (105 commits) dt-bindings: mtd: amlogic,meson-nand: drop unneeded quotes mtd: spear_smi: Use helper function devm_clk_get_enabled() mtd: rawnand: orion: Use helper function devm_clk_get_optional_enabled() mtd: rawnand: vf610_nfc: Use helper function devm_clk_get_enabled() mtd: rawnand: sunxi: Use helper function devm_clk_get_enabled() mtd: rawnand: stm32_fmc2: Use helper function devm_clk_get_enabled() mtd: rawnand: mtk: Use helper function devm_clk_get_enabled() mtd: rawnand: mpc5121: Use helper function devm_clk_get_enabled() mtd: rawnand: lpc32xx_slc: Use helper function devm_clk_get_enabled() mtd: rawnand: intel: Use helper function devm_clk_get_enabled() mtd: rawnand: fsmc: Use helper function devm_clk_get_enabled() mtd: rawnand: arasan: Use helper function devm_clk_get_enabled() mtd: rawnand: qcom: Add read/read_start ops in exec_op path mtd: rawnand: qcom: Clear buf_count and buf_start in raw read mtd: maps: fix -Wvoid-pointer-to-enum-cast warning mtd: rawnand: fix -Wvoid-pointer-to-enum-cast warning mtd: rawnand: fsmc: handle clk prepare error in fsmc_nand_resume() mtd: rawnand: Propagate error and simplify ternary operators for brcmstb_nand_wait_for_completion() mtd: rawnand: qcom: Sort includes alphabetically mtd: rawnand: qcom: Do not override the error no of submit_descs() ...
271 lines
6.5 KiB
C
271 lines
6.5 KiB
C
// SPDX-License-Identifier: GPL-2.0-or-later
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/*
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* Freescale UPM NAND driver.
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*
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* Copyright © 2007-2008 MontaVista Software, Inc.
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*
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* Author: Anton Vorontsov <avorontsov@ru.mvista.com>
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/delay.h>
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#include <linux/mtd/rawnand.h>
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#include <linux/mtd/partitions.h>
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#include <linux/mtd/mtd.h>
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#include <linux/of.h>
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#include <linux/platform_device.h>
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#include <linux/io.h>
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#include <linux/slab.h>
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#include <asm/fsl_lbc.h>
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struct fsl_upm_nand {
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struct nand_controller base;
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struct device *dev;
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struct nand_chip chip;
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struct fsl_upm upm;
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uint8_t upm_addr_offset;
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uint8_t upm_cmd_offset;
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void __iomem *io_base;
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struct gpio_desc *rnb_gpio[NAND_MAX_CHIPS];
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uint32_t mchip_offsets[NAND_MAX_CHIPS];
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uint32_t mchip_count;
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uint32_t mchip_number;
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};
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static inline struct fsl_upm_nand *to_fsl_upm_nand(struct mtd_info *mtdinfo)
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{
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return container_of(mtd_to_nand(mtdinfo), struct fsl_upm_nand,
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chip);
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}
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static int fun_chip_init(struct fsl_upm_nand *fun,
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const struct device_node *upm_np,
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const struct resource *io_res)
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{
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struct mtd_info *mtd = nand_to_mtd(&fun->chip);
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int ret;
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struct device_node *flash_np;
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fun->chip.ecc.engine_type = NAND_ECC_ENGINE_TYPE_SOFT;
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fun->chip.ecc.algo = NAND_ECC_ALGO_HAMMING;
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fun->chip.controller = &fun->base;
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mtd->dev.parent = fun->dev;
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flash_np = of_get_next_child(upm_np, NULL);
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if (!flash_np)
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return -ENODEV;
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nand_set_flash_node(&fun->chip, flash_np);
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mtd->name = devm_kasprintf(fun->dev, GFP_KERNEL, "0x%llx.%pOFn",
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(u64)io_res->start,
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flash_np);
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if (!mtd->name) {
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ret = -ENOMEM;
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goto err;
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}
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ret = nand_scan(&fun->chip, fun->mchip_count);
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if (ret)
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goto err;
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ret = mtd_device_register(mtd, NULL, 0);
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err:
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of_node_put(flash_np);
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return ret;
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}
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static int func_exec_instr(struct nand_chip *chip,
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const struct nand_op_instr *instr)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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u32 mar, reg_offs = fun->mchip_offsets[fun->mchip_number];
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unsigned int i;
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const u8 *out;
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u8 *in;
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switch (instr->type) {
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case NAND_OP_CMD_INSTR:
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fsl_upm_start_pattern(&fun->upm, fun->upm_cmd_offset);
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mar = (instr->ctx.cmd.opcode << (32 - fun->upm.width)) |
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reg_offs;
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fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar);
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fsl_upm_end_pattern(&fun->upm);
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return 0;
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case NAND_OP_ADDR_INSTR:
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fsl_upm_start_pattern(&fun->upm, fun->upm_addr_offset);
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for (i = 0; i < instr->ctx.addr.naddrs; i++) {
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mar = (instr->ctx.addr.addrs[i] << (32 - fun->upm.width)) |
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reg_offs;
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fsl_upm_run_pattern(&fun->upm, fun->io_base + reg_offs, mar);
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}
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fsl_upm_end_pattern(&fun->upm);
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return 0;
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case NAND_OP_DATA_IN_INSTR:
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in = instr->ctx.data.buf.in;
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for (i = 0; i < instr->ctx.data.len; i++)
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in[i] = in_8(fun->io_base + reg_offs);
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return 0;
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case NAND_OP_DATA_OUT_INSTR:
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out = instr->ctx.data.buf.out;
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for (i = 0; i < instr->ctx.data.len; i++)
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out_8(fun->io_base + reg_offs, out[i]);
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return 0;
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case NAND_OP_WAITRDY_INSTR:
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if (!fun->rnb_gpio[fun->mchip_number])
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return nand_soft_waitrdy(chip, instr->ctx.waitrdy.timeout_ms);
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return nand_gpio_waitrdy(chip, fun->rnb_gpio[fun->mchip_number],
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instr->ctx.waitrdy.timeout_ms);
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int fun_exec_op(struct nand_chip *chip, const struct nand_operation *op,
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bool check_only)
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{
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struct fsl_upm_nand *fun = to_fsl_upm_nand(nand_to_mtd(chip));
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unsigned int i;
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int ret;
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if (op->cs >= NAND_MAX_CHIPS)
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return -EINVAL;
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if (check_only)
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return 0;
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fun->mchip_number = op->cs;
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for (i = 0; i < op->ninstrs; i++) {
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ret = func_exec_instr(chip, &op->instrs[i]);
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if (ret)
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return ret;
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if (op->instrs[i].delay_ns)
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ndelay(op->instrs[i].delay_ns);
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}
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return 0;
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}
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static const struct nand_controller_ops fun_ops = {
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.exec_op = fun_exec_op,
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};
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static int fun_probe(struct platform_device *ofdev)
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{
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struct fsl_upm_nand *fun;
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struct resource *io_res;
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const __be32 *prop;
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int ret;
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int size;
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int i;
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fun = devm_kzalloc(&ofdev->dev, sizeof(*fun), GFP_KERNEL);
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if (!fun)
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return -ENOMEM;
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fun->io_base = devm_platform_get_and_ioremap_resource(ofdev, 0, &io_res);
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if (IS_ERR(fun->io_base))
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return PTR_ERR(fun->io_base);
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ret = fsl_upm_find(io_res->start, &fun->upm);
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if (ret) {
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dev_err(&ofdev->dev, "can't find UPM\n");
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return ret;
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}
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prop = of_get_property(ofdev->dev.of_node, "fsl,upm-addr-offset",
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&size);
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if (!prop || size != sizeof(uint32_t)) {
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dev_err(&ofdev->dev, "can't get UPM address offset\n");
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return -EINVAL;
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}
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fun->upm_addr_offset = *prop;
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prop = of_get_property(ofdev->dev.of_node, "fsl,upm-cmd-offset", &size);
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if (!prop || size != sizeof(uint32_t)) {
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dev_err(&ofdev->dev, "can't get UPM command offset\n");
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return -EINVAL;
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}
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fun->upm_cmd_offset = *prop;
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prop = of_get_property(ofdev->dev.of_node,
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"fsl,upm-addr-line-cs-offsets", &size);
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if (prop && (size / sizeof(uint32_t)) > 0) {
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fun->mchip_count = size / sizeof(uint32_t);
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if (fun->mchip_count >= NAND_MAX_CHIPS) {
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dev_err(&ofdev->dev, "too much multiple chips\n");
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return -EINVAL;
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}
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for (i = 0; i < fun->mchip_count; i++)
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fun->mchip_offsets[i] = be32_to_cpu(prop[i]);
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} else {
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fun->mchip_count = 1;
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}
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for (i = 0; i < fun->mchip_count; i++) {
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fun->rnb_gpio[i] = devm_gpiod_get_index_optional(&ofdev->dev,
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NULL, i,
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GPIOD_IN);
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if (IS_ERR(fun->rnb_gpio[i])) {
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dev_err(&ofdev->dev, "RNB gpio #%d is invalid\n", i);
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return PTR_ERR(fun->rnb_gpio[i]);
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}
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}
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nand_controller_init(&fun->base);
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fun->base.ops = &fun_ops;
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fun->dev = &ofdev->dev;
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ret = fun_chip_init(fun, ofdev->dev.of_node, io_res);
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if (ret)
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return ret;
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dev_set_drvdata(&ofdev->dev, fun);
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return 0;
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}
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static void fun_remove(struct platform_device *ofdev)
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{
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struct fsl_upm_nand *fun = dev_get_drvdata(&ofdev->dev);
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struct nand_chip *chip = &fun->chip;
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struct mtd_info *mtd = nand_to_mtd(chip);
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int ret;
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ret = mtd_device_unregister(mtd);
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WARN_ON(ret);
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nand_cleanup(chip);
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}
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static const struct of_device_id of_fun_match[] = {
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{ .compatible = "fsl,upm-nand" },
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{},
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};
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MODULE_DEVICE_TABLE(of, of_fun_match);
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static struct platform_driver of_fun_driver = {
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.driver = {
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.name = "fsl,upm-nand",
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.of_match_table = of_fun_match,
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},
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.probe = fun_probe,
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.remove_new = fun_remove,
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};
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module_platform_driver(of_fun_driver);
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MODULE_LICENSE("GPL");
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MODULE_AUTHOR("Anton Vorontsov <avorontsov@ru.mvista.com>");
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MODULE_DESCRIPTION("Driver for NAND chips working through Freescale "
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"LocalBus User-Programmable Machine");
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