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bdf82b59c5
Patch from Deepak Saxena This patch implements the set_irq_type() hooks for configuring GPIO IRQ type and updates all the platforms to use it instead of the gpio_line_config() function which is now used to configure input vs. output on the pins. Signed-off-by: Deepak Saxena <dsaxena@plexity.net> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
96 lines
2.7 KiB
C
96 lines
2.7 KiB
C
/*
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* arch/arm/mach-ixp4xx/gtwx5715-pci.c
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*
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* Gemtek GTWX5715 (Linksys WRV54G) board setup
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*
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* Copyright (C) 2004 George T. Joseph
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* Derived from Coyote
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version 2
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* of the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
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*
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*/
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#include <linux/pci.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <asm/mach-types.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/arch/gtwx5715.h>
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#include <asm/mach/pci.h>
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extern void ixp4xx_pci_preinit(void);
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extern int ixp4xx_setup(int nr, struct pci_sys_data *sys);
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extern struct pci_bus *ixp4xx_scan_bus(int nr, struct pci_sys_data *sys);
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/*
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* The exact GPIO pins and IRQs are defined in arch-ixp4xx/gtwx5715.h
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* Slot 0 isn't actually populated with a card connector but
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* we initialize it anyway in case a future version has the
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* slot populated or someone with good soldering skills has
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* some free time.
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*/
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void __init gtwx5715_pci_preinit(void)
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{
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set_irq_type(GTWX5715_PCI_SLOT0_INTA_IRQ, IRQT_LOW);
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set_irq_type(GTWX5715_PCI_SLOT0_INTB_IRQ, IRQT_LOW);
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set_irq_type(GTWX5715_PCI_SLOT1_INTA_IRQ, IRQT_LOW);
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set_irq_type(GTWX5715_PCI_SLOT1_INTB_IRQ, IRQT_LOW);
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ixp4xx_pci_preinit();
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}
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static int __init gtwx5715_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
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{
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int rc;
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static int gtwx5715_irqmap
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[GTWX5715_PCI_SLOT_COUNT]
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[GTWX5715_PCI_INT_PIN_COUNT] = {
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{GTWX5715_PCI_SLOT0_INTA_IRQ, GTWX5715_PCI_SLOT0_INTB_IRQ},
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{GTWX5715_PCI_SLOT1_INTA_IRQ, GTWX5715_PCI_SLOT1_INTB_IRQ},
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};
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if (slot >= GTWX5715_PCI_SLOT_COUNT ||
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pin >= GTWX5715_PCI_INT_PIN_COUNT) rc = -1;
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else
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rc = gtwx5715_irqmap[slot][pin-1];
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printk("%s: Mapped slot %d pin %d to IRQ %d\n", __FUNCTION__,slot, pin, rc);
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return(rc);
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}
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struct hw_pci gtwx5715_pci __initdata = {
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.nr_controllers = 1,
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.preinit = gtwx5715_pci_preinit,
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.swizzle = pci_std_swizzle,
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.setup = ixp4xx_setup,
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.scan = ixp4xx_scan_bus,
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.map_irq = gtwx5715_map_irq,
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};
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int __init gtwx5715_pci_init(void)
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{
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if (machine_is_gtwx5715())
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{
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pci_common_init(>wx5715_pci);
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}
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return 0;
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}
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subsys_initcall(gtwx5715_pci_init);
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