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The macros for getting the values for horizontal sync width and offset
do not respect the EDID specification. Both these values are 10 bit
values according to [1], not 6 bit values. The lower 8 bits are stored
in byte 8 and byte 9 of the DTD respectively, while two additional bits
for each value are stored in byte 11. The original macros just slammed
the bits together.
Although the original macros usually worked fine because the higher two
bits are rarely used, it can cause severe problems on plasma panels
running at 1920x1080 @ 50 Hz with drivers that rely on the correct
parsing of the EDID data by fbmon.c (e.g. udlfb).
The patch should apply cleanly to both the fbdev-2.6.git branch and
linux-next.git branch.
[1] VESA Enhanced Extended Display Identification Data Standard,
Release A, Revision 2, page 34, notes 7 & 8, VESA, Sep 2006
Signed-off-by: Martin Decky <martin@decky.cz>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
139 lines
4.6 KiB
C
139 lines
4.6 KiB
C
/*
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* drivers/video/edid.h - EDID/DDC Header
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*
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* Based on:
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* 1. XFree86 4.3.0, edid.h
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* Copyright 1998 by Egbert Eich <Egbert.Eich@Physik.TU-Darmstadt.DE>
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*
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* 2. John Fremlin <vii@users.sourceforge.net> and
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* Ani Joshi <ajoshi@unixbox.com>
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*
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* DDC is a Trademark of VESA (Video Electronics Standard Association).
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file COPYING in the main directory of this archive
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* for more details.
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*/
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#ifndef __EDID_H__
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#define __EDID_H__
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#define EDID_LENGTH 0x80
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#define EDID_HEADER 0x00
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#define EDID_HEADER_END 0x07
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#define ID_MANUFACTURER_NAME 0x08
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#define ID_MANUFACTURER_NAME_END 0x09
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#define ID_MODEL 0x0a
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#define ID_SERIAL_NUMBER 0x0c
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#define MANUFACTURE_WEEK 0x10
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#define MANUFACTURE_YEAR 0x11
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#define EDID_STRUCT_VERSION 0x12
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#define EDID_STRUCT_REVISION 0x13
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#define EDID_STRUCT_DISPLAY 0x14
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#define DPMS_FLAGS 0x18
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#define ESTABLISHED_TIMING_1 0x23
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#define ESTABLISHED_TIMING_2 0x24
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#define MANUFACTURERS_TIMINGS 0x25
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/* standard timings supported */
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#define STD_TIMING 8
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#define STD_TIMING_DESCRIPTION_SIZE 2
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#define STD_TIMING_DESCRIPTIONS_START 0x26
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#define DETAILED_TIMING_DESCRIPTIONS_START 0x36
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#define DETAILED_TIMING_DESCRIPTION_SIZE 18
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#define NO_DETAILED_TIMING_DESCRIPTIONS 4
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#define DETAILED_TIMING_DESCRIPTION_1 0x36
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#define DETAILED_TIMING_DESCRIPTION_2 0x48
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#define DETAILED_TIMING_DESCRIPTION_3 0x5a
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#define DETAILED_TIMING_DESCRIPTION_4 0x6c
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#define DESCRIPTOR_DATA 5
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#define UPPER_NIBBLE( x ) \
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(((128|64|32|16) & (x)) >> 4)
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#define LOWER_NIBBLE( x ) \
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((1|2|4|8) & (x))
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#define COMBINE_HI_8LO( hi, lo ) \
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( (((unsigned)hi) << 8) | (unsigned)lo )
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#define COMBINE_HI_4LO( hi, lo ) \
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( (((unsigned)hi) << 4) | (unsigned)lo )
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#define PIXEL_CLOCK_LO (unsigned)block[ 0 ]
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#define PIXEL_CLOCK_HI (unsigned)block[ 1 ]
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#define PIXEL_CLOCK (COMBINE_HI_8LO( PIXEL_CLOCK_HI,PIXEL_CLOCK_LO )*10000)
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#define H_ACTIVE_LO (unsigned)block[ 2 ]
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#define H_BLANKING_LO (unsigned)block[ 3 ]
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#define H_ACTIVE_HI UPPER_NIBBLE( (unsigned)block[ 4 ] )
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#define H_ACTIVE COMBINE_HI_8LO( H_ACTIVE_HI, H_ACTIVE_LO )
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#define H_BLANKING_HI LOWER_NIBBLE( (unsigned)block[ 4 ] )
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#define H_BLANKING COMBINE_HI_8LO( H_BLANKING_HI, H_BLANKING_LO )
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#define V_ACTIVE_LO (unsigned)block[ 5 ]
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#define V_BLANKING_LO (unsigned)block[ 6 ]
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#define V_ACTIVE_HI UPPER_NIBBLE( (unsigned)block[ 7 ] )
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#define V_ACTIVE COMBINE_HI_8LO( V_ACTIVE_HI, V_ACTIVE_LO )
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#define V_BLANKING_HI LOWER_NIBBLE( (unsigned)block[ 7 ] )
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#define V_BLANKING COMBINE_HI_8LO( V_BLANKING_HI, V_BLANKING_LO )
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#define H_SYNC_OFFSET_LO (unsigned)block[ 8 ]
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#define H_SYNC_WIDTH_LO (unsigned)block[ 9 ]
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#define V_SYNC_OFFSET_LO UPPER_NIBBLE( (unsigned)block[ 10 ] )
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#define V_SYNC_WIDTH_LO LOWER_NIBBLE( (unsigned)block[ 10 ] )
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#define V_SYNC_WIDTH_HI ((unsigned)block[ 11 ] & (1|2))
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#define V_SYNC_OFFSET_HI (((unsigned)block[ 11 ] & (4|8)) >> 2)
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#define H_SYNC_WIDTH_HI (((unsigned)block[ 11 ] & (16|32)) >> 4)
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#define H_SYNC_OFFSET_HI (((unsigned)block[ 11 ] & (64|128)) >> 6)
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#define V_SYNC_WIDTH COMBINE_HI_4LO( V_SYNC_WIDTH_HI, V_SYNC_WIDTH_LO )
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#define V_SYNC_OFFSET COMBINE_HI_4LO( V_SYNC_OFFSET_HI, V_SYNC_OFFSET_LO )
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#define H_SYNC_WIDTH COMBINE_HI_8LO( H_SYNC_WIDTH_HI, H_SYNC_WIDTH_LO )
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#define H_SYNC_OFFSET COMBINE_HI_8LO( H_SYNC_OFFSET_HI, H_SYNC_OFFSET_LO )
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#define H_SIZE_LO (unsigned)block[ 12 ]
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#define V_SIZE_LO (unsigned)block[ 13 ]
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#define H_SIZE_HI UPPER_NIBBLE( (unsigned)block[ 14 ] )
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#define V_SIZE_HI LOWER_NIBBLE( (unsigned)block[ 14 ] )
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#define H_SIZE COMBINE_HI_8LO( H_SIZE_HI, H_SIZE_LO )
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#define V_SIZE COMBINE_HI_8LO( V_SIZE_HI, V_SIZE_LO )
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#define H_BORDER (unsigned)block[ 15 ]
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#define V_BORDER (unsigned)block[ 16 ]
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#define FLAGS (unsigned)block[ 17 ]
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#define INTERLACED (FLAGS&128)
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#define SYNC_TYPE (FLAGS&3<<3) /* bits 4,3 */
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#define SYNC_SEPARATE (3<<3)
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#define HSYNC_POSITIVE (FLAGS & 4)
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#define VSYNC_POSITIVE (FLAGS & 2)
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#define V_MIN_RATE block[ 5 ]
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#define V_MAX_RATE block[ 6 ]
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#define H_MIN_RATE block[ 7 ]
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#define H_MAX_RATE block[ 8 ]
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#define MAX_PIXEL_CLOCK (((int)block[ 9 ]) * 10)
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#define GTF_SUPPORT block[10]
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#define DPMS_ACTIVE_OFF (1 << 5)
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#define DPMS_SUSPEND (1 << 6)
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#define DPMS_STANDBY (1 << 7)
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#endif /* __EDID_H__ */
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