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6232c51cb3
Driver for the r8a7778's clocks that depend on the mode bits. Signed-off-by: Ulrich Hecht <ulrich.hecht+renesas@gmail.com> Acked-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Acked-by: Michael Turquette <mturquette@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
26 lines
699 B
Plaintext
26 lines
699 B
Plaintext
* Renesas R8A7778 Clock Pulse Generator (CPG)
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The CPG generates core clocks for the R8A7778. It includes two PLLs and
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several fixed ratio dividers
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Required Properties:
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- compatible: Must be "renesas,r8a7778-cpg-clocks"
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- reg: Base address and length of the memory resource used by the CPG
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- #clock-cells: Must be 1
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- clock-output-names: The names of the clocks. Supported clocks are
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"plla", "pllb", "b", "out", "p", "s", and "s1".
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Example
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-------
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cpg_clocks: cpg_clocks@ffc80000 {
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compatible = "renesas,r8a7778-cpg-clocks";
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reg = <0xffc80000 0x80>;
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#clock-cells = <1>;
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clocks = <&extal_clk>;
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clock-output-names = "plla", "pllb", "b",
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"out", "p", "s", "s1";
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};
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