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ab19066527
Cleanup bindings dropping unneeded quotes. Once all these are fixed, checking for this can be enabled in yamllint. Signed-off-by: Rob Herring <robh@kernel.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Reviewed-by: Joe Tessler <jrt@google.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> #rockchip Acked-by: Jernej Skrabec <jernej.skrabec@gmail.com> Reviewed-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de> Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org> [Sakari Ailus: Drop changes for files in which they had been done already] Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
70 lines
1.8 KiB
YAML
70 lines
1.8 KiB
YAML
# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/media/nxp,imx8mq-vpu.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Hantro G1/G2 VPU codecs implemented on i.MX8M SoCs
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maintainers:
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- Philipp Zabel <p.zabel@pengutronix.de>
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description:
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Hantro G1/G2 video decode accelerators present on i.MX8MQ SoCs.
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properties:
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compatible:
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oneOf:
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- const: nxp,imx8mq-vpu
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deprecated: true
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- const: nxp,imx8mq-vpu-g1
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- const: nxp,imx8mq-vpu-g2
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- const: nxp,imx8mm-vpu-g1
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reg:
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maxItems: 1
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interrupts:
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maxItems: 1
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clocks:
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maxItems: 1
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power-domains:
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maxItems: 1
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required:
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- compatible
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- reg
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- interrupts
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- clocks
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/imx8mq-clock.h>
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#include <dt-bindings/power/imx8mq-power.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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vpu_g1: video-codec@38300000 {
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compatible = "nxp,imx8mq-vpu-g1";
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reg = <0x38300000 0x10000>;
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interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_VPU_G1_ROOT>;
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power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G1>;
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};
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- |
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#include <dt-bindings/clock/imx8mq-clock.h>
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#include <dt-bindings/power/imx8mq-power.h>
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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vpu_g2: video-codec@38300000 {
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compatible = "nxp,imx8mq-vpu-g2";
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reg = <0x38310000 0x10000>;
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interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&clk IMX8MQ_CLK_VPU_G2_ROOT>;
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power-domains = <&vpu_blk_ctrl IMX8MQ_VPUBLK_PD_G2>;
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};
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