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e071916580
Currently lli_len is aligned to min of two widths, which looks to be incorrect. Instead it should be aligned to max of both widths. Lets say, total_size = 441 bytes MIN: lets check if min() suits or not: CASE 1: srcwidth = 1, dstwidth = 4 min(src, dst) = 1 i.e. We program transfer size in control reg to 441. Now, till 440 bytes everything is fine, but on the last byte DMAC can't transfer 1 byte to dst, as its width is 4. CASE 2: srcwidth = 4, dstwidth = 1 min(src, dst) = 1 i.e. we program transfer size in control reg to 110 (data transferred = 110 * srcwidth). So, here too 1 byte is left, but on the source side. MAX: Lets check if max() suits or not: CASE 3: srcwidth = 1, dstwidth = 4 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 440. Now, all 440 bytes will be transferred without any issues. CASE 4: srcwidth = 4, dstwidth = 1 max(src, dst) = 4 Aligned size is 440 i.e. We program transfer size in control reg to 110 (data transferred = 110 * srcwidth). Now, also all 440 bytes will be transferred without any issues. Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Vinod Koul <vinod.koul@intel.com> |
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| .. | ||
| ioat | ||
| ipu | ||
| ppc4xx | ||
| amba-pl08x.c | ||
| at_hdmac_regs.h | ||
| at_hdmac.c | ||
| coh901318_lli.c | ||
| coh901318_lli.h | ||
| coh901318.c | ||
| dmaengine.c | ||
| dmatest.c | ||
| dw_dmac_regs.h | ||
| dw_dmac.c | ||
| ep93xx_dma.c | ||
| fsldma.c | ||
| fsldma.h | ||
| imx-dma.c | ||
| imx-sdma.c | ||
| intel_mid_dma_regs.h | ||
| intel_mid_dma.c | ||
| iop-adma.c | ||
| iovlock.c | ||
| Kconfig | ||
| Makefile | ||
| mpc512x_dma.c | ||
| mv_xor.c | ||
| mv_xor.h | ||
| mxs-dma.c | ||
| pch_dma.c | ||
| pl330.c | ||
| shdma.c | ||
| shdma.h | ||
| ste_dma40_ll.c | ||
| ste_dma40_ll.h | ||
| ste_dma40.c | ||
| timb_dma.c | ||
| TODO | ||
| txx9dmac.c | ||
| txx9dmac.h | ||