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36aa1e32f4
This adds a new SH_CLK_CPG for parts that have CPG support. SH_CLK_CPG_LEGACY is made to depend on this, and still needs to be set for platforms that want clock-cpg to register the legacy clocks. With this new config item in place, it is now possible to start layering more generic CPG code in place while other platforms transition off of the legacy clocks. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
63 lines
1.2 KiB
C
63 lines
1.2 KiB
C
#include <linux/clk.h>
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#include <linux/compiler.h>
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#include <asm/clock.h>
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#ifdef CONFIG_SH_CLK_CPG_LEGACY
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static struct clk master_clk = {
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.name = "master_clk",
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.flags = CLK_ENABLE_ON_INIT,
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.rate = CONFIG_SH_PCLK_FREQ,
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};
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static struct clk peripheral_clk = {
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.name = "peripheral_clk",
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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static struct clk bus_clk = {
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.name = "bus_clk",
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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static struct clk cpu_clk = {
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.name = "cpu_clk",
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.parent = &master_clk,
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.flags = CLK_ENABLE_ON_INIT,
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};
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/*
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* The ordering of these clocks matters, do not change it.
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*/
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static struct clk *onchip_clocks[] = {
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&master_clk,
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&peripheral_clk,
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&bus_clk,
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&cpu_clk,
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};
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int __init __deprecated cpg_clk_init(void)
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{
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int i, ret = 0;
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for (i = 0; i < ARRAY_SIZE(onchip_clocks); i++) {
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struct clk *clk = onchip_clocks[i];
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arch_init_clk_ops(&clk->ops, i);
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if (clk->ops)
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ret |= clk_register(clk);
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}
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return ret;
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}
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/*
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* Placeholder for compatability, until the lazy CPUs do this
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* on their own.
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*/
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int __init __weak arch_clk_init(void)
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{
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return cpg_clk_init();
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}
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#endif /* CONFIG_SH_CPG_CLK_LEGACY */
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