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705c1da8fa
-----BEGIN PGP SIGNATURE----- iQJIBAABCgAyFiEEgMe7l+5h9hnxdsnuWYigwDrT+vwFAmXw04sUHGJoZWxnYWFz QGdvb2dsZS5jb20ACgkQWYigwDrT+vyT3xAAsp5+c2IcbrXpZZM7figwx4y9PPRp jcQ4AYSGP41xqTUGXUTcVZYvRorSIAFEOz33U0SL1UNxoOZz8j/M6SD58k8a6XRr 9SSPuKja1OKJjONhS1bzrcbVtuzr71ISrECXfLkvW5hY5hvq+3+anMtu3/UIEHu6 M1vVc+basRjjPJNTixMWvVqS3R+4gDAFeBtdZl/D+U6v0v2xOK+81YZqjfZZCw9v xmdHHK2dKNEdysNoRJ5cafY3b1NnSsrxlHbIhBnKt+7uRSWKD1dHcBQj7wDc/HrX yBGca+BZBKitXEJM3p5KcWWs4ijaywGw0GSffUIKrN9i6RIfwnxBH9jUbwDngifU 2IR/kLEqdjYi/WnENxIHpQATLyXhXZ8uEnLS0xMlRIA96u3M5B0mrYOZxaN3bo12 A3aE+aPOTw0u1wf7G8dBX6IdYnjZ/ZuR9Q+fVoKpZBvsYUVaKyiKCtKMCNaVirn5 z7nxR1W71ee+35+37KthPXhiw+YtURGz1wBWt+wWUMjBcpIj2bpzU9wQDE9ZMdYt XJoJcatrRhJzefO3uzd0egft+vwk0xrj5LQEDhMQyDrnBLC4EgI5niKPWqbay5Nx Cnll01CI82xAnIF6eu7OOuI1nYGtoFcY8rP3hTC85cWN7Xi8SAOLTZZcVTpfBMUr l2uEll8p+8dZ6IY= =AP3I -----END PGP SIGNATURE----- Merge tag 'pci-v6.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci Pull PCI updates from Bjorn Helgaas: "Enumeration: - Consolidate interrupt related code in irq.c (Ilpo Järvinen) - Reduce kernel size by replacing sysfs resource macros with functions (Ilpo Järvinen) - Reduce kernel size by compiling sysfs support only when CONFIG_SYSFS=y (Lukas Wunner) - Avoid using Extended Tags on 3ware-9650SE Root Port to work around an apparent hardware defect (Jörg Wedekind) Resource management: - Fix an MMIO mapping leak in pci_iounmap() (Philipp Stanner) - Move pci_iomap.c and other PCI-specific devres code to drivers/pci (Philipp Stanner) - Consolidate PCI devres code in devres.c (Philipp Stanner) Power management: - Avoid D3cold on Asus B1400 PCI-NVMe bridge, where firmware doesn't know how to return correctly to D0, and remove previous quirk that wasn't as specific (Daniel Drake) - Allow runtime PM when the driver enables it but doesn't need any runtime PM callbacks (Raag Jadav) - Drain runtime-idle callbacks before driver removal to avoid races between .remove() and .runtime_idle(), which caused intermittent page faults when the rtsx .runtime_idle() accessed registers that its .remove() had already unmapped (Rafael J. Wysocki) Virtualization: - Avoid Secondary Bus Reset on LSI FW643 so it can be assigned to VMs with VFIO, e.g., for professional audio software on many Apple machines, at the cost of leaking state between VMs (Edmund Raile) Error handling: - Print all logged TLP Prefixes, not just the first, after AER or DPC errors (Ilpo Järvinen) - Quirk the DPC PIO log size for Intel Raptor Lake Root Ports, which still don't advertise a legal size (Paul Menzel) - Ignore expected DPC Surprise Down errors on hot removal (Smita Koralahalli) - Block runtime suspend while handling AER errors to avoid races that prevent the device form being resumed from D3hot (Stanislaw Gruszka) Peer-to-peer DMA: - Use atomic XA allocation in RCU read section (Christophe JAILLET) ASPM: - Collect bits of ASPM-related code that we need even without CONFIG_PCIEASPM into aspm.c (David E. Box) - Save/restore L1 PM Substates config for suspend/resume (David E. Box) - Update save_save when ASPM config is changed, so a .slot_reset() during error recovery restores the changed config, not the .probe()-time config (Vidya Sagar) Endpoint framework: - Refactor and improve pci_epf_alloc_space() API (Niklas Cassel) - Clean up endpoint BAR descriptions (Niklas Cassel) - Fix ntb_register_device() name leak in error path (Yang Yingliang) - Return actual error code for pci_vntb_probe() failure (Yang Yingliang) Broadcom STB PCIe controller driver: - Fix MDIO write polling, which previously never waited for completion (Jonathan Bell) Cadence PCIe endpoint driver: - Clear the ARI "Next Function Number" of last function (Jasko-EXT Wojciech) Freescale i.MX6 PCIe controller driver: - Simplify by replacing switch statements with function pointers for different hardware variants (Frank Li) - Simplify by using clk_bulk*() API (Frank Li) - Remove redundant DT clock and reg/reg-name details (Frank Li) - Add i.MX95 DT and driver support for both Root Complex and Endpoint mode (Frank Li) Microsoft Hyper-V host bridge driver: - Reduce memory usage by limiting ring buffer size to 16KB instead of 4 pages (Michael Kelley) Qualcomm PCIe controller driver: - Add X1E80100 DT and driver support (Abel Vesa) - Add DT 'required-opps' for SoCs that require a minimum performance level (Johan Hovold) - Make DT 'msi-map-mask' optional, depending on how MSI interrupts are mapped (Johan Hovold) - Disable ASPM L0s for sc8280xp, sa8540p and sa8295p because the PHY configuration isn't tuned correctly for L0s (Johan Hovold) - Split dt-binding qcom,pcie.yaml into qcom,pcie-common.yaml and separate files for SA8775p, SC7280, SC8180X, SC8280XP, SM8150, SM8250, SM8350, SM8450, SM8550 for easier reviewing (Krzysztof Kozlowski) - Enable BDF to SID translation by disabling bypass mode (Manivannan Sadhasivam) - Add endpoint MHI support for Snapdragon SA8775P SoC (Mrinmay Sarkar) Synopsys DesignWare PCIe controller driver: - Allocate 64-bit MSI address if no 32-bit address is available (Ajay Agarwal) - Fix endpoint Resizable BAR to actually advertise the required 1MB size (Niklas Cassel) MicroSemi Switchtec management driver: - Release resources if the .probe() fails (Christophe JAILLET) Miscellaneous: - Make pcie_port_bus_type const (Ricardo B. Marliere)" * tag 'pci-v6.9-changes' of git://git.kernel.org/pub/scm/linux/kernel/git/pci/pci: (77 commits) PCI/ASPM: Update save_state when configuration changes PCI/ASPM: Disable L1 before configuring L1 Substates PCI/ASPM: Call pci_save_ltr_state() from pci_save_pcie_state() PCI/ASPM: Save L1 PM Substates Capability for suspend/resume PCI: hv: Fix ring buffer size calculation PCI: dwc: endpoint: Fix advertised resizable BAR size PCI: cadence: Clear the ARI Capability Next Function Number of the last function PCI: dwc: Strengthen the MSI address allocation logic PCI: brcmstb: Fix broken brcm_pcie_mdio_write() polling PCI: qcom: Add X1E80100 PCIe support dt-bindings: PCI: qcom: Document the X1E80100 PCIe Controller PCI: qcom: Enable BDF to SID translation properly PCI/AER: Generalize TLP Header Log reading PCI/AER: Use explicit register size for PCI_ERR_CAP PCI: qcom: Disable ASPM L0s for sc8280xp, sa8540p and sa8295p dt-bindings: PCI: qcom: Do not require 'msi-map-mask' dt-bindings: PCI: qcom: Allow 'required-opps' PCI/AER: Block runtime suspend when handling errors PCI/ASPM: Move pci_save_ltr_state() to aspm.c PCI/ASPM: Always build aspm.c ...
709 lines
22 KiB
C
709 lines
22 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* UEFI Common Platform Error Record (CPER) support
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*
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* Copyright (C) 2010, Intel Corp.
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* Author: Huang Ying <ying.huang@intel.com>
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*
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* CPER is the format used to describe platform hardware error by
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* various tables, such as ERST, BERT and HEST etc.
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*
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* For more information about CPER, please refer to Appendix N of UEFI
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* Specification version 2.4.
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*/
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/time.h>
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#include <linux/cper.h>
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#include <linux/dmi.h>
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#include <linux/acpi.h>
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#include <linux/pci.h>
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#include <linux/aer.h>
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#include <linux/printk.h>
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#include <linux/bcd.h>
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#include <acpi/ghes.h>
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#include <ras/ras_event.h>
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#include "cper_cxl.h"
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/*
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* CPER record ID need to be unique even after reboot, because record
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* ID is used as index for ERST storage, while CPER records from
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* multiple boot may co-exist in ERST.
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*/
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u64 cper_next_record_id(void)
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{
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static atomic64_t seq;
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if (!atomic64_read(&seq)) {
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time64_t time = ktime_get_real_seconds();
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/*
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* This code is unlikely to still be needed in year 2106,
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* but just in case, let's use a few more bits for timestamps
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* after y2038 to be sure they keep increasing monotonically
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* for the next few hundred years...
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*/
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if (time < 0x80000000)
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atomic64_set(&seq, (ktime_get_real_seconds()) << 32);
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else
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atomic64_set(&seq, 0x8000000000000000ull |
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ktime_get_real_seconds() << 24);
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}
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return atomic64_inc_return(&seq);
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}
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EXPORT_SYMBOL_GPL(cper_next_record_id);
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static const char * const severity_strs[] = {
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"recoverable",
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"fatal",
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"corrected",
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"info",
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};
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const char *cper_severity_str(unsigned int severity)
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{
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return severity < ARRAY_SIZE(severity_strs) ?
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severity_strs[severity] : "unknown";
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}
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EXPORT_SYMBOL_GPL(cper_severity_str);
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/*
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* cper_print_bits - print strings for set bits
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* @pfx: prefix for each line, including log level and prefix string
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* @bits: bit mask
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* @strs: string array, indexed by bit position
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* @strs_size: size of the string array: @strs
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*
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* For each set bit in @bits, print the corresponding string in @strs.
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* If the output length is longer than 80, multiple line will be
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* printed, with @pfx is printed at the beginning of each line.
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*/
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void cper_print_bits(const char *pfx, unsigned int bits,
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const char * const strs[], unsigned int strs_size)
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{
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int i, len = 0;
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const char *str;
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char buf[84];
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for (i = 0; i < strs_size; i++) {
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if (!(bits & (1U << i)))
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continue;
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str = strs[i];
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if (!str)
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continue;
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if (len && len + strlen(str) + 2 > 80) {
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printk("%s\n", buf);
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len = 0;
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}
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if (!len)
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len = snprintf(buf, sizeof(buf), "%s%s", pfx, str);
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else
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len += scnprintf(buf+len, sizeof(buf)-len, ", %s", str);
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}
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if (len)
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printk("%s\n", buf);
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}
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static const char * const proc_type_strs[] = {
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"IA32/X64",
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"IA64",
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"ARM",
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};
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static const char * const proc_isa_strs[] = {
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"IA32",
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"IA64",
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"X64",
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"ARM A32/T32",
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"ARM A64",
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};
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const char * const cper_proc_error_type_strs[] = {
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"cache error",
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"TLB error",
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"bus error",
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"micro-architectural error",
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};
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static const char * const proc_op_strs[] = {
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"unknown or generic",
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"data read",
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"data write",
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"instruction execution",
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};
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static const char * const proc_flag_strs[] = {
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"restartable",
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"precise IP",
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"overflow",
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"corrected",
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};
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static void cper_print_proc_generic(const char *pfx,
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const struct cper_sec_proc_generic *proc)
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{
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if (proc->validation_bits & CPER_PROC_VALID_TYPE)
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printk("%s""processor_type: %d, %s\n", pfx, proc->proc_type,
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proc->proc_type < ARRAY_SIZE(proc_type_strs) ?
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proc_type_strs[proc->proc_type] : "unknown");
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if (proc->validation_bits & CPER_PROC_VALID_ISA)
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printk("%s""processor_isa: %d, %s\n", pfx, proc->proc_isa,
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proc->proc_isa < ARRAY_SIZE(proc_isa_strs) ?
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proc_isa_strs[proc->proc_isa] : "unknown");
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if (proc->validation_bits & CPER_PROC_VALID_ERROR_TYPE) {
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printk("%s""error_type: 0x%02x\n", pfx, proc->proc_error_type);
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cper_print_bits(pfx, proc->proc_error_type,
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cper_proc_error_type_strs,
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ARRAY_SIZE(cper_proc_error_type_strs));
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}
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if (proc->validation_bits & CPER_PROC_VALID_OPERATION)
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printk("%s""operation: %d, %s\n", pfx, proc->operation,
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proc->operation < ARRAY_SIZE(proc_op_strs) ?
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proc_op_strs[proc->operation] : "unknown");
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if (proc->validation_bits & CPER_PROC_VALID_FLAGS) {
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printk("%s""flags: 0x%02x\n", pfx, proc->flags);
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cper_print_bits(pfx, proc->flags, proc_flag_strs,
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ARRAY_SIZE(proc_flag_strs));
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}
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if (proc->validation_bits & CPER_PROC_VALID_LEVEL)
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printk("%s""level: %d\n", pfx, proc->level);
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if (proc->validation_bits & CPER_PROC_VALID_VERSION)
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printk("%s""version_info: 0x%016llx\n", pfx, proc->cpu_version);
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if (proc->validation_bits & CPER_PROC_VALID_ID)
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printk("%s""processor_id: 0x%016llx\n", pfx, proc->proc_id);
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if (proc->validation_bits & CPER_PROC_VALID_TARGET_ADDRESS)
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printk("%s""target_address: 0x%016llx\n",
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pfx, proc->target_addr);
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if (proc->validation_bits & CPER_PROC_VALID_REQUESTOR_ID)
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printk("%s""requestor_id: 0x%016llx\n",
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pfx, proc->requestor_id);
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if (proc->validation_bits & CPER_PROC_VALID_RESPONDER_ID)
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printk("%s""responder_id: 0x%016llx\n",
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pfx, proc->responder_id);
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if (proc->validation_bits & CPER_PROC_VALID_IP)
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printk("%s""IP: 0x%016llx\n", pfx, proc->ip);
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}
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static const char * const mem_err_type_strs[] = {
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"unknown",
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"no error",
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"single-bit ECC",
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"multi-bit ECC",
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"single-symbol chipkill ECC",
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"multi-symbol chipkill ECC",
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"master abort",
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"target abort",
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"parity error",
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"watchdog timeout",
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"invalid address",
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"mirror Broken",
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"memory sparing",
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"scrub corrected error",
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"scrub uncorrected error",
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"physical memory map-out event",
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};
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const char *cper_mem_err_type_str(unsigned int etype)
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{
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return etype < ARRAY_SIZE(mem_err_type_strs) ?
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mem_err_type_strs[etype] : "unknown";
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}
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EXPORT_SYMBOL_GPL(cper_mem_err_type_str);
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const char *cper_mem_err_status_str(u64 status)
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{
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switch ((status >> 8) & 0xff) {
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case 1: return "Error detected internal to the component";
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case 4: return "Storage error in DRAM memory";
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case 5: return "Storage error in TLB";
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case 6: return "Storage error in cache";
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case 7: return "Error in one or more functional units";
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case 8: return "Component failed self test";
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case 9: return "Overflow or undervalue of internal queue";
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case 16: return "Error detected in the bus";
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case 17: return "Virtual address not found on IO-TLB or IO-PDIR";
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case 18: return "Improper access error";
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case 19: return "Access to a memory address which is not mapped to any component";
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case 20: return "Loss of Lockstep";
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case 21: return "Response not associated with a request";
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case 22: return "Bus parity error - must also set the A, C, or D Bits";
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case 23: return "Detection of a protocol error";
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case 24: return "Detection of a PATH_ERROR";
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case 25: return "Bus operation timeout";
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case 26: return "A read was issued to data that has been poisoned";
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default: return "Reserved";
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}
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}
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EXPORT_SYMBOL_GPL(cper_mem_err_status_str);
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int cper_mem_err_location(struct cper_mem_err_compact *mem, char *msg)
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{
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u32 len, n;
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if (!msg)
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return 0;
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n = 0;
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len = CPER_REC_LEN;
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if (mem->validation_bits & CPER_MEM_VALID_NODE)
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n += scnprintf(msg + n, len - n, "node:%d ", mem->node);
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if (mem->validation_bits & CPER_MEM_VALID_CARD)
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n += scnprintf(msg + n, len - n, "card:%d ", mem->card);
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if (mem->validation_bits & CPER_MEM_VALID_MODULE)
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n += scnprintf(msg + n, len - n, "module:%d ", mem->module);
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if (mem->validation_bits & CPER_MEM_VALID_RANK_NUMBER)
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n += scnprintf(msg + n, len - n, "rank:%d ", mem->rank);
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if (mem->validation_bits & CPER_MEM_VALID_BANK)
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n += scnprintf(msg + n, len - n, "bank:%d ", mem->bank);
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if (mem->validation_bits & CPER_MEM_VALID_BANK_GROUP)
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n += scnprintf(msg + n, len - n, "bank_group:%d ",
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mem->bank >> CPER_MEM_BANK_GROUP_SHIFT);
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if (mem->validation_bits & CPER_MEM_VALID_BANK_ADDRESS)
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n += scnprintf(msg + n, len - n, "bank_address:%d ",
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mem->bank & CPER_MEM_BANK_ADDRESS_MASK);
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if (mem->validation_bits & CPER_MEM_VALID_DEVICE)
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n += scnprintf(msg + n, len - n, "device:%d ", mem->device);
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if (mem->validation_bits & (CPER_MEM_VALID_ROW | CPER_MEM_VALID_ROW_EXT)) {
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u32 row = mem->row;
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row |= cper_get_mem_extension(mem->validation_bits, mem->extended);
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n += scnprintf(msg + n, len - n, "row:%d ", row);
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}
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if (mem->validation_bits & CPER_MEM_VALID_COLUMN)
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n += scnprintf(msg + n, len - n, "column:%d ", mem->column);
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if (mem->validation_bits & CPER_MEM_VALID_BIT_POSITION)
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n += scnprintf(msg + n, len - n, "bit_position:%d ",
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mem->bit_pos);
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if (mem->validation_bits & CPER_MEM_VALID_REQUESTOR_ID)
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n += scnprintf(msg + n, len - n, "requestor_id:0x%016llx ",
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mem->requestor_id);
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if (mem->validation_bits & CPER_MEM_VALID_RESPONDER_ID)
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n += scnprintf(msg + n, len - n, "responder_id:0x%016llx ",
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mem->responder_id);
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if (mem->validation_bits & CPER_MEM_VALID_TARGET_ID)
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n += scnprintf(msg + n, len - n, "target_id:0x%016llx ",
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mem->target_id);
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if (mem->validation_bits & CPER_MEM_VALID_CHIP_ID)
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n += scnprintf(msg + n, len - n, "chip_id:%d ",
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mem->extended >> CPER_MEM_CHIP_ID_SHIFT);
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return n;
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}
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EXPORT_SYMBOL_GPL(cper_mem_err_location);
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int cper_dimm_err_location(struct cper_mem_err_compact *mem, char *msg)
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{
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u32 len, n;
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const char *bank = NULL, *device = NULL;
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if (!msg || !(mem->validation_bits & CPER_MEM_VALID_MODULE_HANDLE))
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return 0;
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len = CPER_REC_LEN;
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dmi_memdev_name(mem->mem_dev_handle, &bank, &device);
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if (bank && device)
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n = snprintf(msg, len, "DIMM location: %s %s ", bank, device);
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else
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n = snprintf(msg, len,
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"DIMM location: not present. DMI handle: 0x%.4x ",
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mem->mem_dev_handle);
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return n;
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}
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EXPORT_SYMBOL_GPL(cper_dimm_err_location);
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void cper_mem_err_pack(const struct cper_sec_mem_err *mem,
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struct cper_mem_err_compact *cmem)
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{
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cmem->validation_bits = mem->validation_bits;
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cmem->node = mem->node;
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cmem->card = mem->card;
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cmem->module = mem->module;
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cmem->bank = mem->bank;
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cmem->device = mem->device;
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cmem->row = mem->row;
|
|
cmem->column = mem->column;
|
|
cmem->bit_pos = mem->bit_pos;
|
|
cmem->requestor_id = mem->requestor_id;
|
|
cmem->responder_id = mem->responder_id;
|
|
cmem->target_id = mem->target_id;
|
|
cmem->extended = mem->extended;
|
|
cmem->rank = mem->rank;
|
|
cmem->mem_array_handle = mem->mem_array_handle;
|
|
cmem->mem_dev_handle = mem->mem_dev_handle;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cper_mem_err_pack);
|
|
|
|
const char *cper_mem_err_unpack(struct trace_seq *p,
|
|
struct cper_mem_err_compact *cmem)
|
|
{
|
|
const char *ret = trace_seq_buffer_ptr(p);
|
|
char rcd_decode_str[CPER_REC_LEN];
|
|
|
|
if (cper_mem_err_location(cmem, rcd_decode_str))
|
|
trace_seq_printf(p, "%s", rcd_decode_str);
|
|
if (cper_dimm_err_location(cmem, rcd_decode_str))
|
|
trace_seq_printf(p, "%s", rcd_decode_str);
|
|
trace_seq_putc(p, '\0');
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void cper_print_mem(const char *pfx, const struct cper_sec_mem_err *mem,
|
|
int len)
|
|
{
|
|
struct cper_mem_err_compact cmem;
|
|
char rcd_decode_str[CPER_REC_LEN];
|
|
|
|
/* Don't trust UEFI 2.1/2.2 structure with bad validation bits */
|
|
if (len == sizeof(struct cper_sec_mem_err_old) &&
|
|
(mem->validation_bits & ~(CPER_MEM_VALID_RANK_NUMBER - 1))) {
|
|
pr_err(FW_WARN "valid bits set for fields beyond structure\n");
|
|
return;
|
|
}
|
|
if (mem->validation_bits & CPER_MEM_VALID_ERROR_STATUS)
|
|
printk("%s error_status: %s (0x%016llx)\n",
|
|
pfx, cper_mem_err_status_str(mem->error_status),
|
|
mem->error_status);
|
|
if (mem->validation_bits & CPER_MEM_VALID_PA)
|
|
printk("%s""physical_address: 0x%016llx\n",
|
|
pfx, mem->physical_addr);
|
|
if (mem->validation_bits & CPER_MEM_VALID_PA_MASK)
|
|
printk("%s""physical_address_mask: 0x%016llx\n",
|
|
pfx, mem->physical_addr_mask);
|
|
cper_mem_err_pack(mem, &cmem);
|
|
if (cper_mem_err_location(&cmem, rcd_decode_str))
|
|
printk("%s%s\n", pfx, rcd_decode_str);
|
|
if (mem->validation_bits & CPER_MEM_VALID_ERROR_TYPE) {
|
|
u8 etype = mem->error_type;
|
|
printk("%s""error_type: %d, %s\n", pfx, etype,
|
|
cper_mem_err_type_str(etype));
|
|
}
|
|
if (cper_dimm_err_location(&cmem, rcd_decode_str))
|
|
printk("%s%s\n", pfx, rcd_decode_str);
|
|
}
|
|
|
|
static const char * const pcie_port_type_strs[] = {
|
|
"PCIe end point",
|
|
"legacy PCI end point",
|
|
"unknown",
|
|
"unknown",
|
|
"root port",
|
|
"upstream switch port",
|
|
"downstream switch port",
|
|
"PCIe to PCI/PCI-X bridge",
|
|
"PCI/PCI-X to PCIe bridge",
|
|
"root complex integrated endpoint device",
|
|
"root complex event collector",
|
|
};
|
|
|
|
static void cper_print_pcie(const char *pfx, const struct cper_sec_pcie *pcie,
|
|
const struct acpi_hest_generic_data *gdata)
|
|
{
|
|
if (pcie->validation_bits & CPER_PCIE_VALID_PORT_TYPE)
|
|
printk("%s""port_type: %d, %s\n", pfx, pcie->port_type,
|
|
pcie->port_type < ARRAY_SIZE(pcie_port_type_strs) ?
|
|
pcie_port_type_strs[pcie->port_type] : "unknown");
|
|
if (pcie->validation_bits & CPER_PCIE_VALID_VERSION)
|
|
printk("%s""version: %d.%d\n", pfx,
|
|
pcie->version.major, pcie->version.minor);
|
|
if (pcie->validation_bits & CPER_PCIE_VALID_COMMAND_STATUS)
|
|
printk("%s""command: 0x%04x, status: 0x%04x\n", pfx,
|
|
pcie->command, pcie->status);
|
|
if (pcie->validation_bits & CPER_PCIE_VALID_DEVICE_ID) {
|
|
const __u8 *p;
|
|
printk("%s""device_id: %04x:%02x:%02x.%x\n", pfx,
|
|
pcie->device_id.segment, pcie->device_id.bus,
|
|
pcie->device_id.device, pcie->device_id.function);
|
|
printk("%s""slot: %d\n", pfx,
|
|
pcie->device_id.slot >> CPER_PCIE_SLOT_SHIFT);
|
|
printk("%s""secondary_bus: 0x%02x\n", pfx,
|
|
pcie->device_id.secondary_bus);
|
|
printk("%s""vendor_id: 0x%04x, device_id: 0x%04x\n", pfx,
|
|
pcie->device_id.vendor_id, pcie->device_id.device_id);
|
|
p = pcie->device_id.class_code;
|
|
printk("%s""class_code: %02x%02x%02x\n", pfx, p[2], p[1], p[0]);
|
|
}
|
|
if (pcie->validation_bits & CPER_PCIE_VALID_SERIAL_NUMBER)
|
|
printk("%s""serial number: 0x%04x, 0x%04x\n", pfx,
|
|
pcie->serial_number.lower, pcie->serial_number.upper);
|
|
if (pcie->validation_bits & CPER_PCIE_VALID_BRIDGE_CONTROL_STATUS)
|
|
printk(
|
|
"%s""bridge: secondary_status: 0x%04x, control: 0x%04x\n",
|
|
pfx, pcie->bridge.secondary_status, pcie->bridge.control);
|
|
|
|
/* Fatal errors call __ghes_panic() before AER handler prints this */
|
|
if ((pcie->validation_bits & CPER_PCIE_VALID_AER_INFO) &&
|
|
(gdata->error_severity & CPER_SEV_FATAL)) {
|
|
struct aer_capability_regs *aer;
|
|
|
|
aer = (struct aer_capability_regs *)pcie->aer_info;
|
|
printk("%saer_uncor_status: 0x%08x, aer_uncor_mask: 0x%08x\n",
|
|
pfx, aer->uncor_status, aer->uncor_mask);
|
|
printk("%saer_uncor_severity: 0x%08x\n",
|
|
pfx, aer->uncor_severity);
|
|
printk("%sTLP Header: %08x %08x %08x %08x\n", pfx,
|
|
aer->header_log.dw[0], aer->header_log.dw[1],
|
|
aer->header_log.dw[2], aer->header_log.dw[3]);
|
|
}
|
|
}
|
|
|
|
static const char * const fw_err_rec_type_strs[] = {
|
|
"IPF SAL Error Record",
|
|
"SOC Firmware Error Record Type1 (Legacy CrashLog Support)",
|
|
"SOC Firmware Error Record Type2",
|
|
};
|
|
|
|
static void cper_print_fw_err(const char *pfx,
|
|
struct acpi_hest_generic_data *gdata,
|
|
const struct cper_sec_fw_err_rec_ref *fw_err)
|
|
{
|
|
void *buf = acpi_hest_get_payload(gdata);
|
|
u32 offset, length = gdata->error_data_length;
|
|
|
|
printk("%s""Firmware Error Record Type: %s\n", pfx,
|
|
fw_err->record_type < ARRAY_SIZE(fw_err_rec_type_strs) ?
|
|
fw_err_rec_type_strs[fw_err->record_type] : "unknown");
|
|
printk("%s""Revision: %d\n", pfx, fw_err->revision);
|
|
|
|
/* Record Type based on UEFI 2.7 */
|
|
if (fw_err->revision == 0) {
|
|
printk("%s""Record Identifier: %08llx\n", pfx,
|
|
fw_err->record_identifier);
|
|
} else if (fw_err->revision == 2) {
|
|
printk("%s""Record Identifier: %pUl\n", pfx,
|
|
&fw_err->record_identifier_guid);
|
|
}
|
|
|
|
/*
|
|
* The FW error record may contain trailing data beyond the
|
|
* structure defined by the specification. As the fields
|
|
* defined (and hence the offset of any trailing data) vary
|
|
* with the revision, set the offset to account for this
|
|
* variation.
|
|
*/
|
|
if (fw_err->revision == 0) {
|
|
/* record_identifier_guid not defined */
|
|
offset = offsetof(struct cper_sec_fw_err_rec_ref,
|
|
record_identifier_guid);
|
|
} else if (fw_err->revision == 1) {
|
|
/* record_identifier not defined */
|
|
offset = offsetof(struct cper_sec_fw_err_rec_ref,
|
|
record_identifier);
|
|
} else {
|
|
offset = sizeof(*fw_err);
|
|
}
|
|
|
|
buf += offset;
|
|
length -= offset;
|
|
|
|
print_hex_dump(pfx, "", DUMP_PREFIX_OFFSET, 16, 4, buf, length, true);
|
|
}
|
|
|
|
static void cper_print_tstamp(const char *pfx,
|
|
struct acpi_hest_generic_data_v300 *gdata)
|
|
{
|
|
__u8 hour, min, sec, day, mon, year, century, *timestamp;
|
|
|
|
if (gdata->validation_bits & ACPI_HEST_GEN_VALID_TIMESTAMP) {
|
|
timestamp = (__u8 *)&(gdata->time_stamp);
|
|
sec = bcd2bin(timestamp[0]);
|
|
min = bcd2bin(timestamp[1]);
|
|
hour = bcd2bin(timestamp[2]);
|
|
day = bcd2bin(timestamp[4]);
|
|
mon = bcd2bin(timestamp[5]);
|
|
year = bcd2bin(timestamp[6]);
|
|
century = bcd2bin(timestamp[7]);
|
|
|
|
printk("%s%ststamp: %02d%02d-%02d-%02d %02d:%02d:%02d\n", pfx,
|
|
(timestamp[3] & 0x1 ? "precise " : "imprecise "),
|
|
century, year, mon, day, hour, min, sec);
|
|
}
|
|
}
|
|
|
|
struct ignore_section {
|
|
guid_t guid;
|
|
const char *name;
|
|
};
|
|
|
|
static const struct ignore_section ignore_sections[] = {
|
|
{ .guid = CPER_SEC_CXL_GEN_MEDIA_GUID, .name = "CXL General Media Event" },
|
|
{ .guid = CPER_SEC_CXL_DRAM_GUID, .name = "CXL DRAM Event" },
|
|
{ .guid = CPER_SEC_CXL_MEM_MODULE_GUID, .name = "CXL Memory Module Event" },
|
|
};
|
|
|
|
static void
|
|
cper_estatus_print_section(const char *pfx, struct acpi_hest_generic_data *gdata,
|
|
int sec_no)
|
|
{
|
|
guid_t *sec_type = (guid_t *)gdata->section_type;
|
|
__u16 severity;
|
|
char newpfx[64];
|
|
|
|
if (acpi_hest_get_version(gdata) >= 3)
|
|
cper_print_tstamp(pfx, (struct acpi_hest_generic_data_v300 *)gdata);
|
|
|
|
severity = gdata->error_severity;
|
|
printk("%s""Error %d, type: %s\n", pfx, sec_no,
|
|
cper_severity_str(severity));
|
|
if (gdata->validation_bits & CPER_SEC_VALID_FRU_ID)
|
|
printk("%s""fru_id: %pUl\n", pfx, gdata->fru_id);
|
|
if (gdata->validation_bits & CPER_SEC_VALID_FRU_TEXT)
|
|
printk("%s""fru_text: %.20s\n", pfx, gdata->fru_text);
|
|
|
|
snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
|
|
|
|
for (int i = 0; i < ARRAY_SIZE(ignore_sections); i++) {
|
|
if (guid_equal(sec_type, &ignore_sections[i].guid)) {
|
|
printk("%ssection_type: %s\n", newpfx, ignore_sections[i].name);
|
|
return;
|
|
}
|
|
}
|
|
|
|
if (guid_equal(sec_type, &CPER_SEC_PROC_GENERIC)) {
|
|
struct cper_sec_proc_generic *proc_err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%s""section_type: general processor error\n", newpfx);
|
|
if (gdata->error_data_length >= sizeof(*proc_err))
|
|
cper_print_proc_generic(newpfx, proc_err);
|
|
else
|
|
goto err_section_too_small;
|
|
} else if (guid_equal(sec_type, &CPER_SEC_PLATFORM_MEM)) {
|
|
struct cper_sec_mem_err *mem_err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%s""section_type: memory error\n", newpfx);
|
|
if (gdata->error_data_length >=
|
|
sizeof(struct cper_sec_mem_err_old))
|
|
cper_print_mem(newpfx, mem_err,
|
|
gdata->error_data_length);
|
|
else
|
|
goto err_section_too_small;
|
|
} else if (guid_equal(sec_type, &CPER_SEC_PCIE)) {
|
|
struct cper_sec_pcie *pcie = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%s""section_type: PCIe error\n", newpfx);
|
|
if (gdata->error_data_length >= sizeof(*pcie))
|
|
cper_print_pcie(newpfx, pcie, gdata);
|
|
else
|
|
goto err_section_too_small;
|
|
#if defined(CONFIG_ARM64) || defined(CONFIG_ARM)
|
|
} else if (guid_equal(sec_type, &CPER_SEC_PROC_ARM)) {
|
|
struct cper_sec_proc_arm *arm_err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%ssection_type: ARM processor error\n", newpfx);
|
|
if (gdata->error_data_length >= sizeof(*arm_err))
|
|
cper_print_proc_arm(newpfx, arm_err);
|
|
else
|
|
goto err_section_too_small;
|
|
#endif
|
|
#if defined(CONFIG_UEFI_CPER_X86)
|
|
} else if (guid_equal(sec_type, &CPER_SEC_PROC_IA)) {
|
|
struct cper_sec_proc_ia *ia_err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%ssection_type: IA32/X64 processor error\n", newpfx);
|
|
if (gdata->error_data_length >= sizeof(*ia_err))
|
|
cper_print_proc_ia(newpfx, ia_err);
|
|
else
|
|
goto err_section_too_small;
|
|
#endif
|
|
} else if (guid_equal(sec_type, &CPER_SEC_FW_ERR_REC_REF)) {
|
|
struct cper_sec_fw_err_rec_ref *fw_err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%ssection_type: Firmware Error Record Reference\n",
|
|
newpfx);
|
|
/* The minimal FW Error Record contains 16 bytes */
|
|
if (gdata->error_data_length >= SZ_16)
|
|
cper_print_fw_err(newpfx, gdata, fw_err);
|
|
else
|
|
goto err_section_too_small;
|
|
} else if (guid_equal(sec_type, &CPER_SEC_CXL_PROT_ERR)) {
|
|
struct cper_sec_prot_err *prot_err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%ssection_type: CXL Protocol Error\n", newpfx);
|
|
if (gdata->error_data_length >= sizeof(*prot_err))
|
|
cper_print_prot_err(newpfx, prot_err);
|
|
else
|
|
goto err_section_too_small;
|
|
} else {
|
|
const void *err = acpi_hest_get_payload(gdata);
|
|
|
|
printk("%ssection type: unknown, %pUl\n", newpfx, sec_type);
|
|
printk("%ssection length: %#x\n", newpfx,
|
|
gdata->error_data_length);
|
|
print_hex_dump(newpfx, "", DUMP_PREFIX_OFFSET, 16, 4, err,
|
|
gdata->error_data_length, true);
|
|
}
|
|
|
|
return;
|
|
|
|
err_section_too_small:
|
|
pr_err(FW_WARN "error section length is too small\n");
|
|
}
|
|
|
|
void cper_estatus_print(const char *pfx,
|
|
const struct acpi_hest_generic_status *estatus)
|
|
{
|
|
struct acpi_hest_generic_data *gdata;
|
|
int sec_no = 0;
|
|
char newpfx[64];
|
|
__u16 severity;
|
|
|
|
severity = estatus->error_severity;
|
|
if (severity == CPER_SEV_CORRECTED)
|
|
printk("%s%s\n", pfx,
|
|
"It has been corrected by h/w "
|
|
"and requires no further action");
|
|
printk("%s""event severity: %s\n", pfx, cper_severity_str(severity));
|
|
snprintf(newpfx, sizeof(newpfx), "%s ", pfx);
|
|
|
|
apei_estatus_for_each_section(estatus, gdata) {
|
|
cper_estatus_print_section(newpfx, gdata, sec_no);
|
|
sec_no++;
|
|
}
|
|
}
|
|
EXPORT_SYMBOL_GPL(cper_estatus_print);
|
|
|
|
int cper_estatus_check_header(const struct acpi_hest_generic_status *estatus)
|
|
{
|
|
if (estatus->data_length &&
|
|
estatus->data_length < sizeof(struct acpi_hest_generic_data))
|
|
return -EINVAL;
|
|
if (estatus->raw_data_length &&
|
|
estatus->raw_data_offset < sizeof(*estatus) + estatus->data_length)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cper_estatus_check_header);
|
|
|
|
int cper_estatus_check(const struct acpi_hest_generic_status *estatus)
|
|
{
|
|
struct acpi_hest_generic_data *gdata;
|
|
unsigned int data_len, record_size;
|
|
int rc;
|
|
|
|
rc = cper_estatus_check_header(estatus);
|
|
if (rc)
|
|
return rc;
|
|
|
|
data_len = estatus->data_length;
|
|
|
|
apei_estatus_for_each_section(estatus, gdata) {
|
|
if (acpi_hest_get_size(gdata) > data_len)
|
|
return -EINVAL;
|
|
|
|
record_size = acpi_hest_get_record_size(gdata);
|
|
if (record_size > data_len)
|
|
return -EINVAL;
|
|
|
|
data_len -= record_size;
|
|
}
|
|
if (data_len)
|
|
return -EINVAL;
|
|
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(cper_estatus_check);
|