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This is relatively easy since PMD's now cover exactly 4MB of memory. Our PMD entries are 32-bits each, so we use a special encoding. The lowest bit, PMD_ISHUGE, determines the interpretation. This is possible because sparc64's page tables are purely software entities so we can use whatever encoding scheme we want. We just have to make the TLB miss assembler page table walkers aware of the layout. set_pmd_at() works much like set_pte_at() but it has to operate in two page from a table of non-huge PTEs, so we have to queue up TLB flushes based upon what mappings are valid in the PTE table. In the second regime we are going from huge-page to non-huge-page, and in that case we need only queue up a single TLB flush to push out the huge page mapping. We still have 5 bits remaining in the huge PMD encoding so we can very likely support any new pieces of THP state tracking that might get added in the future. With lots of help from Johannes Weiner. Signed-off-by: David S. Miller <davem@davemloft.net> Cc: Andrea Arcangeli <aarcange@redhat.com> Cc: Johannes Weiner <hannes@cmpxchg.org> Cc: Gerald Schaefer <gerald.schaefer@de.ibm.com> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
189 lines
3.7 KiB
C
189 lines
3.7 KiB
C
/* arch/sparc64/mm/tlb.c
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*
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* Copyright (C) 2004 David S. Miller <davem@redhat.com>
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/percpu.h>
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#include <linux/mm.h>
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#include <linux/swap.h>
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#include <linux/preempt.h>
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#include <asm/pgtable.h>
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#include <asm/pgalloc.h>
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#include <asm/tlbflush.h>
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#include <asm/cacheflush.h>
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#include <asm/mmu_context.h>
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#include <asm/tlb.h>
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/* Heavily inspired by the ppc64 code. */
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static DEFINE_PER_CPU(struct tlb_batch, tlb_batch);
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void flush_tlb_pending(void)
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{
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struct tlb_batch *tb = &get_cpu_var(tlb_batch);
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if (tb->tlb_nr) {
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flush_tsb_user(tb);
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if (CTX_VALID(tb->mm->context)) {
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#ifdef CONFIG_SMP
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smp_flush_tlb_pending(tb->mm, tb->tlb_nr,
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&tb->vaddrs[0]);
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#else
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__flush_tlb_pending(CTX_HWBITS(tb->mm->context),
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tb->tlb_nr, &tb->vaddrs[0]);
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#endif
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}
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tb->tlb_nr = 0;
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}
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put_cpu_var(tlb_batch);
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}
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static void tlb_batch_add_one(struct mm_struct *mm, unsigned long vaddr,
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bool exec)
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{
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struct tlb_batch *tb = &get_cpu_var(tlb_batch);
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unsigned long nr;
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vaddr &= PAGE_MASK;
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if (exec)
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vaddr |= 0x1UL;
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nr = tb->tlb_nr;
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if (unlikely(nr != 0 && mm != tb->mm)) {
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flush_tlb_pending();
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nr = 0;
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}
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if (nr == 0)
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tb->mm = mm;
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tb->vaddrs[nr] = vaddr;
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tb->tlb_nr = ++nr;
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if (nr >= TLB_BATCH_NR)
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flush_tlb_pending();
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put_cpu_var(tlb_batch);
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}
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void tlb_batch_add(struct mm_struct *mm, unsigned long vaddr,
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pte_t *ptep, pte_t orig, int fullmm)
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{
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if (tlb_type != hypervisor &&
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pte_dirty(orig)) {
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unsigned long paddr, pfn = pte_pfn(orig);
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struct address_space *mapping;
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struct page *page;
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if (!pfn_valid(pfn))
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goto no_cache_flush;
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page = pfn_to_page(pfn);
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if (PageReserved(page))
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goto no_cache_flush;
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/* A real file page? */
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mapping = page_mapping(page);
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if (!mapping)
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goto no_cache_flush;
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paddr = (unsigned long) page_address(page);
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if ((paddr ^ vaddr) & (1 << 13))
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flush_dcache_page_all(mm, page);
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}
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no_cache_flush:
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if (!fullmm)
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tlb_batch_add_one(mm, vaddr, pte_exec(orig));
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}
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#ifdef CONFIG_TRANSPARENT_HUGEPAGE
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static void tlb_batch_pmd_scan(struct mm_struct *mm, unsigned long vaddr,
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pmd_t pmd, bool exec)
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{
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unsigned long end;
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pte_t *pte;
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pte = pte_offset_map(&pmd, vaddr);
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end = vaddr + HPAGE_SIZE;
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while (vaddr < end) {
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if (pte_val(*pte) & _PAGE_VALID)
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tlb_batch_add_one(mm, vaddr, exec);
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pte++;
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vaddr += PAGE_SIZE;
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}
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pte_unmap(pte);
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}
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void set_pmd_at(struct mm_struct *mm, unsigned long addr,
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pmd_t *pmdp, pmd_t pmd)
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{
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pmd_t orig = *pmdp;
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*pmdp = pmd;
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if (mm == &init_mm)
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return;
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if ((pmd_val(pmd) ^ pmd_val(orig)) & PMD_ISHUGE) {
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if (pmd_val(pmd) & PMD_ISHUGE)
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mm->context.huge_pte_count++;
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else
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mm->context.huge_pte_count--;
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if (mm->context.huge_pte_count == 1)
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hugetlb_setup(mm);
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}
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if (!pmd_none(orig)) {
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bool exec = ((pmd_val(orig) & PMD_HUGE_EXEC) != 0);
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addr &= HPAGE_MASK;
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if (pmd_val(orig) & PMD_ISHUGE)
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tlb_batch_add_one(mm, addr, exec);
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else
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tlb_batch_pmd_scan(mm, addr, orig, exec);
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}
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}
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void pgtable_trans_huge_deposit(struct mm_struct *mm, pgtable_t pgtable)
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{
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struct list_head *lh = (struct list_head *) pgtable;
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assert_spin_locked(&mm->page_table_lock);
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/* FIFO */
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if (!mm->pmd_huge_pte)
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INIT_LIST_HEAD(lh);
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else
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list_add(lh, (struct list_head *) mm->pmd_huge_pte);
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mm->pmd_huge_pte = pgtable;
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}
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pgtable_t pgtable_trans_huge_withdraw(struct mm_struct *mm)
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{
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struct list_head *lh;
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pgtable_t pgtable;
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assert_spin_locked(&mm->page_table_lock);
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/* FIFO */
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pgtable = mm->pmd_huge_pte;
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lh = (struct list_head *) pgtable;
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if (list_empty(lh))
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mm->pmd_huge_pte = NULL;
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else {
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mm->pmd_huge_pte = (pgtable_t) lh->next;
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list_del(lh);
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}
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pte_val(pgtable[0]) = 0;
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pte_val(pgtable[1]) = 0;
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return pgtable;
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}
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#endif /* CONFIG_TRANSPARENT_HUGEPAGE */
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