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4e2e7cfec1
Some pmics don't need backup interrupt settings, so we change to use pm notifier for the pmics which are necessary to store settings. Signed-off-by: Hsin-Hsiung Wang <hsin-hsiung.wang@mediatek.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
215 lines
5.1 KiB
C
215 lines
5.1 KiB
C
// SPDX-License-Identifier: GPL-2.0
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//
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// Copyright (c) 2019 MediaTek Inc.
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#include <linux/interrupt.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_device.h>
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#include <linux/of_irq.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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#include <linux/suspend.h>
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#include <linux/mfd/mt6323/core.h>
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#include <linux/mfd/mt6323/registers.h>
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#include <linux/mfd/mt6397/core.h>
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#include <linux/mfd/mt6397/registers.h>
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static void mt6397_irq_lock(struct irq_data *data)
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{
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struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
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mutex_lock(&mt6397->irqlock);
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}
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static void mt6397_irq_sync_unlock(struct irq_data *data)
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{
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struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
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regmap_write(mt6397->regmap, mt6397->int_con[0],
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mt6397->irq_masks_cur[0]);
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regmap_write(mt6397->regmap, mt6397->int_con[1],
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mt6397->irq_masks_cur[1]);
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mutex_unlock(&mt6397->irqlock);
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}
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static void mt6397_irq_disable(struct irq_data *data)
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{
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struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
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int shift = data->hwirq & 0xf;
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int reg = data->hwirq >> 4;
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mt6397->irq_masks_cur[reg] &= ~BIT(shift);
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}
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static void mt6397_irq_enable(struct irq_data *data)
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{
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struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(data);
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int shift = data->hwirq & 0xf;
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int reg = data->hwirq >> 4;
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mt6397->irq_masks_cur[reg] |= BIT(shift);
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}
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#ifdef CONFIG_PM_SLEEP
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static int mt6397_irq_set_wake(struct irq_data *irq_data, unsigned int on)
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{
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struct mt6397_chip *mt6397 = irq_data_get_irq_chip_data(irq_data);
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int shift = irq_data->hwirq & 0xf;
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int reg = irq_data->hwirq >> 4;
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if (on)
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mt6397->wake_mask[reg] |= BIT(shift);
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else
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mt6397->wake_mask[reg] &= ~BIT(shift);
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return 0;
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}
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#else
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#define mt6397_irq_set_wake NULL
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#endif
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static struct irq_chip mt6397_irq_chip = {
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.name = "mt6397-irq",
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.irq_bus_lock = mt6397_irq_lock,
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.irq_bus_sync_unlock = mt6397_irq_sync_unlock,
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.irq_enable = mt6397_irq_enable,
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.irq_disable = mt6397_irq_disable,
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.irq_set_wake = mt6397_irq_set_wake,
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};
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static void mt6397_irq_handle_reg(struct mt6397_chip *mt6397, int reg,
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int irqbase)
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{
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unsigned int status = 0;
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int i, irq, ret;
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ret = regmap_read(mt6397->regmap, reg, &status);
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if (ret) {
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dev_err(mt6397->dev, "Failed to read irq status: %d\n", ret);
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return;
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}
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for (i = 0; i < 16; i++) {
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if (status & BIT(i)) {
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irq = irq_find_mapping(mt6397->irq_domain, irqbase + i);
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if (irq)
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handle_nested_irq(irq);
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}
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}
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regmap_write(mt6397->regmap, reg, status);
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}
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static irqreturn_t mt6397_irq_thread(int irq, void *data)
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{
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struct mt6397_chip *mt6397 = data;
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mt6397_irq_handle_reg(mt6397, mt6397->int_status[0], 0);
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mt6397_irq_handle_reg(mt6397, mt6397->int_status[1], 16);
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return IRQ_HANDLED;
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}
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static int mt6397_irq_domain_map(struct irq_domain *d, unsigned int irq,
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irq_hw_number_t hw)
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{
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struct mt6397_chip *mt6397 = d->host_data;
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irq_set_chip_data(irq, mt6397);
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irq_set_chip_and_handler(irq, &mt6397_irq_chip, handle_level_irq);
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irq_set_nested_thread(irq, 1);
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irq_set_noprobe(irq);
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return 0;
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}
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static const struct irq_domain_ops mt6397_irq_domain_ops = {
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.map = mt6397_irq_domain_map,
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};
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static int mt6397_irq_pm_notifier(struct notifier_block *notifier,
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unsigned long pm_event, void *unused)
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{
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struct mt6397_chip *chip =
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container_of(notifier, struct mt6397_chip, pm_nb);
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switch (pm_event) {
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case PM_SUSPEND_PREPARE:
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regmap_write(chip->regmap,
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chip->int_con[0], chip->wake_mask[0]);
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regmap_write(chip->regmap,
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chip->int_con[1], chip->wake_mask[1]);
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enable_irq_wake(chip->irq);
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break;
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case PM_POST_SUSPEND:
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regmap_write(chip->regmap,
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chip->int_con[0], chip->irq_masks_cur[0]);
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regmap_write(chip->regmap,
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chip->int_con[1], chip->irq_masks_cur[1]);
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disable_irq_wake(chip->irq);
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break;
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default:
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break;
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}
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return NOTIFY_DONE;
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}
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int mt6397_irq_init(struct mt6397_chip *chip)
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{
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int ret;
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mutex_init(&chip->irqlock);
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switch (chip->chip_id) {
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case MT6323_CHIP_ID:
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chip->int_con[0] = MT6323_INT_CON0;
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chip->int_con[1] = MT6323_INT_CON1;
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chip->int_status[0] = MT6323_INT_STATUS0;
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chip->int_status[1] = MT6323_INT_STATUS1;
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break;
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case MT6391_CHIP_ID:
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case MT6397_CHIP_ID:
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chip->int_con[0] = MT6397_INT_CON0;
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chip->int_con[1] = MT6397_INT_CON1;
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chip->int_status[0] = MT6397_INT_STATUS0;
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chip->int_status[1] = MT6397_INT_STATUS1;
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break;
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default:
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dev_err(chip->dev, "unsupported chip: 0x%x\n", chip->chip_id);
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return -ENODEV;
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}
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/* Mask all interrupt sources */
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regmap_write(chip->regmap, chip->int_con[0], 0x0);
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regmap_write(chip->regmap, chip->int_con[1], 0x0);
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chip->pm_nb.notifier_call = mt6397_irq_pm_notifier;
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chip->irq_domain = irq_domain_add_linear(chip->dev->of_node,
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MT6397_IRQ_NR,
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&mt6397_irq_domain_ops,
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chip);
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if (!chip->irq_domain) {
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dev_err(chip->dev, "could not create irq domain\n");
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return -ENOMEM;
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}
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ret = devm_request_threaded_irq(chip->dev, chip->irq, NULL,
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mt6397_irq_thread, IRQF_ONESHOT,
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"mt6397-pmic", chip);
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if (ret) {
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dev_err(chip->dev, "failed to register irq=%d; err: %d\n",
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chip->irq, ret);
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return ret;
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}
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register_pm_notifier(&chip->pm_nb);
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return 0;
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}
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