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c2d476a98f
Make sure the duty-cycle and period passed in are not negative. This should eventually be made implicit by making them unsigned. While at it, the drivers' .config() implementations can have the equivalent checks removed. Signed-off-by: Thierry Reding <thierry.reding@avionic-design.de> Cc: Shawn Guo <shawn.guo@linaro.org> Cc: Mark Brown <broonie@opensource.wolfsonmicro.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Sachin Kamat <sachin.kamat@linaro.org> Cc: Axel Lin <axel.lin@gmail.com> Cc: Kukjin Kim <kgene.kim@samsung.com> Cc: Jingoo Han <jg1.han@samsung.com> Cc: Jonghwan Choi <jhbird.choi@samsung.com> Cc: Sascha Hauer <s.hauer@pengutronix.de> Cc: "Philip, Avinash" <avinashphilip@ti.com> Cc: Vaibhav Bedia <vaibhav.bedia@ti.com> Acked-by: Jingoo Han <jg1.han@samsung.com>
355 lines
7.9 KiB
C
355 lines
7.9 KiB
C
/* drivers/pwm/pwm-samsung.c
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*
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* Copyright (c) 2007 Ben Dooks
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* Copyright (c) 2008 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org>
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*
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* S3C series PWM device core
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License.
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*/
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#define pr_fmt(fmt) "pwm-samsung: " fmt
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#include <linux/export.h>
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#include <linux/kernel.h>
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#include <linux/platform_device.h>
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#include <linux/slab.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/pwm.h>
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#include <mach/map.h>
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#include <plat/regs-timer.h>
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struct s3c_chip {
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struct platform_device *pdev;
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struct clk *clk_div;
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struct clk *clk;
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const char *label;
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unsigned int period_ns;
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unsigned int duty_ns;
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unsigned char tcon_base;
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unsigned char pwm_id;
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struct pwm_chip chip;
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};
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#define to_s3c_chip(chip) container_of(chip, struct s3c_chip, chip)
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#define pwm_dbg(_pwm, msg...) dev_dbg(&(_pwm)->pdev->dev, msg)
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static struct clk *clk_scaler[2];
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static inline int pwm_is_tdiv(struct s3c_chip *chip)
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{
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return clk_get_parent(chip->clk) == chip->clk_div;
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}
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#define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0))
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#define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2))
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#define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3))
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#define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1))
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static int s3c_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct s3c_chip *s3c = to_s3c_chip(chip);
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unsigned long flags;
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unsigned long tcon;
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local_irq_save(flags);
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tcon = __raw_readl(S3C2410_TCON);
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tcon |= pwm_tcon_start(s3c);
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__raw_writel(tcon, S3C2410_TCON);
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local_irq_restore(flags);
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return 0;
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}
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static void s3c_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
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{
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struct s3c_chip *s3c = to_s3c_chip(chip);
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unsigned long flags;
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unsigned long tcon;
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local_irq_save(flags);
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tcon = __raw_readl(S3C2410_TCON);
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tcon &= ~pwm_tcon_start(s3c);
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__raw_writel(tcon, S3C2410_TCON);
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local_irq_restore(flags);
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}
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static unsigned long pwm_calc_tin(struct s3c_chip *s3c, unsigned long freq)
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{
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unsigned long tin_parent_rate;
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unsigned int div;
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tin_parent_rate = clk_get_rate(clk_get_parent(s3c->clk_div));
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pwm_dbg(s3c, "tin parent at %lu\n", tin_parent_rate);
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for (div = 2; div <= 16; div *= 2) {
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if ((tin_parent_rate / (div << 16)) < freq)
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return tin_parent_rate / div;
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}
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return tin_parent_rate / 16;
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}
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#define NS_IN_HZ (1000000000UL)
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static int s3c_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
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int duty_ns, int period_ns)
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{
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struct s3c_chip *s3c = to_s3c_chip(chip);
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unsigned long tin_rate;
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unsigned long tin_ns;
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unsigned long period;
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unsigned long flags;
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unsigned long tcon;
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unsigned long tcnt;
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long tcmp;
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/* We currently avoid using 64bit arithmetic by using the
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* fact that anything faster than 1Hz is easily representable
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* by 32bits. */
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if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ)
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return -ERANGE;
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if (period_ns == s3c->period_ns &&
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duty_ns == s3c->duty_ns)
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return 0;
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/* The TCMP and TCNT can be read without a lock, they're not
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* shared between the timers. */
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tcmp = __raw_readl(S3C2410_TCMPB(s3c->pwm_id));
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tcnt = __raw_readl(S3C2410_TCNTB(s3c->pwm_id));
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period = NS_IN_HZ / period_ns;
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pwm_dbg(s3c, "duty_ns=%d, period_ns=%d (%lu)\n",
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duty_ns, period_ns, period);
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/* Check to see if we are changing the clock rate of the PWM */
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if (s3c->period_ns != period_ns) {
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if (pwm_is_tdiv(s3c)) {
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tin_rate = pwm_calc_tin(s3c, period);
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clk_set_rate(s3c->clk_div, tin_rate);
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} else
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tin_rate = clk_get_rate(s3c->clk);
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s3c->period_ns = period_ns;
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pwm_dbg(s3c, "tin_rate=%lu\n", tin_rate);
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tin_ns = NS_IN_HZ / tin_rate;
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tcnt = period_ns / tin_ns;
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} else
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tin_ns = NS_IN_HZ / clk_get_rate(s3c->clk);
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/* Note, counters count down */
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tcmp = duty_ns / tin_ns;
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tcmp = tcnt - tcmp;
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/* the pwm hw only checks the compare register after a decrement,
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so the pin never toggles if tcmp = tcnt */
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if (tcmp == tcnt)
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tcmp--;
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pwm_dbg(s3c, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt);
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if (tcmp < 0)
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tcmp = 0;
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/* Update the PWM register block. */
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local_irq_save(flags);
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__raw_writel(tcmp, S3C2410_TCMPB(s3c->pwm_id));
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__raw_writel(tcnt, S3C2410_TCNTB(s3c->pwm_id));
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tcon = __raw_readl(S3C2410_TCON);
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tcon |= pwm_tcon_manulupdate(s3c);
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tcon |= pwm_tcon_autoreload(s3c);
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__raw_writel(tcon, S3C2410_TCON);
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tcon &= ~pwm_tcon_manulupdate(s3c);
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__raw_writel(tcon, S3C2410_TCON);
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local_irq_restore(flags);
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return 0;
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}
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static struct pwm_ops s3c_pwm_ops = {
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.enable = s3c_pwm_enable,
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.disable = s3c_pwm_disable,
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.config = s3c_pwm_config,
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.owner = THIS_MODULE,
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};
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static int s3c_pwm_probe(struct platform_device *pdev)
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{
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struct device *dev = &pdev->dev;
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struct s3c_chip *s3c;
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unsigned long flags;
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unsigned long tcon;
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unsigned int id = pdev->id;
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int ret;
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if (id == 4) {
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dev_err(dev, "TIMER4 is currently not supported\n");
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return -ENXIO;
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}
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s3c = devm_kzalloc(&pdev->dev, sizeof(*s3c), GFP_KERNEL);
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if (s3c == NULL) {
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dev_err(dev, "failed to allocate pwm_device\n");
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return -ENOMEM;
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}
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/* calculate base of control bits in TCON */
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s3c->tcon_base = id == 0 ? 0 : (id * 4) + 4;
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s3c->chip.dev = &pdev->dev;
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s3c->chip.ops = &s3c_pwm_ops;
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s3c->chip.base = -1;
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s3c->chip.npwm = 1;
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s3c->clk = devm_clk_get(dev, "pwm-tin");
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if (IS_ERR(s3c->clk)) {
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dev_err(dev, "failed to get pwm tin clk\n");
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return PTR_ERR(s3c->clk);
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}
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s3c->clk_div = devm_clk_get(dev, "pwm-tdiv");
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if (IS_ERR(s3c->clk_div)) {
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dev_err(dev, "failed to get pwm tdiv clk\n");
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return PTR_ERR(s3c->clk_div);
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}
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clk_enable(s3c->clk);
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clk_enable(s3c->clk_div);
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local_irq_save(flags);
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tcon = __raw_readl(S3C2410_TCON);
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tcon |= pwm_tcon_invert(s3c);
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__raw_writel(tcon, S3C2410_TCON);
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local_irq_restore(flags);
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ret = pwmchip_add(&s3c->chip);
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if (ret < 0) {
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dev_err(dev, "failed to register pwm\n");
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goto err_clk_tdiv;
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}
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pwm_dbg(s3c, "config bits %02x\n",
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(__raw_readl(S3C2410_TCON) >> s3c->tcon_base) & 0x0f);
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dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n",
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clk_get_rate(s3c->clk),
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clk_get_rate(s3c->clk_div),
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pwm_is_tdiv(s3c) ? "div" : "ext", s3c->tcon_base);
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platform_set_drvdata(pdev, s3c);
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return 0;
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err_clk_tdiv:
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clk_disable(s3c->clk_div);
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clk_disable(s3c->clk);
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return ret;
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}
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static int __devexit s3c_pwm_remove(struct platform_device *pdev)
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{
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struct s3c_chip *s3c = platform_get_drvdata(pdev);
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int err;
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err = pwmchip_remove(&s3c->chip);
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if (err < 0)
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return err;
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clk_disable(s3c->clk_div);
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clk_disable(s3c->clk);
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return 0;
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}
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#ifdef CONFIG_PM
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static int s3c_pwm_suspend(struct platform_device *pdev, pm_message_t state)
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{
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struct s3c_chip *s3c = platform_get_drvdata(pdev);
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/* No one preserve these values during suspend so reset them
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* Otherwise driver leaves PWM unconfigured if same values
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* passed to pwm_config
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*/
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s3c->period_ns = 0;
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s3c->duty_ns = 0;
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return 0;
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}
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static int s3c_pwm_resume(struct platform_device *pdev)
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{
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struct s3c_chip *s3c = platform_get_drvdata(pdev);
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unsigned long tcon;
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/* Restore invertion */
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tcon = __raw_readl(S3C2410_TCON);
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tcon |= pwm_tcon_invert(s3c);
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__raw_writel(tcon, S3C2410_TCON);
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return 0;
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}
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#else
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#define s3c_pwm_suspend NULL
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#define s3c_pwm_resume NULL
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#endif
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static struct platform_driver s3c_pwm_driver = {
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.driver = {
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.name = "s3c24xx-pwm",
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.owner = THIS_MODULE,
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},
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.probe = s3c_pwm_probe,
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.remove = __devexit_p(s3c_pwm_remove),
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.suspend = s3c_pwm_suspend,
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.resume = s3c_pwm_resume,
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};
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static int __init pwm_init(void)
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{
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int ret;
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clk_scaler[0] = clk_get(NULL, "pwm-scaler0");
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clk_scaler[1] = clk_get(NULL, "pwm-scaler1");
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if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) {
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pr_err("failed to get scaler clocks\n");
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return -EINVAL;
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}
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ret = platform_driver_register(&s3c_pwm_driver);
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if (ret)
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pr_err("failed to add pwm driver\n");
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return ret;
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}
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arch_initcall(pwm_init);
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