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cf5adce117
The bzero/memset implementation stays the same as Niagara-1. Signed-off-by: David S. Miller <davem@davemloft.net>
62 lines
1.5 KiB
ArmAsm
62 lines
1.5 KiB
ArmAsm
/* NG2page.S: Niagara-2 optimized clear and copy page.
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*
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* Copyright (C) 2007 (davem@davemloft.net)
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*/
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#include <asm/asi.h>
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#include <asm/page.h>
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#include <asm/visasm.h>
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.text
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.align 32
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/* This is heavily simplified from the sun4u variants
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* because Niagara-2 does not have any D-cache aliasing issues.
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*/
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NG2copy_user_page: /* %o0=dest, %o1=src, %o2=vaddr */
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prefetch [%o1 + 0x00], #one_read
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prefetch [%o1 + 0x40], #one_read
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VISEntryHalf
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set PAGE_SIZE, %g7
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sub %o0, %o1, %g3
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1: stxa %g0, [%o1 + %g3] ASI_BLK_INIT_QUAD_LDD_P
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subcc %g7, 64, %g7
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ldda [%o1] ASI_BLK_P, %f0
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stda %f0, [%o1 + %g3] ASI_BLK_P
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add %o1, 64, %o1
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bne,pt %xcc, 1b
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prefetch [%o1 + 0x40], #one_read
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membar #Sync
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VISExitHalf
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retl
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nop
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#define BRANCH_ALWAYS 0x10680000
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#define NOP 0x01000000
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#define NG_DO_PATCH(OLD, NEW) \
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sethi %hi(NEW), %g1; \
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or %g1, %lo(NEW), %g1; \
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sethi %hi(OLD), %g2; \
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or %g2, %lo(OLD), %g2; \
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sub %g1, %g2, %g1; \
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sethi %hi(BRANCH_ALWAYS), %g3; \
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sll %g1, 11, %g1; \
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srl %g1, 11 + 2, %g1; \
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or %g3, %lo(BRANCH_ALWAYS), %g3; \
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or %g3, %g1, %g3; \
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stw %g3, [%g2]; \
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sethi %hi(NOP), %g3; \
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or %g3, %lo(NOP), %g3; \
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stw %g3, [%g2 + 0x4]; \
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flush %g2;
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.globl niagara2_patch_pageops
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.type niagara2_patch_pageops,#function
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niagara2_patch_pageops:
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NG_DO_PATCH(copy_user_page, NG2copy_user_page)
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NG_DO_PATCH(_clear_page, NGclear_page)
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NG_DO_PATCH(clear_user_page, NGclear_user_page)
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retl
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nop
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.size niagara2_patch_pageops,.-niagara2_patch_pageops
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