Palmer Dabbelt 5dd6713331 RISC-V: probes: Treat the instruction stream as host-endian ... Neither of these are actually correct: the instruction stream is defined (for versions of the ISA manual newer than 2.2) as a stream of 16-bit little-endian parcels, which is different than just being little-endian. In theory we should represent this as a type, but we don't have any concrete plans for the big endian stuff so it doesn't seem worth the time -- we've got variants of this all over the place. Instead I'm just dropping the unnecessary type conversion, which is a NOP on LE systems but causes an sparse error as the types are all mixed up. Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com> Acked-by: Guo Ren <guoren@kernel.org> Signed-off-by: Palmer Dabbelt <palmerdabbelt@google.com>		2021-02-18 23:18:02 -08:00
..
decode-insn.c	RISC-V: probes: Treat the instruction stream as host-endian	2021-02-18 23:18:02 -08:00
decode-insn.h	riscv: Add kprobes supported	2021-01-14 15:09:06 -08:00
ftrace.c	riscv: Add KPROBES_ON_FTRACE supported	2021-01-14 15:09:07 -08:00
kprobes_trampoline.S	riscv: Add kprobes supported	2021-01-14 15:09:06 -08:00
kprobes.c	RISC-V: probes: Treat the instruction stream as host-endian	2021-02-18 23:18:02 -08:00
Makefile	riscv: Add uprobes supported	2021-01-14 15:09:08 -08:00
simulate-insn.c	riscv: Add kprobes supported	2021-01-14 15:09:06 -08:00
simulate-insn.h	riscv: Add kprobes supported	2021-01-14 15:09:06 -08:00
uprobes.c	riscv: Add uprobes supported	2021-01-14 15:09:08 -08:00