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a2e102e20f
Restore the host context when panicking from hyp to give the best chance of the panic being clean. The host requires that registers be preserved such as x18 for the shadow callstack. If the panic is caused by an exception from EL1, the host context is still valid so the panic can return straight back to the host. If the panic comes from EL2 then it's most likely that the hyp context is active and the host context needs to be restored. There are windows before and after the host context is saved and restored that restoration is attempted incorrectly and the panic won't be clean. Signed-off-by: Andrew Scull <ascull@google.com> Signed-off-by: Marc Zyngier <maz@kernel.org> Link: https://lore.kernel.org/r/20200915104643.2543892-14-ascull@google.com
102 lines
3.3 KiB
C
102 lines
3.3 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2015 - ARM Ltd
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* Author: Marc Zyngier <marc.zyngier@arm.com>
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*/
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#ifndef __ARM64_KVM_HYP_H__
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#define __ARM64_KVM_HYP_H__
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#include <linux/compiler.h>
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#include <linux/kvm_host.h>
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#include <asm/alternative.h>
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#include <asm/sysreg.h>
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DECLARE_PER_CPU(struct kvm_cpu_context, kvm_hyp_ctxt);
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DECLARE_PER_CPU(unsigned long, kvm_hyp_vector);
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#define read_sysreg_elx(r,nvh,vh) \
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({ \
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u64 reg; \
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asm volatile(ALTERNATIVE(__mrs_s("%0", r##nvh), \
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__mrs_s("%0", r##vh), \
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ARM64_HAS_VIRT_HOST_EXTN) \
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: "=r" (reg)); \
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reg; \
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})
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#define write_sysreg_elx(v,r,nvh,vh) \
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do { \
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u64 __val = (u64)(v); \
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asm volatile(ALTERNATIVE(__msr_s(r##nvh, "%x0"), \
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__msr_s(r##vh, "%x0"), \
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ARM64_HAS_VIRT_HOST_EXTN) \
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: : "rZ" (__val)); \
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} while (0)
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/*
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* Unified accessors for registers that have a different encoding
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* between VHE and non-VHE. They must be specified without their "ELx"
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* encoding, but with the SYS_ prefix, as defined in asm/sysreg.h.
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*/
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#define read_sysreg_el0(r) read_sysreg_elx(r, _EL0, _EL02)
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#define write_sysreg_el0(v,r) write_sysreg_elx(v, r, _EL0, _EL02)
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#define read_sysreg_el1(r) read_sysreg_elx(r, _EL1, _EL12)
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#define write_sysreg_el1(v,r) write_sysreg_elx(v, r, _EL1, _EL12)
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#define read_sysreg_el2(r) read_sysreg_elx(r, _EL2, _EL1)
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#define write_sysreg_el2(v,r) write_sysreg_elx(v, r, _EL2, _EL1)
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/*
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* Without an __arch_swab32(), we fall back to ___constant_swab32(), but the
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* static inline can allow the compiler to out-of-line this. KVM always wants
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* the macro version as its always inlined.
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*/
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#define __kvm_swab32(x) ___constant_swab32(x)
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int __vgic_v2_perform_cpuif_access(struct kvm_vcpu *vcpu);
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void __vgic_v3_save_state(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_restore_state(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_activate_traps(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_deactivate_traps(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_save_aprs(struct vgic_v3_cpu_if *cpu_if);
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void __vgic_v3_restore_aprs(struct vgic_v3_cpu_if *cpu_if);
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int __vgic_v3_perform_cpuif_access(struct kvm_vcpu *vcpu);
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __timer_enable_traps(struct kvm_vcpu *vcpu);
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void __timer_disable_traps(struct kvm_vcpu *vcpu);
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#endif
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __sysreg_save_state_nvhe(struct kvm_cpu_context *ctxt);
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void __sysreg_restore_state_nvhe(struct kvm_cpu_context *ctxt);
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#else
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void sysreg_save_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_host_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_save_guest_state_vhe(struct kvm_cpu_context *ctxt);
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void sysreg_restore_guest_state_vhe(struct kvm_cpu_context *ctxt);
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#endif
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void __debug_switch_to_guest(struct kvm_vcpu *vcpu);
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void __debug_switch_to_host(struct kvm_vcpu *vcpu);
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void __fpsimd_save_state(struct user_fpsimd_state *fp_regs);
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void __fpsimd_restore_state(struct user_fpsimd_state *fp_regs);
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#ifndef __KVM_NVHE_HYPERVISOR__
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void activate_traps_vhe_load(struct kvm_vcpu *vcpu);
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void deactivate_traps_vhe_put(void);
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#endif
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u64 __guest_enter(struct kvm_vcpu *vcpu);
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void __noreturn hyp_panic(void);
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#ifdef __KVM_NVHE_HYPERVISOR__
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void __noreturn __hyp_do_panic(bool restore_host, u64 spsr, u64 elr, u64 par);
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#endif
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#endif /* __ARM64_KVM_HYP_H__ */
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