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The IMX6Q/IMX6DL SoC's have a 2-bit temperature grade stored in OTP which is valid for all IMX6 SoC's (despite the fact that the IMXSDLRM and IMXSXRM do not document this - this has been proven via tests as well as verified by Freescale FAE). Instead of assuming a fixed 85C for passive cooling threshold and 105C for critical use the thermal grade for these configurations. We will set the critical to maxT - 5C and passive to maxT - 10C. Cc: Anson Huang <b20788@freescale.com> Cc: Fabio Estevam <fabio.estevam@freescale.com> Acked-by: Shawn Guo <shawn.guo@linaro.org> Acked-by: Jon Nettleton <jon@solid-run.com> Signed-off-by: Tim Harvey <tharvey@gateworks.com> ---- v3: - rebase against linux-soc-thermal.git - added ack's from Shawn and Jon v2: - remove check for IMX6Q and update comments: The OTP values have been tested on IMX6SOLO, IMX6DUALLITE, and IMX6SX and Freescale FAE has shared data with me that the OTP settings are the same and that the reference manuals will reflect this in their next updates. - set critical to max - 5C - set passive to max - 10C - display max temp in info - do not allow passive to be set above critical Signed-off-by: Eduardo Valentin <edubezval@gmail.com> |
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.. | ||
int340x_thermal | ||
samsung | ||
st | ||
ti-soc-thermal | ||
armada_thermal.c | ||
clock_cooling.c | ||
cpu_cooling.c | ||
db8500_cpufreq_cooling.c | ||
db8500_thermal.c | ||
devfreq_cooling.c | ||
dove_thermal.c | ||
fair_share.c | ||
gov_bang_bang.c | ||
hisi_thermal.c | ||
imx_thermal.c | ||
intel_pch_thermal.c | ||
intel_powerclamp.c | ||
intel_quark_dts_thermal.c | ||
intel_soc_dts_iosf.c | ||
intel_soc_dts_iosf.h | ||
intel_soc_dts_thermal.c | ||
Kconfig | ||
kirkwood_thermal.c | ||
Makefile | ||
of-thermal.c | ||
power_allocator.c | ||
qcom-spmi-temp-alarm.c | ||
rcar_thermal.c | ||
rockchip_thermal.c | ||
spear_thermal.c | ||
step_wise.c | ||
tegra_soctherm.c | ||
thermal_core.c | ||
thermal_core.h | ||
thermal_hwmon.c | ||
thermal_hwmon.h | ||
user_space.c | ||
x86_pkg_temp_thermal.c |