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In certain situations, such as when returning from low power modes, the EMIF must re-run hardware leveling to properly restore DDR3 access. This is accomplished by introducing a new ti-emif-sram-pm call, ti_emif_run_hw_leveling, to check if DDR3 is in use and if so, trigger the full write and read leveling processes. Suggested-by: Brad Griffis <bgriffis@ti.com> Signed-off-by: Dave Gerlach <d-gerlach@ti.com> Acked-by: Santosh Shilimkar <ssantosh@kernel.org> Signed-off-by: Tony Lindgren <tony@atomide.com>
360 lines
9.7 KiB
C
360 lines
9.7 KiB
C
/*
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* TI AM33XX SRAM EMIF Driver
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*
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* Copyright (C) 2016-2017 Texas Instruments Inc.
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* Dave Gerlach
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* version 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*/
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#include <linux/err.h>
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#include <linux/genalloc.h>
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#include <linux/io.h>
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#include <linux/kernel.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/of_platform.h>
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#include <linux/platform_device.h>
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#include <linux/sram.h>
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#include <linux/ti-emif-sram.h>
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#include "emif.h"
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#define TI_EMIF_SRAM_SYMBOL_OFFSET(sym) ((unsigned long)(sym) - \
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(unsigned long)&ti_emif_sram)
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#define EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES 0x00a0
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struct ti_emif_data {
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phys_addr_t ti_emif_sram_phys;
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phys_addr_t ti_emif_sram_data_phys;
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unsigned long ti_emif_sram_virt;
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unsigned long ti_emif_sram_data_virt;
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struct gen_pool *sram_pool_code;
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struct gen_pool *sram_pool_data;
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struct ti_emif_pm_data pm_data;
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struct ti_emif_pm_functions pm_functions;
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};
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static struct ti_emif_data *emif_instance;
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static u32 sram_suspend_address(struct ti_emif_data *emif_data,
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unsigned long addr)
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{
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return (emif_data->ti_emif_sram_virt +
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TI_EMIF_SRAM_SYMBOL_OFFSET(addr));
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}
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static phys_addr_t sram_resume_address(struct ti_emif_data *emif_data,
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unsigned long addr)
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{
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return ((unsigned long)emif_data->ti_emif_sram_phys +
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TI_EMIF_SRAM_SYMBOL_OFFSET(addr));
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}
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static void ti_emif_free_sram(struct ti_emif_data *emif_data)
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{
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gen_pool_free(emif_data->sram_pool_code, emif_data->ti_emif_sram_virt,
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ti_emif_sram_sz);
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gen_pool_free(emif_data->sram_pool_data,
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emif_data->ti_emif_sram_data_virt,
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sizeof(struct emif_regs_amx3));
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}
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static int ti_emif_alloc_sram(struct device *dev,
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struct ti_emif_data *emif_data)
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{
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struct device_node *np = dev->of_node;
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int ret;
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emif_data->sram_pool_code = of_gen_pool_get(np, "sram", 0);
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if (!emif_data->sram_pool_code) {
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dev_err(dev, "Unable to get sram pool for ocmcram code\n");
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return -ENODEV;
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}
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emif_data->ti_emif_sram_virt =
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gen_pool_alloc(emif_data->sram_pool_code,
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ti_emif_sram_sz);
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if (!emif_data->ti_emif_sram_virt) {
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dev_err(dev, "Unable to allocate code memory from ocmcram\n");
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return -ENOMEM;
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}
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/* Save physical address to calculate resume offset during pm init */
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emif_data->ti_emif_sram_phys =
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gen_pool_virt_to_phys(emif_data->sram_pool_code,
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emif_data->ti_emif_sram_virt);
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/* Get sram pool for data section and allocate space */
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emif_data->sram_pool_data = of_gen_pool_get(np, "sram", 1);
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if (!emif_data->sram_pool_data) {
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dev_err(dev, "Unable to get sram pool for ocmcram data\n");
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ret = -ENODEV;
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goto err_free_sram_code;
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}
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emif_data->ti_emif_sram_data_virt =
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gen_pool_alloc(emif_data->sram_pool_data,
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sizeof(struct emif_regs_amx3));
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if (!emif_data->ti_emif_sram_data_virt) {
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dev_err(dev, "Unable to allocate data memory from ocmcram\n");
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ret = -ENOMEM;
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goto err_free_sram_code;
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}
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/* Save physical address to calculate resume offset during pm init */
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emif_data->ti_emif_sram_data_phys =
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gen_pool_virt_to_phys(emif_data->sram_pool_data,
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emif_data->ti_emif_sram_data_virt);
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/*
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* These functions are called during suspend path while MMU is
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* still on so add virtual base to offset for absolute address
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*/
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emif_data->pm_functions.save_context =
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sram_suspend_address(emif_data,
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(unsigned long)ti_emif_save_context);
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emif_data->pm_functions.enter_sr =
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sram_suspend_address(emif_data,
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(unsigned long)ti_emif_enter_sr);
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emif_data->pm_functions.abort_sr =
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sram_suspend_address(emif_data,
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(unsigned long)ti_emif_abort_sr);
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/*
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* These are called during resume path when MMU is not enabled
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* so physical address is used instead
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*/
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emif_data->pm_functions.restore_context =
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sram_resume_address(emif_data,
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(unsigned long)ti_emif_restore_context);
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emif_data->pm_functions.exit_sr =
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sram_resume_address(emif_data,
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(unsigned long)ti_emif_exit_sr);
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emif_data->pm_functions.run_hw_leveling =
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sram_resume_address(emif_data,
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(unsigned long)ti_emif_run_hw_leveling);
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emif_data->pm_data.regs_virt =
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(struct emif_regs_amx3 *)emif_data->ti_emif_sram_data_virt;
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emif_data->pm_data.regs_phys = emif_data->ti_emif_sram_data_phys;
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return 0;
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err_free_sram_code:
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gen_pool_free(emif_data->sram_pool_code, emif_data->ti_emif_sram_virt,
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ti_emif_sram_sz);
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return ret;
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}
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static int ti_emif_push_sram(struct device *dev, struct ti_emif_data *emif_data)
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{
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void *copy_addr;
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u32 data_addr;
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copy_addr = sram_exec_copy(emif_data->sram_pool_code,
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(void *)emif_data->ti_emif_sram_virt,
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&ti_emif_sram, ti_emif_sram_sz);
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if (!copy_addr) {
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dev_err(dev, "Cannot copy emif code to sram\n");
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return -ENODEV;
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}
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data_addr = sram_suspend_address(emif_data,
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(unsigned long)&ti_emif_pm_sram_data);
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copy_addr = sram_exec_copy(emif_data->sram_pool_code,
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(void *)data_addr,
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&emif_data->pm_data,
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sizeof(emif_data->pm_data));
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if (!copy_addr) {
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dev_err(dev, "Cannot copy emif data to code sram\n");
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return -ENODEV;
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}
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return 0;
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}
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/*
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* Due to Usage Note 3.1.2 "DDR3: JEDEC Compliance for Maximum
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* Self-Refresh Command Limit" found in AM335x Silicon Errata
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* (Document SPRZ360F Revised November 2013) we must configure
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* the self refresh delay timer to 0xA (8192 cycles) to avoid
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* generating too many refresh command from the EMIF.
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*/
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static void ti_emif_configure_sr_delay(struct ti_emif_data *emif_data)
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{
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writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES,
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(emif_data->pm_data.ti_emif_base_addr_virt +
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EMIF_POWER_MANAGEMENT_CONTROL));
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writel(EMIF_POWER_MGMT_WAIT_SELF_REFRESH_8192_CYCLES,
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(emif_data->pm_data.ti_emif_base_addr_virt +
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EMIF_POWER_MANAGEMENT_CTRL_SHDW));
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}
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/**
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* ti_emif_copy_pm_function_table - copy mapping of pm funcs in sram
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* @sram_pool: pointer to struct gen_pool where dst resides
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* @dst: void * to address that table should be copied
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*
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* Returns 0 if success other error code if table is not available
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*/
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int ti_emif_copy_pm_function_table(struct gen_pool *sram_pool, void *dst)
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{
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void *copy_addr;
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if (!emif_instance)
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return -ENODEV;
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copy_addr = sram_exec_copy(sram_pool, dst,
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&emif_instance->pm_functions,
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sizeof(emif_instance->pm_functions));
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if (!copy_addr)
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return -ENODEV;
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return 0;
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}
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EXPORT_SYMBOL_GPL(ti_emif_copy_pm_function_table);
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/**
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* ti_emif_get_mem_type - return type for memory type in use
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*
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* Returns memory type value read from EMIF or error code if fails
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*/
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int ti_emif_get_mem_type(void)
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{
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unsigned long temp;
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if (!emif_instance)
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return -ENODEV;
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temp = readl(emif_instance->pm_data.ti_emif_base_addr_virt +
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EMIF_SDRAM_CONFIG);
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temp = (temp & SDRAM_TYPE_MASK) >> SDRAM_TYPE_SHIFT;
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return temp;
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}
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EXPORT_SYMBOL_GPL(ti_emif_get_mem_type);
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static const struct of_device_id ti_emif_of_match[] = {
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{ .compatible = "ti,emif-am3352", .data =
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(void *)EMIF_SRAM_AM33_REG_LAYOUT, },
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{ .compatible = "ti,emif-am4372", .data =
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(void *)EMIF_SRAM_AM43_REG_LAYOUT, },
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{},
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};
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MODULE_DEVICE_TABLE(of, ti_emif_of_match);
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#ifdef CONFIG_PM_SLEEP
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static int ti_emif_resume(struct device *dev)
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{
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unsigned long tmp =
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__raw_readl((void *)emif_instance->ti_emif_sram_virt);
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/*
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* Check to see if what we are copying is already present in the
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* first byte at the destination, only copy if it is not which
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* indicates we have lost context and sram no longer contains
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* the PM code
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*/
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if (tmp != ti_emif_sram)
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ti_emif_push_sram(dev, emif_instance);
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return 0;
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}
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static int ti_emif_suspend(struct device *dev)
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{
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/*
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* The contents will be present in DDR hence no need to
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* explicitly save
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*/
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return 0;
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}
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#endif /* CONFIG_PM_SLEEP */
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static int ti_emif_probe(struct platform_device *pdev)
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{
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int ret;
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struct resource *res;
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struct device *dev = &pdev->dev;
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const struct of_device_id *match;
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struct ti_emif_data *emif_data;
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emif_data = devm_kzalloc(dev, sizeof(*emif_data), GFP_KERNEL);
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if (!emif_data)
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return -ENOMEM;
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match = of_match_device(ti_emif_of_match, &pdev->dev);
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if (!match)
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return -ENODEV;
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emif_data->pm_data.ti_emif_sram_config = (unsigned long)match->data;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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emif_data->pm_data.ti_emif_base_addr_virt = devm_ioremap_resource(dev,
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res);
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if (IS_ERR(emif_data->pm_data.ti_emif_base_addr_virt)) {
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ret = PTR_ERR(emif_data->pm_data.ti_emif_base_addr_virt);
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return ret;
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}
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emif_data->pm_data.ti_emif_base_addr_phys = res->start;
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ti_emif_configure_sr_delay(emif_data);
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ret = ti_emif_alloc_sram(dev, emif_data);
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if (ret)
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return ret;
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ret = ti_emif_push_sram(dev, emif_data);
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if (ret)
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goto fail_free_sram;
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emif_instance = emif_data;
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return 0;
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fail_free_sram:
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ti_emif_free_sram(emif_data);
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return ret;
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}
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static int ti_emif_remove(struct platform_device *pdev)
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{
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struct ti_emif_data *emif_data = emif_instance;
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emif_instance = NULL;
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ti_emif_free_sram(emif_data);
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return 0;
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}
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static const struct dev_pm_ops ti_emif_pm_ops = {
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SET_SYSTEM_SLEEP_PM_OPS(ti_emif_suspend, ti_emif_resume)
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};
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static struct platform_driver ti_emif_driver = {
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.probe = ti_emif_probe,
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.remove = ti_emif_remove,
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.driver = {
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.name = KBUILD_MODNAME,
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.of_match_table = of_match_ptr(ti_emif_of_match),
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.pm = &ti_emif_pm_ops,
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},
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};
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module_platform_driver(ti_emif_driver);
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MODULE_AUTHOR("Dave Gerlach <d-gerlach@ti.com>");
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MODULE_DESCRIPTION("Texas Instruments SRAM EMIF driver");
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MODULE_LICENSE("GPL v2");
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