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f94909ceb1
Replace all ret/retq instructions with RET in preparation of making RET a macro. Since AS is case insensitive it's a big no-op without RET defined. find arch/x86/ -name \*.S | while read file do sed -i 's/\<ret[q]*\>/RET/' $file done Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Signed-off-by: Borislav Petkov <bp@suse.de> Link: https://lore.kernel.org/r/20211204134907.905503893@infradead.org
208 lines
6.2 KiB
ArmAsm
208 lines
6.2 KiB
ArmAsm
/* SPDX-License-Identifier: GPL-2.0 */
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.file "wm_shrx.S"
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/*---------------------------------------------------------------------------+
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| wm_shrx.S |
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| 64 bit right shift functions |
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| Copyright (C) 1992,1995 |
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| W. Metzenthen, 22 Parker St, Ormond, Vic 3163, |
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| Australia. E-mail billm@jacobi.maths.monash.edu.au |
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| Call from C as: |
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| unsigned FPU_shrx(void *arg1, unsigned arg2) |
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| and |
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| unsigned FPU_shrxs(void *arg1, unsigned arg2) |
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+---------------------------------------------------------------------------*/
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#include "fpu_emu.h"
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.text
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/*---------------------------------------------------------------------------+
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| unsigned FPU_shrx(void *arg1, unsigned arg2) |
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| Extended shift right function. |
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| Fastest for small shifts. |
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| Shifts the 64 bit quantity pointed to by the first arg (arg1) |
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| right by the number of bits specified by the second arg (arg2). |
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| Forms a 96 bit quantity from the 64 bit arg and eax: |
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| [ 64 bit arg ][ eax ] |
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| shift right ---------> |
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| The eax register is initialized to 0 before the shifting. |
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| Results returned in the 64 bit arg and eax. |
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+---------------------------------------------------------------------------*/
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SYM_FUNC_START(FPU_shrx)
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push %ebp
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movl %esp,%ebp
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pushl %esi
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movl PARAM2,%ecx
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movl PARAM1,%esi
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cmpl $32,%ecx /* shrd only works for 0..31 bits */
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jnc L_more_than_31
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/* less than 32 bits */
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pushl %ebx
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movl (%esi),%ebx /* lsl */
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movl 4(%esi),%edx /* msl */
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xorl %eax,%eax /* extension */
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shrd %cl,%ebx,%eax
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shrd %cl,%edx,%ebx
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shr %cl,%edx
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movl %ebx,(%esi)
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movl %edx,4(%esi)
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popl %ebx
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popl %esi
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leave
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RET
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L_more_than_31:
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cmpl $64,%ecx
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jnc L_more_than_63
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subb $32,%cl
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movl (%esi),%eax /* lsl */
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movl 4(%esi),%edx /* msl */
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shrd %cl,%edx,%eax
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shr %cl,%edx
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movl %edx,(%esi)
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movl $0,4(%esi)
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popl %esi
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leave
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RET
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L_more_than_63:
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cmpl $96,%ecx
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jnc L_more_than_95
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subb $64,%cl
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movl 4(%esi),%eax /* msl */
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shr %cl,%eax
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xorl %edx,%edx
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movl %edx,(%esi)
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movl %edx,4(%esi)
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popl %esi
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leave
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RET
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L_more_than_95:
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xorl %eax,%eax
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movl %eax,(%esi)
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movl %eax,4(%esi)
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popl %esi
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leave
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RET
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SYM_FUNC_END(FPU_shrx)
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/*---------------------------------------------------------------------------+
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| unsigned FPU_shrxs(void *arg1, unsigned arg2) |
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| Extended shift right function (optimized for small floating point |
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| integers). |
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| Shifts the 64 bit quantity pointed to by the first arg (arg1) |
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| right by the number of bits specified by the second arg (arg2). |
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| Forms a 96 bit quantity from the 64 bit arg and eax: |
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| [ 64 bit arg ][ eax ] |
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| shift right ---------> |
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| The eax register is initialized to 0 before the shifting. |
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| The lower 8 bits of eax are lost and replaced by a flag which is |
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| set (to 0x01) if any bit, apart from the first one, is set in the |
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| part which has been shifted out of the arg. |
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| Results returned in the 64 bit arg and eax. |
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+---------------------------------------------------------------------------*/
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SYM_FUNC_START(FPU_shrxs)
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push %ebp
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movl %esp,%ebp
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pushl %esi
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pushl %ebx
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movl PARAM2,%ecx
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movl PARAM1,%esi
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cmpl $64,%ecx /* shrd only works for 0..31 bits */
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jnc Ls_more_than_63
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cmpl $32,%ecx /* shrd only works for 0..31 bits */
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jc Ls_less_than_32
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/* We got here without jumps by assuming that the most common requirement
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is for small integers */
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/* Shift by [32..63] bits */
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subb $32,%cl
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movl (%esi),%eax /* lsl */
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movl 4(%esi),%edx /* msl */
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xorl %ebx,%ebx
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shrd %cl,%eax,%ebx
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shrd %cl,%edx,%eax
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shr %cl,%edx
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orl %ebx,%ebx /* test these 32 bits */
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setne %bl
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test $0x7fffffff,%eax /* and 31 bits here */
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setne %bh
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orw %bx,%bx /* Any of the 63 bit set ? */
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setne %al
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movl %edx,(%esi)
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movl $0,4(%esi)
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popl %ebx
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popl %esi
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leave
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RET
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/* Shift by [0..31] bits */
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Ls_less_than_32:
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movl (%esi),%ebx /* lsl */
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movl 4(%esi),%edx /* msl */
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xorl %eax,%eax /* extension */
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shrd %cl,%ebx,%eax
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shrd %cl,%edx,%ebx
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shr %cl,%edx
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test $0x7fffffff,%eax /* only need to look at eax here */
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setne %al
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movl %ebx,(%esi)
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movl %edx,4(%esi)
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popl %ebx
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popl %esi
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leave
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RET
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/* Shift by [64..95] bits */
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Ls_more_than_63:
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cmpl $96,%ecx
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jnc Ls_more_than_95
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subb $64,%cl
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movl (%esi),%ebx /* lsl */
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movl 4(%esi),%eax /* msl */
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xorl %edx,%edx /* extension */
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shrd %cl,%ebx,%edx
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shrd %cl,%eax,%ebx
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shr %cl,%eax
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orl %ebx,%edx
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setne %bl
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test $0x7fffffff,%eax /* only need to look at eax here */
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setne %bh
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orw %bx,%bx
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setne %al
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xorl %edx,%edx
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movl %edx,(%esi) /* set to zero */
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movl %edx,4(%esi) /* set to zero */
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popl %ebx
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popl %esi
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leave
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RET
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Ls_more_than_95:
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/* Shift by [96..inf) bits */
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xorl %eax,%eax
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movl (%esi),%ebx
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orl 4(%esi),%ebx
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setne %al
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xorl %ebx,%ebx
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movl %ebx,(%esi)
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movl %ebx,4(%esi)
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popl %ebx
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popl %esi
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leave
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RET
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SYM_FUNC_END(FPU_shrxs)
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