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7e99a9b2b5
There appears to be some kind of switch on certain chips to control whether the DP auxch or traditional i2c bus will be operational on a connector, this commit hopefully fixes nouveau to do the right thing. Likely only relevent on chips with DP outputs. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
281 lines
6.7 KiB
C
281 lines
6.7 KiB
C
/*
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* Copyright 2009 Red Hat Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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* Authors: Ben Skeggs
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*/
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#include "drmP.h"
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#include "nouveau_drv.h"
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#include "nouveau_i2c.h"
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#include "nouveau_hw.h"
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static void
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nv04_i2c_setscl(void *data, int state)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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uint8_t val;
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val = (NVReadVgaCrtc(dev, 0, i2c->wr) & 0xd0) | (state ? 0x20 : 0);
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NVWriteVgaCrtc(dev, 0, i2c->wr, val | 0x01);
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}
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static void
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nv04_i2c_setsda(void *data, int state)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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uint8_t val;
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val = (NVReadVgaCrtc(dev, 0, i2c->wr) & 0xe0) | (state ? 0x10 : 0);
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NVWriteVgaCrtc(dev, 0, i2c->wr, val | 0x01);
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}
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static int
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nv04_i2c_getscl(void *data)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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return !!(NVReadVgaCrtc(dev, 0, i2c->rd) & 4);
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}
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static int
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nv04_i2c_getsda(void *data)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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return !!(NVReadVgaCrtc(dev, 0, i2c->rd) & 8);
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}
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static void
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nv4e_i2c_setscl(void *data, int state)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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uint8_t val;
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val = (nv_rd32(dev, i2c->wr) & 0xd0) | (state ? 0x20 : 0);
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nv_wr32(dev, i2c->wr, val | 0x01);
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}
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static void
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nv4e_i2c_setsda(void *data, int state)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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uint8_t val;
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val = (nv_rd32(dev, i2c->wr) & 0xe0) | (state ? 0x10 : 0);
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nv_wr32(dev, i2c->wr, val | 0x01);
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}
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static int
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nv4e_i2c_getscl(void *data)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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return !!((nv_rd32(dev, i2c->rd) >> 16) & 4);
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}
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static int
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nv4e_i2c_getsda(void *data)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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return !!((nv_rd32(dev, i2c->rd) >> 16) & 8);
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}
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static int
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nv50_i2c_getscl(void *data)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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return !!(nv_rd32(dev, i2c->rd) & 1);
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}
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static int
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nv50_i2c_getsda(void *data)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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return !!(nv_rd32(dev, i2c->rd) & 2);
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}
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static void
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nv50_i2c_setscl(void *data, int state)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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nv_wr32(dev, i2c->wr, 4 | (i2c->data ? 2 : 0) | (state ? 1 : 0));
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}
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static void
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nv50_i2c_setsda(void *data, int state)
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{
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struct nouveau_i2c_chan *i2c = data;
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struct drm_device *dev = i2c->dev;
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nv_wr32(dev, i2c->wr,
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(nv_rd32(dev, i2c->rd) & 1) | 4 | (state ? 2 : 0));
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i2c->data = state;
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}
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static const uint32_t nv50_i2c_port[] = {
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0x00e138, 0x00e150, 0x00e168, 0x00e180,
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0x00e254, 0x00e274, 0x00e764, 0x00e780,
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0x00e79c, 0x00e7b8
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};
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#define NV50_I2C_PORTS ARRAY_SIZE(nv50_i2c_port)
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int
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nouveau_i2c_init(struct drm_device *dev, struct dcb_i2c_entry *entry, int index)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct nouveau_i2c_chan *i2c;
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int ret;
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if (entry->chan)
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return -EEXIST;
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if (dev_priv->card_type == NV_50 && entry->read >= NV50_I2C_PORTS) {
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NV_ERROR(dev, "unknown i2c port %d\n", entry->read);
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return -EINVAL;
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}
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i2c = kzalloc(sizeof(*i2c), GFP_KERNEL);
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if (i2c == NULL)
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return -ENOMEM;
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switch (entry->port_type) {
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case 0:
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i2c->algo.bit.setsda = nv04_i2c_setsda;
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i2c->algo.bit.setscl = nv04_i2c_setscl;
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i2c->algo.bit.getsda = nv04_i2c_getsda;
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i2c->algo.bit.getscl = nv04_i2c_getscl;
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i2c->rd = entry->read;
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i2c->wr = entry->write;
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break;
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case 4:
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i2c->algo.bit.setsda = nv4e_i2c_setsda;
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i2c->algo.bit.setscl = nv4e_i2c_setscl;
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i2c->algo.bit.getsda = nv4e_i2c_getsda;
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i2c->algo.bit.getscl = nv4e_i2c_getscl;
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i2c->rd = 0x600800 + entry->read;
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i2c->wr = 0x600800 + entry->write;
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break;
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case 5:
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i2c->algo.bit.setsda = nv50_i2c_setsda;
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i2c->algo.bit.setscl = nv50_i2c_setscl;
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i2c->algo.bit.getsda = nv50_i2c_getsda;
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i2c->algo.bit.getscl = nv50_i2c_getscl;
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i2c->rd = nv50_i2c_port[entry->read];
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i2c->wr = i2c->rd;
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break;
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case 6:
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i2c->rd = entry->read;
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i2c->wr = entry->write;
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break;
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default:
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NV_ERROR(dev, "DCB I2C port type %d unknown\n",
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entry->port_type);
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kfree(i2c);
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return -EINVAL;
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}
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snprintf(i2c->adapter.name, sizeof(i2c->adapter.name),
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"nouveau-%s-%d", pci_name(dev->pdev), index);
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i2c->adapter.owner = THIS_MODULE;
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i2c->adapter.dev.parent = &dev->pdev->dev;
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i2c->dev = dev;
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i2c_set_adapdata(&i2c->adapter, i2c);
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if (entry->port_type < 6) {
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i2c->adapter.algo_data = &i2c->algo.bit;
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i2c->algo.bit.udelay = 40;
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i2c->algo.bit.timeout = usecs_to_jiffies(5000);
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i2c->algo.bit.data = i2c;
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ret = i2c_bit_add_bus(&i2c->adapter);
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} else {
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i2c->adapter.algo_data = &i2c->algo.dp;
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i2c->algo.dp.running = false;
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i2c->algo.dp.address = 0;
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i2c->algo.dp.aux_ch = nouveau_dp_i2c_aux_ch;
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ret = i2c_dp_aux_add_bus(&i2c->adapter);
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}
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if (ret) {
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NV_ERROR(dev, "Failed to register i2c %d\n", index);
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kfree(i2c);
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return ret;
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}
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entry->chan = i2c;
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return 0;
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}
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void
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nouveau_i2c_fini(struct drm_device *dev, struct dcb_i2c_entry *entry)
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{
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if (!entry->chan)
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return;
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i2c_del_adapter(&entry->chan->adapter);
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kfree(entry->chan);
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entry->chan = NULL;
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}
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struct nouveau_i2c_chan *
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nouveau_i2c_find(struct drm_device *dev, int index)
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{
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struct drm_nouveau_private *dev_priv = dev->dev_private;
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struct dcb_i2c_entry *i2c = &dev_priv->vbios.dcb.i2c[index];
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if (index >= DCB_MAX_NUM_I2C_ENTRIES)
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return NULL;
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if (dev_priv->chipset >= NV_50 && (i2c->entry & 0x00000100)) {
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uint32_t reg = 0xe500, val;
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if (i2c->port_type == 6) {
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reg += i2c->read * 0x50;
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val = 0x2002;
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} else {
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reg += ((i2c->entry & 0x1e00) >> 9) * 0x50;
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val = 0xe001;
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}
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nv_wr32(dev, reg, (nv_rd32(dev, reg) & ~0xf003) | val);
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}
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if (!i2c->chan && nouveau_i2c_init(dev, i2c, index))
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return NULL;
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return i2c->chan;
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}
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