linux/drivers/gpu/drm/amd/powerplay
Sandeep Raghuraman f878122841 drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume
Reproducing bug report here:
After hibernating and resuming, DPM is not enabled. This remains the case
even if you test hibernate using the steps here:
https://www.kernel.org/doc/html/latest/power/basic-pm-debugging.html

I debugged the problem, and figured out that in the file hardwaremanager.c,
in the function, phm_enable_dynamic_state_management(), the check
'if (!hwmgr->pp_one_vf && smum_is_dpm_running(hwmgr) && !amdgpu_passthrough(adev) && adev->in_suspend)'
returns true for the hibernate case, and false for the suspend case.

This means that for the hibernate case, the AMDGPU driver doesn't enable DPM
(even though it should) and simply returns from that function.
In the suspend case, it goes ahead and enables DPM, even though it doesn't need to.

I debugged further, and found out that in the case of suspend, for the
CIK/Hawaii GPUs, smum_is_dpm_running(hwmgr) returns false, while in the case of
hibernate, smum_is_dpm_running(hwmgr) returns true.

For CIK, the ci_is_dpm_running() function calls the ci_is_smc_ram_running() function,
which is ultimately used to determine if DPM is currently enabled or not,
and this seems to provide the wrong answer.

I've changed the ci_is_dpm_running() function to instead use the same method that
some other AMD GPU chips do (e.g Fiji), which seems to read the voltage controller.
I've tested on my R9 390 and it seems to work correctly for both suspend and
hibernate use cases, and has been stable so far.

Bug: https://bugzilla.kernel.org/show_bug.cgi?id=208839
Signed-off-by: Sandeep Raghuraman <sandy.8925@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Cc: stable@vger.kernel.org
2020-08-07 17:52:15 -04:00
..
hwmgr drm/amdgpu: remove unused functions 2020-07-01 01:59:23 -04:00
inc drm/amd/powerplay: update swSMU VCN/JPEG PG logics 2020-08-07 17:48:57 -04:00
smumgr drm/amdgpu: Fix bug where DPM is not enabled after hibernate and resume 2020-08-07 17:52:15 -04:00
amd_powerplay.c drm/amd/powerplay: perform PG ungate prior to CG ungate 2020-05-06 16:51:15 -04:00
amdgpu_smu.c drm/amd/powerplay: put VCN/JPEG into PG ungate state before dpm table setup(V3) 2020-08-07 17:50:38 -04:00
arcturus_ppt.c drm/amd/powerplay: update swSMU VCN/JPEG PG logics 2020-08-07 17:48:57 -04:00
arcturus_ppt.h drm/amd/powerplay: update arcturus_ppt.c/h V3 2019-07-30 23:48:33 -05:00
Makefile drm/amd/powerplay: unify swSMU index to asic specific index mapping 2020-07-21 15:37:37 -04:00
navi10_ppt.c drm/amd/powerplay: update swSMU VCN/JPEG PG logics 2020-08-07 17:48:57 -04:00
navi10_ppt.h drm/amdgpu/smu: custom pstate profiling clock frequence for navi series asics 2020-01-07 12:01:09 -05:00
renoir_ppt.c drm/amd/powerplay: update swSMU VCN/JPEG PG logics 2020-08-07 17:48:57 -04:00
renoir_ppt.h drm/amd/powerplay: drop smu_v12_0.c unnecessary wrapper V2 2020-07-15 12:43:38 -04:00
sienna_cichlid_ppt.c drm/amd/powerplay: update swSMU VCN/JPEG PG logics 2020-08-07 17:48:57 -04:00
sienna_cichlid_ppt.h drm/amd/powerplay: support to get power index for sienna_cichlid 2020-06-03 13:52:13 -04:00
smu_cmn.c drm/amd/powerplay: off by one bugs in smu_cmn_to_asic_specific_index() 2020-08-06 16:34:56 -04:00
smu_cmn.h drm/amd/powerplay: drop unnecessary message support check(v2) 2020-08-06 16:33:18 -04:00
smu_internal.h drm/amd/powerplay: put VCN/JPEG into PG ungate state before dpm table setup(V3) 2020-08-07 17:50:38 -04:00
smu_v11_0.c drm/amdgpu: enable GFXOFF for navy_flounder 2020-08-06 16:45:46 -04:00
smu_v12_0.c drm/amd/powerplay: tag swSMU code layers 2020-07-21 15:37:38 -04:00