linux/Documentation/arm64
Christopher Covington d9ff80f83e arm64: Work around Falkor erratum 1009
During a TLB invalidate sequence targeting the inner shareable domain,
Falkor may prematurely complete the DSB before all loads and stores using
the old translation are observed. Instruction fetches are not subject to
the conditions of this erratum. If the original code sequence includes
multiple TLB invalidate instructions followed by a single DSB, onle one of
the TLB instructions needs to be repeated to work around this erratum.
While the erratum only applies to cases in which the TLBI specifies the
inner-shareable domain (*IS form of TLBI) and the DSB is ISH form or
stronger (OSH, SYS), this changes applies the workaround overabundantly--
to local TLBI, DSB NSH sequences as well--for simplicity.

Based on work by Shanker Donthineni <shankerd@codeaurora.org>

Signed-off-by: Christopher Covington <cov@codeaurora.org>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-02-01 15:41:50 +00:00
..
acpi_object_usage.txt ARM64: ACPI: Update documentation for latest specification version 2016-06-21 16:26:09 +01:00
arm-acpi.txt ARM64: ACPI: Update documentation for latest specification version 2016-06-21 16:26:09 +01:00
booting.txt arm64: add the initrd region to the linear mapping explicitly 2016-04-14 16:20:45 +01:00
cpu-feature-registers.txt arm64: Documentation - Expose CPU feature registers 2017-01-12 12:31:31 +00:00
legacy_instructions.txt arm64: Emulate SETEND for AArch32 tasks 2015-01-23 17:11:44 +00:00
memory.txt Documentation/arm64/memory.txt: fix typo 2014-10-20 17:55:38 +01:00
silicon-errata.txt arm64: Work around Falkor erratum 1009 2017-02-01 15:41:50 +00:00
tagged-pointers.txt arm64: documentation: tighten up tagged pointer documentation 2013-09-20 09:56:06 +01:00