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d9c3872cd2
Each time a Group-enable bit gets flipped, the state of these bits
needs to be forwarded to the hardware. This is a pretty heavy
handed operation, requiring all vcpus to reload their GICv4
configuration. It is thus implemented as a new request type.
These enable bits are programmed into the HW by setting the VGrp{0,1}En
fields of GICR_VPENDBASER when the vPEs are made resident again.
Of course, we only support Group-1 for now...
Signed-off-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Zenghui Yu <yuzenghui@huawei.com>
Link: https://lore.kernel.org/r/20200304203330.4967-22-maz@kernel.org
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| .. | ||
| hyp | ||
| vgic | ||
| aarch32.c | ||
| arch_timer.c | ||
| arm.c | ||
| hypercalls.c | ||
| mmio.c | ||
| mmu.c | ||
| perf.c | ||
| pmu.c | ||
| psci.c | ||
| pvtime.c | ||
| trace.h | ||