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0ee44f900e
Instead of setting the message byte translate it to the appropriate host byte. As error recovery would return DID_ERROR for any non-zero message byte the translation doesn't change the error handling. Link: https://lore.kernel.org/r/20210427083046.31620-37-hare@suse.de Signed-off-by: Hannes Reinecke <hare@suse.de> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
600 lines
16 KiB
C
600 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0
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/*
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* Driver for Future Domain TMC-16x0 and TMC-3260 SCSI host adapters
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* Copyright 2019 Ondrej Zary
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*
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* Original driver by
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* Rickard E. Faith, faith@cs.unc.edu
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*
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* Future Domain BIOS versions supported for autodetect:
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* 2.0, 3.0, 3.2, 3.4 (1.0), 3.5 (2.0), 3.6, 3.61
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* Chips supported:
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* TMC-1800, TMC-18C50, TMC-18C30, TMC-36C70
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* Boards supported:
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* Future Domain TMC-1650, TMC-1660, TMC-1670, TMC-1680, TMC-1610M/MER/MEX
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* Future Domain TMC-3260 (PCI)
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* Quantum ISA-200S, ISA-250MG
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* Adaptec AHA-2920A (PCI) [BUT *NOT* AHA-2920C -- use aic7xxx instead]
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* IBM ?
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*
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* NOTE:
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*
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* The Adaptec AHA-2920C has an Adaptec AIC-7850 chip on it.
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* Use the aic7xxx driver for this board.
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*
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* The Adaptec AHA-2920A has a Future Domain chip on it, so this is the right
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* driver for that card. Unfortunately, the boxes will probably just say
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* "2920", so you'll have to look on the card for a Future Domain logo, or a
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* letter after the 2920.
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*
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* If you have a TMC-8xx or TMC-9xx board, then this is not the driver for
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* your board.
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*
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* DESCRIPTION:
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*
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* This is the Linux low-level SCSI driver for Future Domain TMC-1660/1680
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* TMC-1650/1670, and TMC-3260 SCSI host adapters. The 1650 and 1670 have a
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* 25-pin external connector, whereas the 1660 and 1680 have a SCSI-2 50-pin
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* high-density external connector. The 1670 and 1680 have floppy disk
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* controllers built in. The TMC-3260 is a PCI bus card.
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*
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* Future Domain's older boards are based on the TMC-1800 chip, and this
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* driver was originally written for a TMC-1680 board with the TMC-1800 chip.
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* More recently, boards are being produced with the TMC-18C50 and TMC-18C30
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* chips.
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*
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* Please note that the drive ordering that Future Domain implemented in BIOS
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* versions 3.4 and 3.5 is the opposite of the order (currently) used by the
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* rest of the SCSI industry.
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*
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*
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* REFERENCES USED:
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*
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* "TMC-1800 SCSI Chip Specification (FDC-1800T)", Future Domain Corporation,
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* 1990.
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*
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* "Technical Reference Manual: 18C50 SCSI Host Adapter Chip", Future Domain
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* Corporation, January 1992.
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*
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* "LXT SCSI Products: Specifications and OEM Technical Manual (Revision
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* B/September 1991)", Maxtor Corporation, 1991.
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*
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* "7213S product Manual (Revision P3)", Maxtor Corporation, 1992.
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*
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* "Draft Proposed American National Standard: Small Computer System
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* Interface - 2 (SCSI-2)", Global Engineering Documents. (X3T9.2/86-109,
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* revision 10h, October 17, 1991)
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*
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* Private communications, Drew Eckhardt (drew@cs.colorado.edu) and Eric
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* Youngdale (ericy@cais.com), 1992.
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*
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* Private communication, Tuong Le (Future Domain Engineering department),
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* 1994. (Disk geometry computations for Future Domain BIOS version 3.4, and
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* TMC-18C30 detection.)
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*
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* Hogan, Thom. The Programmer's PC Sourcebook. Microsoft Press, 1988. Page
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* 60 (2.39: Disk Partition Table Layout).
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*
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* "18C30 Technical Reference Manual", Future Domain Corporation, 1993, page
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* 6-1.
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/delay.h>
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#include <linux/pci.h>
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#include <linux/workqueue.h>
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#include <scsi/scsicam.h>
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#include <scsi/scsi_cmnd.h>
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#include <scsi/scsi_device.h>
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#include <scsi/scsi_host.h>
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#include "fdomain.h"
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/*
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* FIFO_COUNT: The host adapter has an 8K cache (host adapters based on the
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* 18C30 chip have a 2k cache). When this many 512 byte blocks are filled by
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* the SCSI device, an interrupt will be raised. Therefore, this could be as
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* low as 0, or as high as 16. Note, however, that values which are too high
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* or too low seem to prevent any interrupts from occurring, and thereby lock
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* up the machine.
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*/
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#define FIFO_COUNT 2 /* Number of 512 byte blocks before INTR */
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#define PARITY_MASK ACTL_PAREN /* Parity enabled, 0 = disabled */
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enum chip_type {
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unknown = 0x00,
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tmc1800 = 0x01,
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tmc18c50 = 0x02,
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tmc18c30 = 0x03,
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};
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struct fdomain {
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int base;
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struct scsi_cmnd *cur_cmd;
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enum chip_type chip;
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struct work_struct work;
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};
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static inline void fdomain_make_bus_idle(struct fdomain *fd)
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{
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outb(0, fd->base + REG_BCTL);
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outb(0, fd->base + REG_MCTL);
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if (fd->chip == tmc18c50 || fd->chip == tmc18c30)
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/* Clear forced intr. */
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outb(ACTL_RESET | ACTL_CLRFIRQ | PARITY_MASK,
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fd->base + REG_ACTL);
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else
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outb(ACTL_RESET | PARITY_MASK, fd->base + REG_ACTL);
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}
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static enum chip_type fdomain_identify(int port)
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{
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u16 id = inb(port + REG_ID_LSB) | inb(port + REG_ID_MSB) << 8;
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switch (id) {
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case 0x6127:
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return tmc1800;
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case 0x60e9: /* 18c50 or 18c30 */
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break;
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default:
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return unknown;
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}
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/* Try to toggle 32-bit mode. This only works on an 18c30 chip. */
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outb(CFG2_32BIT, port + REG_CFG2);
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if ((inb(port + REG_CFG2) & CFG2_32BIT)) {
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outb(0, port + REG_CFG2);
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if ((inb(port + REG_CFG2) & CFG2_32BIT) == 0)
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return tmc18c30;
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}
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/* If that failed, we are an 18c50. */
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return tmc18c50;
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}
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static int fdomain_test_loopback(int base)
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{
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int i;
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for (i = 0; i < 255; i++) {
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outb(i, base + REG_LOOPBACK);
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if (inb(base + REG_LOOPBACK) != i)
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return 1;
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}
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return 0;
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}
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static void fdomain_reset(int base)
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{
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outb(BCTL_RST, base + REG_BCTL);
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mdelay(20);
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outb(0, base + REG_BCTL);
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mdelay(1150);
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outb(0, base + REG_MCTL);
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outb(PARITY_MASK, base + REG_ACTL);
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}
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static int fdomain_select(struct Scsi_Host *sh, int target)
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{
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int status;
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unsigned long timeout;
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struct fdomain *fd = shost_priv(sh);
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outb(BCTL_BUSEN | BCTL_SEL, fd->base + REG_BCTL);
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outb(BIT(sh->this_id) | BIT(target), fd->base + REG_SCSI_DATA_NOACK);
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/* Stop arbitration and enable parity */
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outb(PARITY_MASK, fd->base + REG_ACTL);
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timeout = 350; /* 350 msec */
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do {
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status = inb(fd->base + REG_BSTAT);
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if (status & BSTAT_BSY) {
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/* Enable SCSI Bus */
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/* (on error, should make bus idle with 0) */
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outb(BCTL_BUSEN, fd->base + REG_BCTL);
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return 0;
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}
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mdelay(1);
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} while (--timeout);
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fdomain_make_bus_idle(fd);
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return 1;
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}
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static void fdomain_finish_cmd(struct fdomain *fd)
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{
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outb(0, fd->base + REG_ICTL);
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fdomain_make_bus_idle(fd);
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fd->cur_cmd->scsi_done(fd->cur_cmd);
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fd->cur_cmd = NULL;
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}
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static void fdomain_read_data(struct scsi_cmnd *cmd)
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{
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struct fdomain *fd = shost_priv(cmd->device->host);
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unsigned char *virt, *ptr;
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size_t offset, len;
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while ((len = inw(fd->base + REG_FIFO_COUNT)) > 0) {
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offset = scsi_bufflen(cmd) - scsi_get_resid(cmd);
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virt = scsi_kmap_atomic_sg(scsi_sglist(cmd), scsi_sg_count(cmd),
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&offset, &len);
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ptr = virt + offset;
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if (len & 1)
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*ptr++ = inb(fd->base + REG_FIFO);
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if (len > 1)
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insw(fd->base + REG_FIFO, ptr, len >> 1);
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scsi_set_resid(cmd, scsi_get_resid(cmd) - len);
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scsi_kunmap_atomic_sg(virt);
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}
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}
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static void fdomain_write_data(struct scsi_cmnd *cmd)
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{
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struct fdomain *fd = shost_priv(cmd->device->host);
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/* 8k FIFO for pre-tmc18c30 chips, 2k FIFO for tmc18c30 */
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int FIFO_Size = fd->chip == tmc18c30 ? 0x800 : 0x2000;
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unsigned char *virt, *ptr;
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size_t offset, len;
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while ((len = FIFO_Size - inw(fd->base + REG_FIFO_COUNT)) > 512) {
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offset = scsi_bufflen(cmd) - scsi_get_resid(cmd);
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if (len + offset > scsi_bufflen(cmd)) {
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len = scsi_bufflen(cmd) - offset;
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if (len == 0)
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break;
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}
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virt = scsi_kmap_atomic_sg(scsi_sglist(cmd), scsi_sg_count(cmd),
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&offset, &len);
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ptr = virt + offset;
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if (len & 1)
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outb(*ptr++, fd->base + REG_FIFO);
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if (len > 1)
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outsw(fd->base + REG_FIFO, ptr, len >> 1);
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scsi_set_resid(cmd, scsi_get_resid(cmd) - len);
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scsi_kunmap_atomic_sg(virt);
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}
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}
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static void fdomain_work(struct work_struct *work)
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{
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struct fdomain *fd = container_of(work, struct fdomain, work);
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struct Scsi_Host *sh = container_of((void *)fd, struct Scsi_Host,
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hostdata);
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struct scsi_cmnd *cmd = fd->cur_cmd;
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unsigned long flags;
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int status;
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int done = 0;
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spin_lock_irqsave(sh->host_lock, flags);
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if (cmd->SCp.phase & in_arbitration) {
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status = inb(fd->base + REG_ASTAT);
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if (!(status & ASTAT_ARB)) {
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set_host_byte(cmd, DID_BUS_BUSY);
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fdomain_finish_cmd(fd);
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goto out;
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}
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cmd->SCp.phase = in_selection;
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outb(ICTL_SEL | FIFO_COUNT, fd->base + REG_ICTL);
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outb(BCTL_BUSEN | BCTL_SEL, fd->base + REG_BCTL);
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outb(BIT(cmd->device->host->this_id) | BIT(scmd_id(cmd)),
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fd->base + REG_SCSI_DATA_NOACK);
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/* Stop arbitration and enable parity */
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outb(ACTL_IRQEN | PARITY_MASK, fd->base + REG_ACTL);
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goto out;
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} else if (cmd->SCp.phase & in_selection) {
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status = inb(fd->base + REG_BSTAT);
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if (!(status & BSTAT_BSY)) {
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/* Try again, for slow devices */
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if (fdomain_select(cmd->device->host, scmd_id(cmd))) {
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set_host_byte(cmd, DID_NO_CONNECT);
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fdomain_finish_cmd(fd);
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goto out;
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}
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/* Stop arbitration and enable parity */
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outb(ACTL_IRQEN | PARITY_MASK, fd->base + REG_ACTL);
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}
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cmd->SCp.phase = in_other;
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outb(ICTL_FIFO | ICTL_REQ | FIFO_COUNT, fd->base + REG_ICTL);
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outb(BCTL_BUSEN, fd->base + REG_BCTL);
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goto out;
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}
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/* cur_cmd->SCp.phase == in_other: this is the body of the routine */
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status = inb(fd->base + REG_BSTAT);
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if (status & BSTAT_REQ) {
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switch (status & (BSTAT_MSG | BSTAT_CMD | BSTAT_IO)) {
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case BSTAT_CMD: /* COMMAND OUT */
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outb(cmd->cmnd[cmd->SCp.sent_command++],
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fd->base + REG_SCSI_DATA);
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break;
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case 0: /* DATA OUT -- tmc18c50/tmc18c30 only */
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if (fd->chip != tmc1800 && !cmd->SCp.have_data_in) {
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cmd->SCp.have_data_in = -1;
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outb(ACTL_IRQEN | ACTL_FIFOWR | ACTL_FIFOEN |
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PARITY_MASK, fd->base + REG_ACTL);
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}
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break;
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case BSTAT_IO: /* DATA IN -- tmc18c50/tmc18c30 only */
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if (fd->chip != tmc1800 && !cmd->SCp.have_data_in) {
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cmd->SCp.have_data_in = 1;
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outb(ACTL_IRQEN | ACTL_FIFOEN | PARITY_MASK,
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fd->base + REG_ACTL);
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}
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break;
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case BSTAT_CMD | BSTAT_IO: /* STATUS IN */
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cmd->SCp.Status = inb(fd->base + REG_SCSI_DATA);
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break;
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case BSTAT_MSG | BSTAT_CMD: /* MESSAGE OUT */
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outb(MESSAGE_REJECT, fd->base + REG_SCSI_DATA);
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break;
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case BSTAT_MSG | BSTAT_CMD | BSTAT_IO: /* MESSAGE IN */
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cmd->SCp.Message = inb(fd->base + REG_SCSI_DATA);
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if (cmd->SCp.Message == COMMAND_COMPLETE)
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++done;
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break;
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}
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}
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if (fd->chip == tmc1800 && !cmd->SCp.have_data_in &&
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cmd->SCp.sent_command >= cmd->cmd_len) {
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if (cmd->sc_data_direction == DMA_TO_DEVICE) {
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cmd->SCp.have_data_in = -1;
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outb(ACTL_IRQEN | ACTL_FIFOWR | ACTL_FIFOEN |
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PARITY_MASK, fd->base + REG_ACTL);
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} else {
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cmd->SCp.have_data_in = 1;
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outb(ACTL_IRQEN | ACTL_FIFOEN | PARITY_MASK,
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fd->base + REG_ACTL);
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}
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}
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if (cmd->SCp.have_data_in == -1) /* DATA OUT */
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fdomain_write_data(cmd);
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if (cmd->SCp.have_data_in == 1) /* DATA IN */
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fdomain_read_data(cmd);
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if (done) {
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set_status_byte(cmd, cmd->SCp.Status);
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set_host_byte(cmd, DID_OK);
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scsi_msg_to_host_byte(cmd, cmd->SCp.Message);
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fdomain_finish_cmd(fd);
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} else {
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if (cmd->SCp.phase & disconnect) {
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outb(ICTL_FIFO | ICTL_SEL | ICTL_REQ | FIFO_COUNT,
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fd->base + REG_ICTL);
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outb(0, fd->base + REG_BCTL);
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} else
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outb(ICTL_FIFO | ICTL_REQ | FIFO_COUNT,
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fd->base + REG_ICTL);
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}
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out:
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spin_unlock_irqrestore(sh->host_lock, flags);
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}
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static irqreturn_t fdomain_irq(int irq, void *dev_id)
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{
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struct fdomain *fd = dev_id;
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/* Is it our IRQ? */
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if ((inb(fd->base + REG_ASTAT) & ASTAT_IRQ) == 0)
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return IRQ_NONE;
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outb(0, fd->base + REG_ICTL);
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/* We usually have one spurious interrupt after each command. */
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if (!fd->cur_cmd) /* Spurious interrupt */
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return IRQ_NONE;
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schedule_work(&fd->work);
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return IRQ_HANDLED;
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}
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static int fdomain_queue(struct Scsi_Host *sh, struct scsi_cmnd *cmd)
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{
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struct fdomain *fd = shost_priv(cmd->device->host);
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unsigned long flags;
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cmd->SCp.Status = 0;
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cmd->SCp.Message = 0;
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cmd->SCp.have_data_in = 0;
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cmd->SCp.sent_command = 0;
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cmd->SCp.phase = in_arbitration;
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scsi_set_resid(cmd, scsi_bufflen(cmd));
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spin_lock_irqsave(sh->host_lock, flags);
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fd->cur_cmd = cmd;
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fdomain_make_bus_idle(fd);
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/* Start arbitration */
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outb(0, fd->base + REG_ICTL);
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outb(0, fd->base + REG_BCTL); /* Disable data drivers */
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/* Set our id bit */
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outb(BIT(cmd->device->host->this_id), fd->base + REG_SCSI_DATA_NOACK);
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outb(ICTL_ARB, fd->base + REG_ICTL);
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/* Start arbitration */
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outb(ACTL_ARB | ACTL_IRQEN | PARITY_MASK, fd->base + REG_ACTL);
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spin_unlock_irqrestore(sh->host_lock, flags);
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return 0;
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}
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static int fdomain_abort(struct scsi_cmnd *cmd)
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{
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struct Scsi_Host *sh = cmd->device->host;
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struct fdomain *fd = shost_priv(sh);
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unsigned long flags;
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if (!fd->cur_cmd)
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return FAILED;
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spin_lock_irqsave(sh->host_lock, flags);
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fdomain_make_bus_idle(fd);
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fd->cur_cmd->SCp.phase |= aborted;
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/* Aborts are not done well. . . */
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set_host_byte(fd->cur_cmd, DID_ABORT);
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fdomain_finish_cmd(fd);
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spin_unlock_irqrestore(sh->host_lock, flags);
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return SUCCESS;
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}
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static int fdomain_host_reset(struct scsi_cmnd *cmd)
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{
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struct Scsi_Host *sh = cmd->device->host;
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struct fdomain *fd = shost_priv(sh);
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unsigned long flags;
|
|
|
|
spin_lock_irqsave(sh->host_lock, flags);
|
|
fdomain_reset(fd->base);
|
|
spin_unlock_irqrestore(sh->host_lock, flags);
|
|
return SUCCESS;
|
|
}
|
|
|
|
static int fdomain_biosparam(struct scsi_device *sdev,
|
|
struct block_device *bdev, sector_t capacity,
|
|
int geom[])
|
|
{
|
|
unsigned char *p = scsi_bios_ptable(bdev);
|
|
|
|
if (p && p[65] == 0xaa && p[64] == 0x55 /* Partition table valid */
|
|
&& p[4]) { /* Partition type */
|
|
geom[0] = p[5] + 1; /* heads */
|
|
geom[1] = p[6] & 0x3f; /* sectors */
|
|
} else {
|
|
if (capacity >= 0x7e0000) {
|
|
geom[0] = 255; /* heads */
|
|
geom[1] = 63; /* sectors */
|
|
} else if (capacity >= 0x200000) {
|
|
geom[0] = 128; /* heads */
|
|
geom[1] = 63; /* sectors */
|
|
} else {
|
|
geom[0] = 64; /* heads */
|
|
geom[1] = 32; /* sectors */
|
|
}
|
|
}
|
|
geom[2] = sector_div(capacity, geom[0] * geom[1]);
|
|
kfree(p);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static struct scsi_host_template fdomain_template = {
|
|
.module = THIS_MODULE,
|
|
.name = "Future Domain TMC-16x0",
|
|
.proc_name = "fdomain",
|
|
.queuecommand = fdomain_queue,
|
|
.eh_abort_handler = fdomain_abort,
|
|
.eh_host_reset_handler = fdomain_host_reset,
|
|
.bios_param = fdomain_biosparam,
|
|
.can_queue = 1,
|
|
.this_id = 7,
|
|
.sg_tablesize = 64,
|
|
.dma_boundary = PAGE_SIZE - 1,
|
|
};
|
|
|
|
struct Scsi_Host *fdomain_create(int base, int irq, int this_id,
|
|
struct device *dev)
|
|
{
|
|
struct Scsi_Host *sh;
|
|
struct fdomain *fd;
|
|
enum chip_type chip;
|
|
static const char * const chip_names[] = {
|
|
"Unknown", "TMC-1800", "TMC-18C50", "TMC-18C30"
|
|
};
|
|
unsigned long irq_flags = 0;
|
|
|
|
chip = fdomain_identify(base);
|
|
if (!chip)
|
|
return NULL;
|
|
|
|
fdomain_reset(base);
|
|
|
|
if (fdomain_test_loopback(base))
|
|
return NULL;
|
|
|
|
if (!irq) {
|
|
dev_err(dev, "card has no IRQ assigned");
|
|
return NULL;
|
|
}
|
|
|
|
sh = scsi_host_alloc(&fdomain_template, sizeof(struct fdomain));
|
|
if (!sh)
|
|
return NULL;
|
|
|
|
if (this_id)
|
|
sh->this_id = this_id & 0x07;
|
|
|
|
sh->irq = irq;
|
|
sh->io_port = base;
|
|
sh->n_io_port = FDOMAIN_REGION_SIZE;
|
|
|
|
fd = shost_priv(sh);
|
|
fd->base = base;
|
|
fd->chip = chip;
|
|
INIT_WORK(&fd->work, fdomain_work);
|
|
|
|
if (dev_is_pci(dev) || !strcmp(dev->bus->name, "pcmcia"))
|
|
irq_flags = IRQF_SHARED;
|
|
|
|
if (request_irq(irq, fdomain_irq, irq_flags, "fdomain", fd))
|
|
goto fail_put;
|
|
|
|
shost_printk(KERN_INFO, sh, "%s chip at 0x%x irq %d SCSI ID %d\n",
|
|
dev_is_pci(dev) ? "TMC-36C70 (PCI bus)" : chip_names[chip],
|
|
base, irq, sh->this_id);
|
|
|
|
if (scsi_add_host(sh, dev))
|
|
goto fail_free_irq;
|
|
|
|
scsi_scan_host(sh);
|
|
|
|
return sh;
|
|
|
|
fail_free_irq:
|
|
free_irq(irq, fd);
|
|
fail_put:
|
|
scsi_host_put(sh);
|
|
return NULL;
|
|
}
|
|
EXPORT_SYMBOL_GPL(fdomain_create);
|
|
|
|
int fdomain_destroy(struct Scsi_Host *sh)
|
|
{
|
|
struct fdomain *fd = shost_priv(sh);
|
|
|
|
cancel_work_sync(&fd->work);
|
|
scsi_remove_host(sh);
|
|
if (sh->irq)
|
|
free_irq(sh->irq, fd);
|
|
scsi_host_put(sh);
|
|
return 0;
|
|
}
|
|
EXPORT_SYMBOL_GPL(fdomain_destroy);
|
|
|
|
#ifdef CONFIG_PM_SLEEP
|
|
static int fdomain_resume(struct device *dev)
|
|
{
|
|
struct fdomain *fd = shost_priv(dev_get_drvdata(dev));
|
|
|
|
fdomain_reset(fd->base);
|
|
return 0;
|
|
}
|
|
|
|
static SIMPLE_DEV_PM_OPS(fdomain_pm_ops, NULL, fdomain_resume);
|
|
#endif /* CONFIG_PM_SLEEP */
|
|
|
|
MODULE_AUTHOR("Ondrej Zary, Rickard E. Faith");
|
|
MODULE_DESCRIPTION("Future Domain TMC-16x0/TMC-3260 SCSI driver");
|
|
MODULE_LICENSE("GPL");
|