mirror of
https://mirrors.bfsu.edu.cn/git/linux.git
synced 2024-12-29 22:14:41 +08:00
8c7634c0ee
The fact that all supported boards use the same 33MHz crystal is a co-incidence. The Zynq PS support a range of crystal freqs so the hardcoded setting should be removed from the dtsi. Re-implement it on the board level. This prepares support for Zynq boards with different crystal frequencies (e.g. the Digilent ZYBO). Acked-by: Soren Brinkmann <soren.brinkmann@xilinx.com> Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com> Signed-off-by: Michal Simek <michal.simek@xilinx.com>
53 lines
1.0 KiB
Plaintext
53 lines
1.0 KiB
Plaintext
/*
|
|
* Copyright (C) 2011 - 2014 Xilinx
|
|
* Copyright (C) 2012 National Instruments Corp.
|
|
*
|
|
* This software is licensed under the terms of the GNU General Public
|
|
* License version 2, as published by the Free Software Foundation, and
|
|
* may be copied, distributed, and modified under those terms.
|
|
*
|
|
* This program is distributed in the hope that it will be useful,
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
* GNU General Public License for more details.
|
|
*/
|
|
/dts-v1/;
|
|
/include/ "zynq-7000.dtsi"
|
|
|
|
/ {
|
|
model = "Zynq Zed Development Board";
|
|
compatible = "xlnx,zynq-zed", "xlnx,zynq-7000";
|
|
|
|
memory {
|
|
device_type = "memory";
|
|
reg = <0x0 0x20000000>;
|
|
};
|
|
|
|
chosen {
|
|
bootargs = "console=ttyPS0,115200 earlyprintk";
|
|
};
|
|
|
|
};
|
|
|
|
&clkc {
|
|
ps-clk-frequency = <33333333>;
|
|
};
|
|
|
|
&gem0 {
|
|
status = "okay";
|
|
phy-mode = "rgmii-id";
|
|
phy-handle = <ðernet_phy>;
|
|
|
|
ethernet_phy: ethernet-phy@0 {
|
|
reg = <0>;
|
|
};
|
|
};
|
|
|
|
&sdhci0 {
|
|
status = "okay";
|
|
};
|
|
|
|
&uart1 {
|
|
status = "okay";
|
|
};
|