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3115624eda
Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: David S. Miller <davem@davemloft.net>
638 lines
17 KiB
C
638 lines
17 KiB
C
/* $Id: time.c,v 1.60 2002/01/23 14:33:55 davem Exp $
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* linux/arch/sparc/kernel/time.c
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*
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* Copyright (C) 1995 David S. Miller (davem@caip.rutgers.edu)
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* Copyright (C) 1996 Thomas K. Dyas (tdyas@eden.rutgers.edu)
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*
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* Chris Davis (cdavis@cois.on.ca) 03/27/1998
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* Added support for the intersil on the sun4/4200
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*
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* Gleb Raiko (rajko@mech.math.msu.su) 08/18/1998
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* Support for MicroSPARC-IIep, PCI CPU.
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*
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* This file handles the Sparc specific time handling details.
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*
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* 1997-09-10 Updated NTP code according to technical memorandum Jan '96
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* "A Kernel Model for Precision Timekeeping" by Dave Mills
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*/
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#include <linux/config.h>
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#include <linux/errno.h>
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#include <linux/module.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/param.h>
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#include <linux/string.h>
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#include <linux/mm.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/init.h>
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#include <linux/pci.h>
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#include <linux/ioport.h>
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#include <linux/profile.h>
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#include <asm/oplib.h>
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#include <asm/timer.h>
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#include <asm/mostek.h>
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#include <asm/system.h>
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#include <asm/irq.h>
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#include <asm/io.h>
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#include <asm/idprom.h>
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#include <asm/machines.h>
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#include <asm/sun4paddr.h>
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#include <asm/page.h>
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#include <asm/pcic.h>
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extern unsigned long wall_jiffies;
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u64 jiffies_64 = INITIAL_JIFFIES;
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EXPORT_SYMBOL(jiffies_64);
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DEFINE_SPINLOCK(rtc_lock);
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enum sparc_clock_type sp_clock_typ;
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DEFINE_SPINLOCK(mostek_lock);
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void __iomem *mstk48t02_regs = NULL;
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static struct mostek48t08 *mstk48t08_regs = NULL;
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static int set_rtc_mmss(unsigned long);
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static int sbus_do_settimeofday(struct timespec *tv);
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#ifdef CONFIG_SUN4
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struct intersil *intersil_clock;
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#define intersil_cmd(intersil_reg, intsil_cmd) intersil_reg->int_cmd_reg = \
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(intsil_cmd)
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#define intersil_intr(intersil_reg, intsil_cmd) intersil_reg->int_intr_reg = \
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(intsil_cmd)
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#define intersil_start(intersil_reg) intersil_cmd(intersil_reg, \
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( INTERSIL_START | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
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INTERSIL_INTR_ENABLE))
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#define intersil_stop(intersil_reg) intersil_cmd(intersil_reg, \
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( INTERSIL_STOP | INTERSIL_32K | INTERSIL_NORMAL | INTERSIL_24H |\
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INTERSIL_INTR_ENABLE))
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#define intersil_read_intr(intersil_reg, towhere) towhere = \
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intersil_reg->int_intr_reg
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#endif
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unsigned long profile_pc(struct pt_regs *regs)
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{
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extern char __copy_user_begin[], __copy_user_end[];
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extern char __atomic_begin[], __atomic_end[];
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extern char __bzero_begin[], __bzero_end[];
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extern char __bitops_begin[], __bitops_end[];
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unsigned long pc = regs->pc;
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if (in_lock_functions(pc) ||
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(pc >= (unsigned long) __copy_user_begin &&
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pc < (unsigned long) __copy_user_end) ||
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(pc >= (unsigned long) __atomic_begin &&
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pc < (unsigned long) __atomic_end) ||
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(pc >= (unsigned long) __bzero_begin &&
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pc < (unsigned long) __bzero_end) ||
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(pc >= (unsigned long) __bitops_begin &&
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pc < (unsigned long) __bitops_end))
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pc = regs->u_regs[UREG_RETPC];
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return pc;
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}
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__volatile__ unsigned int *master_l10_counter;
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__volatile__ unsigned int *master_l10_limit;
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/*
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* timer_interrupt() needs to keep up the real-time clock,
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* as well as call the "do_timer()" routine every clocktick
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*/
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#define TICK_SIZE (tick_nsec / 1000)
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irqreturn_t timer_interrupt(int irq, void *dev_id, struct pt_regs * regs)
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{
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/* last time the cmos clock got updated */
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static long last_rtc_update;
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#ifndef CONFIG_SMP
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profile_tick(CPU_PROFILING, regs);
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#endif
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/* Protect counter clear so that do_gettimeoffset works */
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write_seqlock(&xtime_lock);
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#ifdef CONFIG_SUN4
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if((idprom->id_machtype == (SM_SUN4 | SM_4_260)) ||
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(idprom->id_machtype == (SM_SUN4 | SM_4_110))) {
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int temp;
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intersil_read_intr(intersil_clock, temp);
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/* re-enable the irq */
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enable_pil_irq(10);
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}
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#endif
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clear_clock_irq();
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do_timer(regs);
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#ifndef CONFIG_SMP
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update_process_times(user_mode(regs));
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#endif
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/* Determine when to update the Mostek clock. */
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if (ntp_synced() &&
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xtime.tv_sec > last_rtc_update + 660 &&
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(xtime.tv_nsec / 1000) >= 500000 - ((unsigned) TICK_SIZE) / 2 &&
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(xtime.tv_nsec / 1000) <= 500000 + ((unsigned) TICK_SIZE) / 2) {
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if (set_rtc_mmss(xtime.tv_sec) == 0)
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last_rtc_update = xtime.tv_sec;
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else
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last_rtc_update = xtime.tv_sec - 600; /* do it again in 60 s */
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}
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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/* Kick start a stopped clock (procedure from the Sun NVRAM/hostid FAQ). */
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static void __init kick_start_clock(void)
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{
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struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
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unsigned char sec;
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int i, count;
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prom_printf("CLOCK: Clock was stopped. Kick start ");
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spin_lock_irq(&mostek_lock);
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/* Turn on the kick start bit to start the oscillator. */
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regs->creg |= MSTK_CREG_WRITE;
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regs->sec &= ~MSTK_STOP;
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regs->hour |= MSTK_KICK_START;
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regs->creg &= ~MSTK_CREG_WRITE;
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spin_unlock_irq(&mostek_lock);
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/* Delay to allow the clock oscillator to start. */
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sec = MSTK_REG_SEC(regs);
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for (i = 0; i < 3; i++) {
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while (sec == MSTK_REG_SEC(regs))
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for (count = 0; count < 100000; count++)
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/* nothing */ ;
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prom_printf(".");
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sec = regs->sec;
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}
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prom_printf("\n");
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spin_lock_irq(&mostek_lock);
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/* Turn off kick start and set a "valid" time and date. */
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regs->creg |= MSTK_CREG_WRITE;
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regs->hour &= ~MSTK_KICK_START;
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MSTK_SET_REG_SEC(regs,0);
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MSTK_SET_REG_MIN(regs,0);
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MSTK_SET_REG_HOUR(regs,0);
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MSTK_SET_REG_DOW(regs,5);
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MSTK_SET_REG_DOM(regs,1);
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MSTK_SET_REG_MONTH(regs,8);
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MSTK_SET_REG_YEAR(regs,1996 - MSTK_YEAR_ZERO);
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regs->creg &= ~MSTK_CREG_WRITE;
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spin_unlock_irq(&mostek_lock);
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/* Ensure the kick start bit is off. If it isn't, turn it off. */
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while (regs->hour & MSTK_KICK_START) {
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prom_printf("CLOCK: Kick start still on!\n");
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spin_lock_irq(&mostek_lock);
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regs->creg |= MSTK_CREG_WRITE;
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regs->hour &= ~MSTK_KICK_START;
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regs->creg &= ~MSTK_CREG_WRITE;
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spin_unlock_irq(&mostek_lock);
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}
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prom_printf("CLOCK: Kick start procedure successful.\n");
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}
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/* Return nonzero if the clock chip battery is low. */
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static __inline__ int has_low_battery(void)
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{
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struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
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unsigned char data1, data2;
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spin_lock_irq(&mostek_lock);
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data1 = regs->eeprom[0]; /* Read some data. */
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regs->eeprom[0] = ~data1; /* Write back the complement. */
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data2 = regs->eeprom[0]; /* Read back the complement. */
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regs->eeprom[0] = data1; /* Restore the original value. */
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spin_unlock_irq(&mostek_lock);
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return (data1 == data2); /* Was the write blocked? */
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}
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/* Probe for the real time clock chip on Sun4 */
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static __inline__ void sun4_clock_probe(void)
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{
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#ifdef CONFIG_SUN4
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int temp;
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struct resource r;
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memset(&r, 0, sizeof(r));
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if( idprom->id_machtype == (SM_SUN4 | SM_4_330) ) {
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sp_clock_typ = MSTK48T02;
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r.start = sun4_clock_physaddr;
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mstk48t02_regs = sbus_ioremap(&r, 0,
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sizeof(struct mostek48t02), NULL);
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mstk48t08_regs = NULL; /* To catch weirdness */
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intersil_clock = NULL; /* just in case */
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/* Kick start the clock if it is completely stopped. */
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if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
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kick_start_clock();
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} else if( idprom->id_machtype == (SM_SUN4 | SM_4_260)) {
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/* intersil setup code */
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printk("Clock: INTERSIL at %8x ",sun4_clock_physaddr);
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sp_clock_typ = INTERSIL;
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r.start = sun4_clock_physaddr;
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intersil_clock = (struct intersil *)
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sbus_ioremap(&r, 0, sizeof(*intersil_clock), "intersil");
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mstk48t02_regs = 0; /* just be sure */
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mstk48t08_regs = NULL; /* ditto */
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/* initialise the clock */
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intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
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intersil_start(intersil_clock);
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intersil_read_intr(intersil_clock, temp);
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while (!(temp & 0x80))
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intersil_read_intr(intersil_clock, temp);
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intersil_read_intr(intersil_clock, temp);
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while (!(temp & 0x80))
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intersil_read_intr(intersil_clock, temp);
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intersil_stop(intersil_clock);
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}
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#endif
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}
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/* Probe for the mostek real time clock chip. */
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static __inline__ void clock_probe(void)
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{
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struct linux_prom_registers clk_reg[2];
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char model[128];
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register int node, cpuunit, bootbus;
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struct resource r;
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cpuunit = bootbus = 0;
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memset(&r, 0, sizeof(r));
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/* Determine the correct starting PROM node for the probe. */
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node = prom_getchild(prom_root_node);
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switch (sparc_cpu_model) {
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case sun4c:
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break;
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case sun4m:
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node = prom_getchild(prom_searchsiblings(node, "obio"));
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break;
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case sun4d:
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node = prom_getchild(bootbus = prom_searchsiblings(prom_getchild(cpuunit = prom_searchsiblings(node, "cpu-unit")), "bootbus"));
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break;
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default:
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prom_printf("CLOCK: Unsupported architecture!\n");
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prom_halt();
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}
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/* Find the PROM node describing the real time clock. */
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sp_clock_typ = MSTK_INVALID;
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node = prom_searchsiblings(node,"eeprom");
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if (!node) {
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prom_printf("CLOCK: No clock found!\n");
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prom_halt();
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}
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/* Get the model name and setup everything up. */
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model[0] = '\0';
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prom_getstring(node, "model", model, sizeof(model));
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if (strcmp(model, "mk48t02") == 0) {
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sp_clock_typ = MSTK48T02;
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if (prom_getproperty(node, "reg", (char *) clk_reg, sizeof(clk_reg)) == -1) {
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prom_printf("clock_probe: FAILED!\n");
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prom_halt();
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}
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if (sparc_cpu_model == sun4d)
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prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
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else
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prom_apply_obio_ranges(clk_reg, 1);
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/* Map the clock register io area read-only */
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r.flags = clk_reg[0].which_io;
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r.start = clk_reg[0].phys_addr;
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mstk48t02_regs = sbus_ioremap(&r, 0,
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sizeof(struct mostek48t02), "mk48t02");
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mstk48t08_regs = NULL; /* To catch weirdness */
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} else if (strcmp(model, "mk48t08") == 0) {
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sp_clock_typ = MSTK48T08;
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if(prom_getproperty(node, "reg", (char *) clk_reg,
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sizeof(clk_reg)) == -1) {
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prom_printf("clock_probe: FAILED!\n");
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prom_halt();
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}
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if (sparc_cpu_model == sun4d)
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prom_apply_generic_ranges (bootbus, cpuunit, clk_reg, 1);
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else
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prom_apply_obio_ranges(clk_reg, 1);
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/* Map the clock register io area read-only */
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/* XXX r/o attribute is somewhere in r.flags */
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r.flags = clk_reg[0].which_io;
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r.start = clk_reg[0].phys_addr;
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mstk48t08_regs = (struct mostek48t08 *) sbus_ioremap(&r, 0,
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sizeof(struct mostek48t08), "mk48t08");
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mstk48t02_regs = &mstk48t08_regs->regs;
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} else {
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prom_printf("CLOCK: Unknown model name '%s'\n",model);
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prom_halt();
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}
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/* Report a low battery voltage condition. */
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if (has_low_battery())
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printk(KERN_CRIT "NVRAM: Low battery voltage!\n");
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/* Kick start the clock if it is completely stopped. */
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if (mostek_read(mstk48t02_regs + MOSTEK_SEC) & MSTK_STOP)
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kick_start_clock();
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}
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void __init sbus_time_init(void)
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{
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unsigned int year, mon, day, hour, min, sec;
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struct mostek48t02 *mregs;
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#ifdef CONFIG_SUN4
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int temp;
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struct intersil *iregs;
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#endif
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BTFIXUPSET_CALL(bus_do_settimeofday, sbus_do_settimeofday, BTFIXUPCALL_NORM);
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btfixup();
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if (ARCH_SUN4)
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sun4_clock_probe();
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else
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clock_probe();
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sparc_init_timers(timer_interrupt);
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#ifdef CONFIG_SUN4
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if(idprom->id_machtype == (SM_SUN4 | SM_4_330)) {
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#endif
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mregs = (struct mostek48t02 *)mstk48t02_regs;
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if(!mregs) {
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prom_printf("Something wrong, clock regs not mapped yet.\n");
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prom_halt();
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}
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spin_lock_irq(&mostek_lock);
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mregs->creg |= MSTK_CREG_READ;
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sec = MSTK_REG_SEC(mregs);
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min = MSTK_REG_MIN(mregs);
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hour = MSTK_REG_HOUR(mregs);
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day = MSTK_REG_DOM(mregs);
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mon = MSTK_REG_MONTH(mregs);
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year = MSTK_CVT_YEAR( MSTK_REG_YEAR(mregs) );
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xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
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xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
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set_normalized_timespec(&wall_to_monotonic,
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-xtime.tv_sec, -xtime.tv_nsec);
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mregs->creg &= ~MSTK_CREG_READ;
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spin_unlock_irq(&mostek_lock);
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#ifdef CONFIG_SUN4
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} else if(idprom->id_machtype == (SM_SUN4 | SM_4_260) ) {
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/* initialise the intersil on sun4 */
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iregs=intersil_clock;
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if(!iregs) {
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prom_printf("Something wrong, clock regs not mapped yet.\n");
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prom_halt();
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}
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intersil_intr(intersil_clock,INTERSIL_INT_100HZ);
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disable_pil_irq(10);
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intersil_stop(iregs);
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intersil_read_intr(intersil_clock, temp);
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temp = iregs->clk.int_csec;
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sec = iregs->clk.int_sec;
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min = iregs->clk.int_min;
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hour = iregs->clk.int_hour;
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day = iregs->clk.int_day;
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mon = iregs->clk.int_month;
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year = MSTK_CVT_YEAR(iregs->clk.int_year);
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enable_pil_irq(10);
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intersil_start(iregs);
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xtime.tv_sec = mktime(year, mon, day, hour, min, sec);
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xtime.tv_nsec = (INITIAL_JIFFIES % HZ) * (NSEC_PER_SEC / HZ);
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set_normalized_timespec(&wall_to_monotonic,
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-xtime.tv_sec, -xtime.tv_nsec);
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printk("%u/%u/%u %u:%u:%u\n",day,mon,year,hour,min,sec);
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}
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#endif
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/* Now that OBP ticker has been silenced, it is safe to enable IRQ. */
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local_irq_enable();
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}
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void __init time_init(void)
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{
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#ifdef CONFIG_PCI
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extern void pci_time_init(void);
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if (pcic_present()) {
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pci_time_init();
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return;
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}
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#endif
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sbus_time_init();
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}
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static inline unsigned long do_gettimeoffset(void)
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{
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return (*master_l10_counter >> 10) & 0x1fffff;
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}
|
|
|
|
/*
|
|
* Returns nanoseconds
|
|
* XXX This is a suboptimal implementation.
|
|
*/
|
|
unsigned long long sched_clock(void)
|
|
{
|
|
return (unsigned long long)jiffies * (1000000000 / HZ);
|
|
}
|
|
|
|
/* Ok, my cute asm atomicity trick doesn't work anymore.
|
|
* There are just too many variables that need to be protected
|
|
* now (both members of xtime, wall_jiffies, et al.)
|
|
*/
|
|
void do_gettimeofday(struct timeval *tv)
|
|
{
|
|
unsigned long flags;
|
|
unsigned long seq;
|
|
unsigned long usec, sec;
|
|
unsigned long max_ntp_tick = tick_usec - tickadj;
|
|
|
|
do {
|
|
unsigned long lost;
|
|
|
|
seq = read_seqbegin_irqsave(&xtime_lock, flags);
|
|
usec = do_gettimeoffset();
|
|
lost = jiffies - wall_jiffies;
|
|
|
|
/*
|
|
* If time_adjust is negative then NTP is slowing the clock
|
|
* so make sure not to go into next possible interval.
|
|
* Better to lose some accuracy than have time go backwards..
|
|
*/
|
|
if (unlikely(time_adjust < 0)) {
|
|
usec = min(usec, max_ntp_tick);
|
|
|
|
if (lost)
|
|
usec += lost * max_ntp_tick;
|
|
}
|
|
else if (unlikely(lost))
|
|
usec += lost * tick_usec;
|
|
|
|
sec = xtime.tv_sec;
|
|
usec += (xtime.tv_nsec / 1000);
|
|
} while (read_seqretry_irqrestore(&xtime_lock, seq, flags));
|
|
|
|
while (usec >= 1000000) {
|
|
usec -= 1000000;
|
|
sec++;
|
|
}
|
|
|
|
tv->tv_sec = sec;
|
|
tv->tv_usec = usec;
|
|
}
|
|
|
|
EXPORT_SYMBOL(do_gettimeofday);
|
|
|
|
int do_settimeofday(struct timespec *tv)
|
|
{
|
|
int ret;
|
|
|
|
write_seqlock_irq(&xtime_lock);
|
|
ret = bus_do_settimeofday(tv);
|
|
write_sequnlock_irq(&xtime_lock);
|
|
clock_was_set();
|
|
return ret;
|
|
}
|
|
|
|
EXPORT_SYMBOL(do_settimeofday);
|
|
|
|
static int sbus_do_settimeofday(struct timespec *tv)
|
|
{
|
|
time_t wtm_sec, sec = tv->tv_sec;
|
|
long wtm_nsec, nsec = tv->tv_nsec;
|
|
|
|
if ((unsigned long)tv->tv_nsec >= NSEC_PER_SEC)
|
|
return -EINVAL;
|
|
|
|
/*
|
|
* This is revolting. We need to set "xtime" correctly. However, the
|
|
* value in this location is the value at the most recent update of
|
|
* wall time. Discover what correction gettimeofday() would have
|
|
* made, and then undo it!
|
|
*/
|
|
nsec -= 1000 * (do_gettimeoffset() +
|
|
(jiffies - wall_jiffies) * (USEC_PER_SEC / HZ));
|
|
|
|
wtm_sec = wall_to_monotonic.tv_sec + (xtime.tv_sec - sec);
|
|
wtm_nsec = wall_to_monotonic.tv_nsec + (xtime.tv_nsec - nsec);
|
|
|
|
set_normalized_timespec(&xtime, sec, nsec);
|
|
set_normalized_timespec(&wall_to_monotonic, wtm_sec, wtm_nsec);
|
|
|
|
ntp_clear();
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* BUG: This routine does not handle hour overflow properly; it just
|
|
* sets the minutes. Usually you won't notice until after reboot!
|
|
*/
|
|
static int set_rtc_mmss(unsigned long nowtime)
|
|
{
|
|
int real_seconds, real_minutes, mostek_minutes;
|
|
struct mostek48t02 *regs = (struct mostek48t02 *)mstk48t02_regs;
|
|
unsigned long flags;
|
|
#ifdef CONFIG_SUN4
|
|
struct intersil *iregs = intersil_clock;
|
|
int temp;
|
|
#endif
|
|
|
|
/* Not having a register set can lead to trouble. */
|
|
if (!regs) {
|
|
#ifdef CONFIG_SUN4
|
|
if(!iregs)
|
|
return -1;
|
|
else {
|
|
temp = iregs->clk.int_csec;
|
|
|
|
mostek_minutes = iregs->clk.int_min;
|
|
|
|
real_seconds = nowtime % 60;
|
|
real_minutes = nowtime / 60;
|
|
if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
|
|
real_minutes += 30; /* correct for half hour time zone */
|
|
real_minutes %= 60;
|
|
|
|
if (abs(real_minutes - mostek_minutes) < 30) {
|
|
intersil_stop(iregs);
|
|
iregs->clk.int_sec=real_seconds;
|
|
iregs->clk.int_min=real_minutes;
|
|
intersil_start(iregs);
|
|
} else {
|
|
printk(KERN_WARNING
|
|
"set_rtc_mmss: can't update from %d to %d\n",
|
|
mostek_minutes, real_minutes);
|
|
return -1;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
spin_lock_irqsave(&mostek_lock, flags);
|
|
/* Read the current RTC minutes. */
|
|
regs->creg |= MSTK_CREG_READ;
|
|
mostek_minutes = MSTK_REG_MIN(regs);
|
|
regs->creg &= ~MSTK_CREG_READ;
|
|
|
|
/*
|
|
* since we're only adjusting minutes and seconds,
|
|
* don't interfere with hour overflow. This avoids
|
|
* messing with unknown time zones but requires your
|
|
* RTC not to be off by more than 15 minutes
|
|
*/
|
|
real_seconds = nowtime % 60;
|
|
real_minutes = nowtime / 60;
|
|
if (((abs(real_minutes - mostek_minutes) + 15)/30) & 1)
|
|
real_minutes += 30; /* correct for half hour time zone */
|
|
real_minutes %= 60;
|
|
|
|
if (abs(real_minutes - mostek_minutes) < 30) {
|
|
regs->creg |= MSTK_CREG_WRITE;
|
|
MSTK_SET_REG_SEC(regs,real_seconds);
|
|
MSTK_SET_REG_MIN(regs,real_minutes);
|
|
regs->creg &= ~MSTK_CREG_WRITE;
|
|
spin_unlock_irqrestore(&mostek_lock, flags);
|
|
return 0;
|
|
} else {
|
|
spin_unlock_irqrestore(&mostek_lock, flags);
|
|
return -1;
|
|
}
|
|
}
|