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s/wubsytem/subsystem/ Link: https://lore.kernel.org/r/20210322022751.4137205-1-unixbhaskar@gmail.com Signed-off-by: Bhaskar Chowdhury <unixbhaskar@gmail.com> Acked-by: Weihang Li <liweihang@huawei.com> Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
109 lines
2.7 KiB
Plaintext
109 lines
2.7 KiB
Plaintext
Hisilicon RoCE DT description
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Hisilicon RoCE engine is a part of network subsystem.
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It works depending on other part of network subsystem, such as gmac and
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dsa fabric.
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Additional properties are described here:
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Required properties:
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- compatible: Should contain "hisilicon,hns-roce-v1".
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- reg: Physical base address of the RoCE driver and
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length of memory mapped region.
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- eth-handle: phandle, specifies a reference to a node
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representing a ethernet device.
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- dsaf-handle: phandle, specifies a reference to a node
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representing a dsaf device.
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- node_guid: a number that uniquely identifies a device or component
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- #address-cells: must be 2
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- #size-cells: must be 2
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Optional properties:
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- dma-coherent: Present if DMA operations are coherent.
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- interrupts: should contain 32 completion event irq,1 async event irq
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and 1 event overflow irq.
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- interrupt-names:should be one of 34 irqs for roce device
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- hns-roce-comp-0 ~ hns-roce-comp-31: 32 complete event irq
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- hns-roce-async: 1 async event irq
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- hns-roce-common: named common exception warning irq
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Example:
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infiniband@c4000000 {
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compatible = "hisilicon,hns-roce-v1";
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reg = <0x0 0xc4000000 0x0 0x100000>;
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dma-coherent;
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eth-handle = <ð2 ð3 ð4 ð5 ð6 ð7>;
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dsaf-handle = <&soc0_dsa>;
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node-guid = [00 9A CD 00 00 01 02 03];
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&mbigen_dsa>;
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interrupts = <722 1>,
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<723 1>,
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<724 1>,
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<725 1>,
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<726 1>,
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<727 1>,
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<728 1>,
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<729 1>,
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<730 1>,
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<731 1>,
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<732 1>,
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<733 1>,
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<734 1>,
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<735 1>,
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<736 1>,
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<737 1>,
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<738 1>,
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<739 1>,
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<740 1>,
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<741 1>,
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<742 1>,
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<743 1>,
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<744 1>,
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<745 1>,
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<746 1>,
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<747 1>,
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<748 1>,
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<749 1>,
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<750 1>,
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<751 1>,
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<752 1>,
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<753 1>,
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<785 1>,
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<754 4>;
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interrupt-names = "hns-roce-comp-0",
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"hns-roce-comp-1",
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"hns-roce-comp-2",
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"hns-roce-comp-3",
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"hns-roce-comp-4",
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"hns-roce-comp-5",
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"hns-roce-comp-6",
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"hns-roce-comp-7",
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"hns-roce-comp-8",
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"hns-roce-comp-9",
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"hns-roce-comp-10",
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"hns-roce-comp-11",
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"hns-roce-comp-12",
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"hns-roce-comp-13",
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"hns-roce-comp-14",
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"hns-roce-comp-15",
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"hns-roce-comp-16",
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"hns-roce-comp-17",
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"hns-roce-comp-18",
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"hns-roce-comp-19",
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"hns-roce-comp-20",
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"hns-roce-comp-21",
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"hns-roce-comp-22",
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"hns-roce-comp-23",
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"hns-roce-comp-24",
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"hns-roce-comp-25",
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"hns-roce-comp-26",
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"hns-roce-comp-27",
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"hns-roce-comp-28",
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"hns-roce-comp-29",
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"hns-roce-comp-30",
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"hns-roce-comp-31",
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"hns-roce-async",
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"hns-roce-common";
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};
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