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60838878e1
Update my email address from the defunct codeaurora.org domain to the current quicinc.com domain. Signed-off-by: Taniya Das <quic_tdas@quicinc.com> Acked-by: Rob Herring <robh@kernel.org> Reviewed-by: Jeffrey Hugo <quic_jhugo@quicinc.com> Link: https://lore.kernel.org/r/20230627173123.9221-1-quic_tdas@quicinc.com Signed-off-by: Bjorn Andersson <andersson@kernel.org>
69 lines
1.4 KiB
YAML
69 lines
1.4 KiB
YAML
# SPDX-License-Identifier: GPL-2.0-only
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/clock/qcom,msm8998-gpucc.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: Qualcomm Graphics Clock & Reset Controller on MSM8998
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maintainers:
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- Taniya Das <quic_tdas@quicinc.com>
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description: |
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Qualcomm graphics clock control module provides the clocks, resets and power
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domains on MSM8998.
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See also:: include/dt-bindings/clock/qcom,gpucc-msm8998.h
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properties:
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compatible:
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const: qcom,msm8998-gpucc
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clocks:
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items:
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- description: Board XO source
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- description: GPLL0 main branch source (gcc_gpu_gpll0_clk_src)
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clock-names:
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items:
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- const: xo
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- const: gpll0
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'#clock-cells':
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const: 1
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'#reset-cells':
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const: 1
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'#power-domain-cells':
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const: 1
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reg:
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maxItems: 1
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required:
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- compatible
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- reg
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- clocks
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- clock-names
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- '#clock-cells'
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- '#reset-cells'
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- '#power-domain-cells'
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additionalProperties: false
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examples:
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- |
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#include <dt-bindings/clock/qcom,gcc-msm8998.h>
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#include <dt-bindings/clock/qcom,rpmcc.h>
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clock-controller@5065000 {
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compatible = "qcom,msm8998-gpucc";
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#clock-cells = <1>;
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#reset-cells = <1>;
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#power-domain-cells = <1>;
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reg = <0x05065000 0x9000>;
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clocks = <&rpmcc RPM_SMD_XO_CLK_SRC>, <&gcc GPLL0_OUT_MAIN>;
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clock-names = "xo", "gpll0";
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};
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...
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