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In some cases, when probing a perf MSR, we're probing certain bits of the MSR instead of the whole register, thus only these bits should be checked. For example, for RAPL ENERGY_STATUS MSR, only the lower 32 bits represents the energy counter, and the higher 32bits are reserved. Introduce a new mask field in struct perf_msr to allow probing certain bits of a MSR. This change is transparent to the current perf_msr_probe() users. Signed-off-by: Zhang Rui <rui.zhang@intel.com> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Andi Kleen <ak@linux.intel.com> Link: https://lkml.kernel.org/r/20210204161816.12649-1-rui.zhang@intel.com
31 lines
710 B
C
31 lines
710 B
C
/* SPDX-License-Identifier: GPL-2.0 */
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#ifndef __ARCH_X86_EVENTS_PROBE_H__
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#define __ARCH_X86_EVENTS_PROBE_H__
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#include <linux/sysfs.h>
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struct perf_msr {
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u64 msr;
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struct attribute_group *grp;
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bool (*test)(int idx, void *data);
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bool no_check;
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u64 mask;
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};
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unsigned long
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perf_msr_probe(struct perf_msr *msr, int cnt, bool no_zero, void *data);
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#define __PMU_EVENT_GROUP(_name) \
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static struct attribute *attrs_##_name[] = { \
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&attr_##_name.attr.attr, \
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NULL, \
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}
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#define PMU_EVENT_GROUP(_grp, _name) \
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__PMU_EVENT_GROUP(_name); \
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static struct attribute_group group_##_name = { \
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.name = #_grp, \
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.attrs = attrs_##_name, \
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}
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#endif /* __ARCH_X86_EVENTS_PROBE_H__ */
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