Chen-Yu Tsai 5682e26835 clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops ... When support for the A31/A31s CCU was first added, the clock ops for the CLK_OUT_* clocks was set to the wrong type. The clocks are MP-type, but the ops was set for div (M) clocks. This went unnoticed until now. This was because while they are different clocks, their data structures aligned in a way that ccu_div_ops would access the second ccu_div_internal and ccu_mux_internal structures, which were valid, if not incorrect. Furthermore, the use of these CLK_OUT_* was for feeding a precise 32.768 kHz clock signal to the WiFi chip. This was achievable by using the parent with the same clock rate and no divider. So the incorrect divider setting did not affect this usage. Commit 946797aa3f ("clk: sunxi-ng: Support fixed post-dividers on MP style clocks") added a new field to the ccu_mp structure, which broke the aforementioned alignment. Now the system crashes as div_ops tries to look up a nonexistent table. Reported-by: Philipp Rossak <embed3d@gmail.com> Tested-by: Philipp Rossak <embed3d@gmail.com> Fixes: c6e6c96d8f ("clk: sunxi-ng: Add A31/A31s clocks") Cc: <stable@vger.kernel.org> Signed-off-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>		2018-02-19 08:59:50 +01:00
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ccu_common.c	Allwinner clock patches for 4.12	2017-04-19 09:02:00 -07:00
ccu_common.h	clk: move clock common macros out from vendor directories	2017-12-21 15:00:38 -08:00
ccu_div.c	clk: divider: fix incorrect usage of container_of	2017-12-28 15:16:04 -08:00
ccu_div.h	clk: sunxi-ng: div: Add support for fixed post-divider	2017-08-14 22:31:46 +08:00
ccu_frac.c	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_frac.h	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_gate.c	clk: sunxi-ng: gate: Support common pre-dividers	2017-03-06 10:25:56 +01:00
ccu_gate.h	clk: sunxi-ng: Add gate clock support	2016-07-08 18:04:38 -07:00
ccu_mmc_timing.c	clk: sunxi-ng: Add interface to query or configure MMC timing modes.	2017-08-30 14:01:47 +02:00
ccu_mp.c	clk: sunxi-ng: Support fixed post-dividers on MP style clocks	2017-12-07 10:09:44 +01:00
ccu_mp.h	clk: sunxi-ng: Support fixed post-dividers on MP style clocks	2017-12-07 10:09:44 +01:00
ccu_mult.c	clk: sunxi-ng: Wait for lock when using fractional mode	2017-08-01 10:18:23 +08:00
ccu_mult.h	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
ccu_mux.c	clk: sunxi-ng: Staticize ccu_mux_helper_unapply_prediv()	2017-06-16 14:51:36 -07:00
ccu_mux.h	License cleanup: add SPDX GPL-2.0 license identifier to files with no license	2017-11-02 11:10:55 +01:00
ccu_nk.c	clk: sunxi-ng: use 1 as fallback for minimum multiplier	2017-04-13 14:09:25 +02:00
ccu_nk.h	clk: sunxi-ng: Rename the internal structures	2016-10-20 19:24:20 +02:00
ccu_nkm.c	clk: sunxi-ng: nkm: add support for fixed post-divider	2017-08-14 22:45:06 +08:00
ccu_nkm.h	clk: sunxi-ng: nkm: add support for fixed post-divider	2017-08-14 22:45:06 +08:00
ccu_nkmp.c	Allwinner clock changes, take 2	2017-04-21 19:19:46 -07:00
ccu_nkmp.h	clk: sunxi-ng: Rename the internal structures	2016-10-20 19:24:20 +02:00
ccu_nm.c	clk: sunxi-ng: Support fixed post-dividers on NM style clocks	2017-12-08 10:08:07 +01:00
ccu_nm.h	clk: sunxi-ng: Support fixed post-dividers on NM style clocks	2017-12-08 10:08:07 +01:00
ccu_phase.c	clk: sunxi-ng: Add phase clock support	2016-07-08 18:04:45 -07:00
ccu_phase.h	clk: sunxi-ng: Add phase clock support	2016-07-08 18:04:45 -07:00
ccu_reset.c	clk: sunxi-ng: Implement reset control status readback	2017-09-26 11:13:03 +02:00
ccu_reset.h	clk: sunxi-ng: explicitly include linux/spinlock.h	2017-06-07 15:32:12 +02:00
ccu_sdm.c	clk: sunxi-ng: Add sigma-delta modulation support	2017-10-13 09:27:06 +02:00
ccu_sdm.h	clk: sunxi-ng: Add sigma-delta modulation support	2017-10-13 09:27:06 +02:00
ccu-sun4i-a10.c	clk: sunxi-ng: sun4i: Use sigma-delta modulation for audio PLL	2017-10-13 09:27:23 +02:00
ccu-sun4i-a10.h	clk: sunxi-ng: sun4i: Export video PLLs	2017-10-17 19:32:16 +02:00
ccu-sun5i.c	clk: sunxi-ng: sun5i: Use sigma-delta modulation for audio PLL	2017-10-13 09:27:29 +02:00
ccu-sun5i.h	clk: sunxi-ng: sun5i: Export video PLLs	2017-06-07 15:32:14 +02:00
ccu-sun6i-a31.c	clk: sunxi-ng: a31: Fix CLK_OUT_* clock ops	2018-02-19 08:59:50 +01:00
ccu-sun6i-a31.h	clk: sunxi-ng: sun6i: Export video PLLs	2017-09-29 10:46:10 +02:00
ccu-sun8i-a23-a33.h	clk: sunxi-ng: Add A33 CCU support	2016-09-10 11:41:19 +02:00
ccu-sun8i-a23.c	clk: sunxi-ng: sun8i: a23: Use sigma-delta modulation for audio PLL	2017-10-13 09:27:38 +02:00
ccu-sun8i-a33.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-a83t.c	clk: sunxi-ng: a83t: Add M divider to TCON1 clock	2018-01-03 13:45:04 +08:00
ccu-sun8i-a83t.h	clk: sunxi-ng: Add driver for A83T CCU	2017-06-07 15:32:16 +02:00
ccu-sun8i-de2.c	clk: sunxi-ng: fix the A64/H5 clock description of DE2 CCU	2017-12-29 16:15:14 +08:00
ccu-sun8i-de2.h	clk: sunxi-ng: add support for DE2 CCU	2017-06-07 15:32:12 +02:00
ccu-sun8i-h3.c	clk: sunxi-ng: sun8i: h3: Use sigma-delta modulation for audio PLL	2017-10-13 09:27:18 +02:00
ccu-sun8i-h3.h	clk: sunxi-ng: h3: Export PLL_PERIPH0 clock for the PRCM	2017-05-31 21:57:27 +02:00
ccu-sun8i-r40.c	clk: sunxi-ng: support R40 SoC	2017-08-19 17:04:37 +08:00
ccu-sun8i-r40.h	clk: sunxi-ng: support R40 SoC	2017-08-19 17:04:37 +08:00
ccu-sun8i-r.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-r.h	clk: sunxi-ng: Fix header guard of ccu-sun8i-r.h	2017-07-27 16:53:47 +02:00
ccu-sun8i-v3s.c	clk: Convert to using %pOF instead of full_name	2017-07-21 15:49:54 -07:00
ccu-sun8i-v3s.h	clk: sunxi-ng: add support for V3s CCU	2017-01-20 21:39:03 +01:00
ccu-sun9i-a80-de.c	clk: sunxi-ng: sun9i-a80: Fix wrong pointer passed to PTR_ERR()	2017-02-06 15:01:29 -08:00
ccu-sun9i-a80-de.h	clk: sunxi-ng: Add A80 Display Engine CCU	2017-01-30 08:38:30 +01:00
ccu-sun9i-a80-usb.c	clk: sunxi-ng: Add A80 USB CCU	2017-01-30 08:37:51 +01:00
ccu-sun9i-a80-usb.h	clk: sunxi-ng: Add A80 USB CCU	2017-01-30 08:37:51 +01:00
ccu-sun9i-a80.c	clk: sunxi-ng: a80: Fix audio PLL comment not matching actual code	2017-04-13 14:09:30 +02:00
ccu-sun9i-a80.h	clk: sunxi-ng: Add A80 CCU	2017-01-30 08:37:30 +01:00
ccu-sun50i-a64.c	clk: sunxi-ng: sun50i: a64: Add 2x fixed post-divider to MMC module clocks	2017-12-07 10:09:57 +01:00
ccu-sun50i-a64.h	clk: sunxi-ng: a64: Export PLL_PERIPH0 clock for the PRCM	2017-05-31 21:57:30 +02:00
Kconfig	clk: sunxi-ng: Add sun4i/sun7i CCU driver	2017-08-24 10:15:54 +02:00
Makefile	We have two changes to the core framework this time around. The first being a	2017-11-17 20:04:24 -08:00