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The r4k_on_each_cpu() function calls the specified cache flush helper on other CPUs if deemed necessary due to the cache ops not being globalized by hardware. However this really depends on the cache op addressing type, as the MIPS Coherence Manager (CM) if present will globalize "hit" cache ops (addressed by virtual address), but not "index" cache ops (addressed by cache index). This results in index cache ops only being performed on a single CPU when CM is present. Most (but not all) of the functions called by r4k_on_each_cpu() perform cache operations exclusively with a single cache op type, so add a type argument and modify the callers to pass in some combination of R4K_HIT (global kernel virtual addressing or user virtual addressing conditional upon matching active_mm) and R4K_INDEX (index into cache). This will allow r4k_on_each_cpu() to later distinguish these cases and decide whether to perform an SMP call based on it. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Leonid Yegoshin <leonid.yegoshin@imgtec.com> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/13798/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org> |
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| .. | ||
| c-octeon.c | ||
| c-r3k.c | ||
| c-r4k.c | ||
| c-tx39.c | ||
| cache.c | ||
| cerr-sb1.c | ||
| cex-gen.S | ||
| cex-oct.S | ||
| cex-sb1.S | ||
| dma-default.c | ||
| extable.c | ||
| fault.c | ||
| gup.c | ||
| highmem.c | ||
| hugetlbpage.c | ||
| init.c | ||
| ioremap.c | ||
| Makefile | ||
| mmap.c | ||
| page-funcs.S | ||
| page.c | ||
| pgtable-32.c | ||
| pgtable-64.c | ||
| sc-debugfs.c | ||
| sc-ip22.c | ||
| sc-mips.c | ||
| sc-r5k.c | ||
| sc-rm7k.c | ||
| tlb-funcs.S | ||
| tlb-r3k.c | ||
| tlb-r4k.c | ||
| tlb-r8k.c | ||
| tlbex-fault.S | ||
| tlbex.c | ||
| uasm-micromips.c | ||
| uasm-mips.c | ||
| uasm.c | ||