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-----BEGIN PGP SIGNATURE-----
Version: GnuPG v1.4.11 (GNU/Linux)
iQIcBAABAgAGBQJRYuw1AAoJEA0Cl+kVi2xq53MP/Rimo8kL9e/dMrgxqvtQ198N
csKzsAvOFSI69x0VupVOGfMSMDmltIaimyljJO3YrUvy+UOS3irWTHqu1JKq8+HX
oaym2KirVFpGjcll4E2nyeZ18vL8Czt0bNPh2QVuHinwbETtAuq0CBfeAQLWA1Xs
I/bbVKryocLwMNd5iqttSwGVwNZz14ceheliSHkneDeTaZJYQ0nSCLL7qmXncRFl
Z1Xe4aZRTdiU8JZiRN6G3Q2UdhcKRwZPSZrftbVpDRBegnaZp6htUszD2GFX3SJH
lV4ifgh9XVawRPE8Op00lX9fEjGe3EDP5kqqFRqht+mvr15vs2eFNiIIYOyjvBDU
GfCK2Ij2QaUCiIweJOcO5SGkLKYqyVg+G5k7Z5M5FGwwBhEdZRPkZE++9cWG8K/m
ziuJxAl9fK47NwUk4oz15e6JD6gFbEwqYf1f7RdvdRBiclarIuk2rha9BsoeOFM3
LBpGhWW4rcwEH87e0MjkvoopYl4ZHLtiZYk6cEg0rmAxKLvQjdZCZM+A707RG6DC
CZiY6Iu5pSOIz4FweY42mXaANkdBlzn4r7/cPJj7S4umQlkEjYtwXEEziK50lc+g
b7aZEvztQhFDw3lHhFeR44FCy7a1r5NjAZASshHJ72h3xNXrp+9bbugpbkdQVUKj
tpL2eMZQn/lK6T1h8SwE
=JEIy
-----END PGP SIGNATURE-----
Merge tag 'clk-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into next/drivers
From Kukjin Kim <kgene.kim@samsung.com>:
add suppport common clock framework for exynos
* tag 'clk-exynos-for-v3.10' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung: (73 commits)
ARM: EXYNOS: fix compilation error introduced due to common clock migration
clk: exynos5250: Fix divider values for sclk_mmc{0,1,2,3}
clk: exynos4: export clocks required for fimc-is
clk: samsung: Fix compilation error
clk: exynos5250: register display block gate clocks to common clock framework
clk: exynos4: Add support for SoC-specific register save list
clk: exynos4: Add missing registers to suspend save list
clk: exynos4: Remove E4X12 prefix from SRC_DMC register
clk: exynos4: Add E4210 prefix to GATE_IP_PERIR register
clk: exynos4: Add E4210 prefix to LCD1 clock registers
clk: exynos4: Remove SoC-specific registers from save list
clk: exynos4: Use SRC_MASK_PERIL{0,1} definitions
clk: exynos4: Define {E,V}PLL registers
clk: exynos4: Add missing mout_sata on Exynos4210
clk: exynos4: Add missing CMU_TOP and ISP clocks
clk: exynos4: Add G3D clocks
clk: exynos4: Add camera related clock definitions
clk: exynos4: Export mout_core clock of Exynos4210
clk: samsung: Remove unimplemented ops for pll
clk: exynos4: Export clocks used by exynos cpufreq drivers
...
[arnd: add missing #address-cells property in mshc DT node]
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
112 lines
2.1 KiB
Plaintext
112 lines
2.1 KiB
Plaintext
/*
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* Hardkernel's Exynos4412 based ODROID-X board device tree source
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*
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* Copyright (c) 2012 Dongjin Kim <tobetter@gmail.com>
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*
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* Device tree source file for Hardkernel's ODROID-X board which is based on
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* Samsung's Exynos4412 SoC.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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/include/ "exynos4412.dtsi"
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/ {
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model = "Hardkernel ODROID-X board based on Exynos4412";
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compatible = "hardkernel,odroid-x", "samsung,exynos4412";
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memory {
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reg = <0x40000000 0x40000000>;
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};
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leds {
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compatible = "gpio-leds";
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led1 {
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label = "led1:heart";
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gpios = <&gpc1 0 1>;
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default-state = "on";
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linux,default-trigger = "heartbeat";
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};
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led2 {
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label = "led2:mmc0";
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gpios = <&gpc1 2 1>;
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default-state = "on";
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linux,default-trigger = "mmc0";
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};
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};
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mshc@12550000 {
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#address-cells = <1>;
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#size-cells = <0>;
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pinctrl-0 = <&sd4_clk &sd4_cmd &sd4_bus4 &sd4_bus8>;
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pinctrl-names = "default";
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status = "okay";
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num-slots = <1>;
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supports-highspeed;
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broken-cd;
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fifo-depth = <0x80>;
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card-detect-delay = <200>;
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samsung,dw-mshc-ciu-div = <3>;
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samsung,dw-mshc-sdr-timing = <2 3>;
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samsung,dw-mshc-ddr-timing = <1 2>;
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slot@0 {
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reg = <0>;
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bus-width = <8>;
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};
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};
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regulator_p3v3 {
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compatible = "regulator-fixed";
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regulator-name = "p3v3_en";
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regulator-min-microvolt = <3300000>;
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regulator-max-microvolt = <3300000>;
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gpio = <&gpa1 1 1>;
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enable-active-high;
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regulator-boot-on;
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};
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rtc@10070000 {
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status = "okay";
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};
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sdhci@12530000 {
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bus-width = <4>;
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pinctrl-0 = <&sd2_clk &sd2_cmd &sd2_cd &sd2_bus4>;
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pinctrl-names = "default";
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status = "okay";
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};
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serial@13800000 {
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status = "okay";
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};
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serial@13810000 {
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status = "okay";
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};
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serial@13820000 {
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status = "okay";
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};
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serial@13830000 {
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status = "okay";
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};
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fixed-rate-clocks {
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xxti {
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compatible = "samsung,clock-xxti";
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clock-frequency = <0>;
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};
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xusbxti {
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compatible = "samsung,clock-xusbxti";
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clock-frequency = <24000000>;
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};
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};
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};
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