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Ralink architecture is making use of the header located in 'arch/mips/include/asm/mach-ralink/pinmux.h' to stablish the mechanisms to make derived SoCs to set its pin functions and groups. In order to move all architecture pinmux into a more accurate place which is 'drivers/pinctrl/ralink' we have to first of all move this file also there with a small modification which creates 'rt2880_pinmux_init' function to allow SoCs pinctrl drivers to pass its configuration to the common code located in 'pinctrl-rt2880.c' file. Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com> Link: https://lore.kernel.org/r/20210604115159.8834-2-sergio.paracuellos@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
54 lines
1.0 KiB
C
54 lines
1.0 KiB
C
/* SPDX-License-Identifier: GPL-2.0-only */
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/*
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* Copyright (C) 2012 John Crispin <john@phrozen.org>
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*/
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#ifndef _RT288X_PINMUX_H__
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#define _RT288X_PINMUX_H__
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#define FUNC(name, value, pin_first, pin_count) \
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{ name, value, pin_first, pin_count }
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#define GRP(_name, _func, _mask, _shift) \
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{ .name = _name, .mask = _mask, .shift = _shift, \
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.func = _func, .gpio = _mask, \
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.func_count = ARRAY_SIZE(_func) }
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#define GRP_G(_name, _func, _mask, _gpio, _shift) \
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{ .name = _name, .mask = _mask, .shift = _shift, \
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.func = _func, .gpio = _gpio, \
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.func_count = ARRAY_SIZE(_func) }
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struct rt2880_pmx_group;
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struct rt2880_pmx_func {
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const char *name;
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const char value;
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int pin_first;
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int pin_count;
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int *pins;
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int *groups;
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int group_count;
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int enabled;
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};
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struct rt2880_pmx_group {
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const char *name;
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int enabled;
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const u32 shift;
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const char mask;
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const char gpio;
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struct rt2880_pmx_func *func;
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int func_count;
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};
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int rt2880_pinmux_init(struct platform_device *pdev,
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struct rt2880_pmx_group *data);
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#endif
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