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838691a1c0
All the comments which explains how HVO works are moved to
vmemmap_dedup.rst since
commit 4917f55b4e ("mm/sparse-vmemmap: improve memory savings for compound devmaps")
except some comments above page_fixed_fake_head(). This commit moves
those comments to vmemmap_dedup.rst and improve vmemmap_dedup.rst as well.
Link: https://lkml.kernel.org/r/20220628092235.91270-8-songmuchun@bytedance.com
Signed-off-by: Muchun Song <songmuchun@bytedance.com>
Cc: Anshuman Khandual <anshuman.khandual@arm.com>
Cc: Catalin Marinas <catalin.marinas@arm.com>
Cc: David Hildenbrand <david@redhat.com>
Cc: Jonathan Corbet <corbet@lwn.net>
Cc: Mike Kravetz <mike.kravetz@oracle.com>
Cc: Oscar Salvador <osalvador@suse.de>
Cc: Will Deacon <will@kernel.org>
Cc: Xiongchun Duan <duanxiongchun@bytedance.com>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
250 lines
12 KiB
ReStructuredText
250 lines
12 KiB
ReStructuredText
.. SPDX-License-Identifier: GPL-2.0
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=========================================
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A vmemmap diet for HugeTLB and Device DAX
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=========================================
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HugeTLB
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=======
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This section is to explain how HugeTLB Vmemmap Optimization (HVO) works.
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The ``struct page`` structures are used to describe a physical page frame. By
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default, there is a one-to-one mapping from a page frame to it's corresponding
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``struct page``.
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HugeTLB pages consist of multiple base page size pages and is supported by many
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architectures. See Documentation/admin-guide/mm/hugetlbpage.rst for more
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details. On the x86-64 architecture, HugeTLB pages of size 2MB and 1GB are
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currently supported. Since the base page size on x86 is 4KB, a 2MB HugeTLB page
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consists of 512 base pages and a 1GB HugeTLB page consists of 4096 base pages.
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For each base page, there is a corresponding ``struct page``.
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Within the HugeTLB subsystem, only the first 4 ``struct page`` are used to
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contain unique information about a HugeTLB page. ``__NR_USED_SUBPAGE`` provides
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this upper limit. The only 'useful' information in the remaining ``struct page``
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is the compound_head field, and this field is the same for all tail pages.
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By removing redundant ``struct page`` for HugeTLB pages, memory can be returned
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to the buddy allocator for other uses.
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Different architectures support different HugeTLB pages. For example, the
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following table is the HugeTLB page size supported by x86 and arm64
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architectures. Because arm64 supports 4k, 16k, and 64k base pages and
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supports contiguous entries, so it supports many kinds of sizes of HugeTLB
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page.
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+--------------+-----------+-----------------------------------------------+
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| Architecture | Page Size | HugeTLB Page Size |
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+--------------+-----------+-----------+-----------+-----------+-----------+
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| x86-64 | 4KB | 2MB | 1GB | | |
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+--------------+-----------+-----------+-----------+-----------+-----------+
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| | 4KB | 64KB | 2MB | 32MB | 1GB |
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| +-----------+-----------+-----------+-----------+-----------+
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| arm64 | 16KB | 2MB | 32MB | 1GB | |
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| +-----------+-----------+-----------+-----------+-----------+
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| | 64KB | 2MB | 512MB | 16GB | |
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+--------------+-----------+-----------+-----------+-----------+-----------+
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When the system boot up, every HugeTLB page has more than one ``struct page``
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structs which size is (unit: pages)::
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struct_size = HugeTLB_Size / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE
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Where HugeTLB_Size is the size of the HugeTLB page. We know that the size
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of the HugeTLB page is always n times PAGE_SIZE. So we can get the following
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relationship::
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HugeTLB_Size = n * PAGE_SIZE
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Then::
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struct_size = n * PAGE_SIZE / PAGE_SIZE * sizeof(struct page) / PAGE_SIZE
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= n * sizeof(struct page) / PAGE_SIZE
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We can use huge mapping at the pud/pmd level for the HugeTLB page.
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For the HugeTLB page of the pmd level mapping, then::
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struct_size = n * sizeof(struct page) / PAGE_SIZE
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= PAGE_SIZE / sizeof(pte_t) * sizeof(struct page) / PAGE_SIZE
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= sizeof(struct page) / sizeof(pte_t)
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= 64 / 8
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= 8 (pages)
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Where n is how many pte entries which one page can contains. So the value of
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n is (PAGE_SIZE / sizeof(pte_t)).
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This optimization only supports 64-bit system, so the value of sizeof(pte_t)
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is 8. And this optimization also applicable only when the size of ``struct page``
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is a power of two. In most cases, the size of ``struct page`` is 64 bytes (e.g.
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x86-64 and arm64). So if we use pmd level mapping for a HugeTLB page, the
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size of ``struct page`` structs of it is 8 page frames which size depends on the
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size of the base page.
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For the HugeTLB page of the pud level mapping, then::
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struct_size = PAGE_SIZE / sizeof(pmd_t) * struct_size(pmd)
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= PAGE_SIZE / 8 * 8 (pages)
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= PAGE_SIZE (pages)
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Where the struct_size(pmd) is the size of the ``struct page`` structs of a
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HugeTLB page of the pmd level mapping.
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E.g.: A 2MB HugeTLB page on x86_64 consists in 8 page frames while 1GB
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HugeTLB page consists in 4096.
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Next, we take the pmd level mapping of the HugeTLB page as an example to
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show the internal implementation of this optimization. There are 8 pages
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``struct page`` structs associated with a HugeTLB page which is pmd mapped.
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Here is how things look before optimization::
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HugeTLB struct pages(8 pages) page frame(8 pages)
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+-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+
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| | | 0 | -------------> | 0 |
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| | +-----------+ +-----------+
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| | | 1 | -------------> | 1 |
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| | +-----------+ +-----------+
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| | | 2 | -------------> | 2 |
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| | +-----------+ +-----------+
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| | | 3 | -------------> | 3 |
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| | +-----------+ +-----------+
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| | | 4 | -------------> | 4 |
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| PMD | +-----------+ +-----------+
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| level | | 5 | -------------> | 5 |
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| mapping | +-----------+ +-----------+
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| | | 6 | -------------> | 6 |
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| | +-----------+ +-----------+
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| | | 7 | -------------> | 7 |
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| | +-----------+ +-----------+
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+-----------+
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The value of page->compound_head is the same for all tail pages. The first
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page of ``struct page`` (page 0) associated with the HugeTLB page contains the 4
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``struct page`` necessary to describe the HugeTLB. The only use of the remaining
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pages of ``struct page`` (page 1 to page 7) is to point to page->compound_head.
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Therefore, we can remap pages 1 to 7 to page 0. Only 1 page of ``struct page``
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will be used for each HugeTLB page. This will allow us to free the remaining
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7 pages to the buddy allocator.
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Here is how things look after remapping::
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HugeTLB struct pages(8 pages) page frame(8 pages)
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+-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+
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| | | 0 | -------------> | 0 |
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| | +-----------+ +-----------+
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| | | 1 | ---------------^ ^ ^ ^ ^ ^ ^
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| | +-----------+ | | | | | |
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| | | 2 | -----------------+ | | | | |
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| | +-----------+ | | | | |
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| | | 3 | -------------------+ | | | |
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| | +-----------+ | | | |
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| | | 4 | ---------------------+ | | |
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| PMD | +-----------+ | | |
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| level | | 5 | -----------------------+ | |
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| mapping | +-----------+ | |
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| | | 6 | -------------------------+ |
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| | +-----------+ |
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| | | 7 | ---------------------------+
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+-----------+
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When a HugeTLB is freed to the buddy system, we should allocate 7 pages for
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vmemmap pages and restore the previous mapping relationship.
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For the HugeTLB page of the pud level mapping. It is similar to the former.
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We also can use this approach to free (PAGE_SIZE - 1) vmemmap pages.
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Apart from the HugeTLB page of the pmd/pud level mapping, some architectures
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(e.g. aarch64) provides a contiguous bit in the translation table entries
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that hints to the MMU to indicate that it is one of a contiguous set of
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entries that can be cached in a single TLB entry.
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The contiguous bit is used to increase the mapping size at the pmd and pte
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(last) level. So this type of HugeTLB page can be optimized only when its
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size of the ``struct page`` structs is greater than **1** page.
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Notice: The head vmemmap page is not freed to the buddy allocator and all
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tail vmemmap pages are mapped to the head vmemmap page frame. So we can see
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more than one ``struct page`` struct with ``PG_head`` (e.g. 8 per 2 MB HugeTLB
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page) associated with each HugeTLB page. The ``compound_head()`` can handle
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this correctly. There is only **one** head ``struct page``, the tail
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``struct page`` with ``PG_head`` are fake head ``struct page``. We need an
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approach to distinguish between those two different types of ``struct page`` so
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that ``compound_head()`` can return the real head ``struct page`` when the
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parameter is the tail ``struct page`` but with ``PG_head``. The following code
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snippet describes how to distinguish between real and fake head ``struct page``.
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.. code-block:: c
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if (test_bit(PG_head, &page->flags)) {
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unsigned long head = READ_ONCE(page[1].compound_head);
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if (head & 1) {
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if (head == (unsigned long)page + 1)
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/* head struct page */
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else
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/* tail struct page */
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} else {
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/* head struct page */
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}
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}
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We can safely access the field of the **page[1]** with ``PG_head`` because the
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page is a compound page composed with at least two contiguous pages.
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The implementation refers to ``page_fixed_fake_head()``.
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Device DAX
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==========
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The device-dax interface uses the same tail deduplication technique explained
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in the previous chapter, except when used with the vmemmap in
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the device (altmap).
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The following page sizes are supported in DAX: PAGE_SIZE (4K on x86_64),
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PMD_SIZE (2M on x86_64) and PUD_SIZE (1G on x86_64).
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The differences with HugeTLB are relatively minor.
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It only use 3 ``struct page`` for storing all information as opposed
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to 4 on HugeTLB pages.
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There's no remapping of vmemmap given that device-dax memory is not part of
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System RAM ranges initialized at boot. Thus the tail page deduplication
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happens at a later stage when we populate the sections. HugeTLB reuses the
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the head vmemmap page representing, whereas device-dax reuses the tail
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vmemmap page. This results in only half of the savings compared to HugeTLB.
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Deduplicated tail pages are not mapped read-only.
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Here's how things look like on device-dax after the sections are populated::
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+-----------+ ---virt_to_page---> +-----------+ mapping to +-----------+
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| | | 0 | -------------> | 0 |
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| | +-----------+ +-----------+
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| | | 1 | -------------> | 1 |
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| | +-----------+ +-----------+
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| | | 2 | ----------------^ ^ ^ ^ ^ ^
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| | +-----------+ | | | | |
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| | | 3 | ------------------+ | | | |
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| | +-----------+ | | | |
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| | | 4 | --------------------+ | | |
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| PMD | +-----------+ | | |
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| level | | 5 | ----------------------+ | |
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| mapping | +-----------+ | |
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| | | 6 | ------------------------+ |
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| | | 7 | --------------------------+
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+-----------+
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