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b268547c5c
Stopping streaming on a camera pipeline at system suspend time, and restarting it at system resume time, requires coordinated action between the bridge driver and the camera sensor driver. This is handled by the bridge driver calling the sensor's .s_stream() handler at system suspend and resume time. There is thus no need for the sensor to independently implement system sleep PM operations. Drop them. The streaming field of the driver's private structure is now unused, drop it as well. Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Sakari Ailus <sakari.ailus@linux.intel.com> Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
2831 lines
58 KiB
C
2831 lines
58 KiB
C
// SPDX-License-Identifier: GPL-2.0
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// Copyright (c) 2017 Intel Corporation.
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#include <asm/unaligned.h>
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#include <linux/acpi.h>
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#include <linux/clk.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/pm_runtime.h>
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#include <linux/regulator/consumer.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-event.h>
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#include <media/v4l2-fwnode.h>
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#define OV5670_XVCLK_FREQ 19200000
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#define OV5670_REG_CHIP_ID 0x300a
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#define OV5670_CHIP_ID 0x005670
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#define OV5670_REG_MODE_SELECT 0x0100
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#define OV5670_MODE_STANDBY 0x00
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#define OV5670_MODE_STREAMING 0x01
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#define OV5670_REG_SOFTWARE_RST 0x0103
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#define OV5670_SOFTWARE_RST 0x01
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#define OV5670_MIPI_SC_CTRL0_REG 0x3018
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#define OV5670_MIPI_SC_CTRL0_LANES(v) ((((v) - 1) << 5) & \
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GENMASK(7, 5))
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#define OV5670_MIPI_SC_CTRL0_MIPI_EN BIT(4)
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#define OV5670_MIPI_SC_CTRL0_RESERVED BIT(1)
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/* vertical-timings from sensor */
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#define OV5670_REG_VTS 0x380e
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#define OV5670_VTS_30FPS 0x0808 /* default for 30 fps */
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#define OV5670_VTS_MAX 0xffff
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/* horizontal-timings from sensor */
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#define OV5670_REG_HTS 0x380c
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/*
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* Pixels-per-line(PPL) = Time-per-line * pixel-rate
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* In OV5670, Time-per-line = HTS/SCLK.
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* HTS is fixed for all resolutions, not recommended to change.
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*/
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#define OV5670_FIXED_PPL 2724 /* Pixels per line */
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/* Exposure controls from sensor */
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#define OV5670_REG_EXPOSURE 0x3500
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#define OV5670_EXPOSURE_MIN 4
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#define OV5670_EXPOSURE_STEP 1
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/* Analog gain controls from sensor */
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#define OV5670_REG_ANALOG_GAIN 0x3508
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#define ANALOG_GAIN_MIN 0
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#define ANALOG_GAIN_MAX 8191
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#define ANALOG_GAIN_STEP 1
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#define ANALOG_GAIN_DEFAULT 128
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/* Digital gain controls from sensor */
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#define OV5670_REG_R_DGTL_GAIN 0x5032
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#define OV5670_REG_G_DGTL_GAIN 0x5034
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#define OV5670_REG_B_DGTL_GAIN 0x5036
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#define OV5670_DGTL_GAIN_MIN 0
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#define OV5670_DGTL_GAIN_MAX 4095
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#define OV5670_DGTL_GAIN_STEP 1
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#define OV5670_DGTL_GAIN_DEFAULT 1024
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/* Test Pattern Control */
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#define OV5670_REG_TEST_PATTERN 0x4303
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#define OV5670_TEST_PATTERN_ENABLE BIT(3)
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#define OV5670_REG_TEST_PATTERN_CTRL 0x4320
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#define OV5670_REG_VALUE_08BIT 1
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#define OV5670_REG_VALUE_16BIT 2
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#define OV5670_REG_VALUE_24BIT 3
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/* Pixel Array */
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#define OV5670_NATIVE_WIDTH 2624
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#define OV5670_NATIVE_HEIGHT 1980
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/* Initial number of frames to skip to avoid possible garbage */
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#define OV5670_NUM_OF_SKIP_FRAMES 2
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struct ov5670_reg {
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u16 address;
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u8 val;
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};
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struct ov5670_reg_list {
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u32 num_of_regs;
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const struct ov5670_reg *regs;
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};
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struct ov5670_link_freq_config {
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const struct ov5670_reg_list reg_list;
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};
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static const char * const ov5670_supply_names[] = {
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"avdd", /* Analog power */
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"dvdd", /* Digital power */
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"dovdd", /* Digital output power */
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};
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#define OV5670_NUM_SUPPLIES ARRAY_SIZE(ov5670_supply_names)
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struct ov5670_mode {
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/* Frame width in pixels */
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u32 width;
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/* Frame height in pixels */
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u32 height;
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/* Default vertical timining size */
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u32 vts_def;
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/* Min vertical timining size */
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u32 vts_min;
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/* Link frequency needed for this resolution */
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u32 link_freq_index;
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/* Analog crop rectangle */
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const struct v4l2_rect *analog_crop;
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/* Sensor register settings for this resolution */
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const struct ov5670_reg_list reg_list;
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};
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/*
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* All the modes supported by the driver are obtained by subsampling the
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* full pixel array. The below values are reflected in registers from
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* 0x3800-0x3807 in the modes register-value tables.
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*/
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static const struct v4l2_rect ov5670_analog_crop = {
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.left = 12,
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.top = 4,
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.width = 2600,
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.height = 1952,
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};
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static const struct ov5670_reg mipi_data_rate_840mbps[] = {
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{0x0300, 0x04},
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{0x0301, 0x00},
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{0x0302, 0x84},
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{0x0303, 0x00},
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{0x0304, 0x03},
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{0x0305, 0x01},
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{0x0306, 0x01},
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{0x030a, 0x00},
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{0x030b, 0x00},
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{0x030c, 0x00},
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{0x030d, 0x26},
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{0x030e, 0x00},
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{0x030f, 0x06},
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{0x0312, 0x01},
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{0x3031, 0x0a},
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};
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static const struct ov5670_reg mode_2592x1944_regs[] = {
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{0x3000, 0x00},
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{0x3002, 0x21},
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{0x3005, 0xf0},
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{0x3007, 0x00},
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{0x3015, 0x0f},
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{0x301a, 0xf0},
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{0x301b, 0xf0},
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{0x301c, 0xf0},
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{0x301d, 0xf0},
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{0x301e, 0xf0},
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{0x3030, 0x00},
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{0x3031, 0x0a},
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{0x303c, 0xff},
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{0x303e, 0xff},
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{0x3040, 0xf0},
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{0x3041, 0x00},
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{0x3042, 0xf0},
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{0x3106, 0x11},
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{0x3500, 0x00},
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{0x3501, 0x80},
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{0x3502, 0x00},
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{0x3503, 0x04},
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{0x3504, 0x03},
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{0x3505, 0x83},
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{0x3508, 0x04},
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{0x3509, 0x00},
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{0x350e, 0x04},
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{0x350f, 0x00},
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{0x3510, 0x00},
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{0x3511, 0x02},
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{0x3512, 0x00},
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{0x3601, 0xc8},
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{0x3610, 0x88},
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{0x3612, 0x48},
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{0x3614, 0x5b},
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{0x3615, 0x96},
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{0x3621, 0xd0},
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{0x3622, 0x00},
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{0x3623, 0x00},
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{0x3633, 0x13},
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{0x3634, 0x13},
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{0x3635, 0x13},
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{0x3636, 0x13},
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{0x3645, 0x13},
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{0x3646, 0x82},
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{0x3650, 0x00},
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{0x3652, 0xff},
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{0x3655, 0x20},
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{0x3656, 0xff},
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{0x365a, 0xff},
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{0x365e, 0xff},
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{0x3668, 0x00},
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{0x366a, 0x07},
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{0x366e, 0x10},
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{0x366d, 0x00},
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{0x366f, 0x80},
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{0x3700, 0x28},
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{0x3701, 0x10},
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{0x3702, 0x3a},
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{0x3703, 0x19},
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{0x3704, 0x10},
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{0x3705, 0x00},
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{0x3706, 0x66},
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{0x3707, 0x08},
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{0x3708, 0x34},
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{0x3709, 0x40},
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{0x370a, 0x01},
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{0x370b, 0x1b},
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{0x3714, 0x24},
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{0x371a, 0x3e},
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{0x3733, 0x00},
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{0x3734, 0x00},
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{0x373a, 0x05},
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{0x373b, 0x06},
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{0x373c, 0x0a},
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{0x373f, 0xa0},
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{0x3755, 0x00},
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{0x3758, 0x00},
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{0x375b, 0x0e},
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{0x3766, 0x5f},
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{0x3768, 0x00},
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{0x3769, 0x22},
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{0x3773, 0x08},
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{0x3774, 0x1f},
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{0x3776, 0x06},
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{0x37a0, 0x88},
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{0x37a1, 0x5c},
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{0x37a7, 0x88},
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{0x37a8, 0x70},
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{0x37aa, 0x88},
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{0x37ab, 0x48},
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{0x37b3, 0x66},
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{0x37c2, 0x04},
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{0x37c5, 0x00},
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{0x37c8, 0x00},
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{0x3800, 0x00},
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{0x3801, 0x0c},
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{0x3802, 0x00},
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{0x3803, 0x04},
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{0x3804, 0x0a},
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{0x3805, 0x33},
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{0x3806, 0x07},
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{0x3807, 0xa3},
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{0x3808, 0x0a},
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{0x3809, 0x20},
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{0x380a, 0x07},
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{0x380b, 0x98},
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{0x380c, 0x06},
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{0x380d, 0x90},
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{0x380e, 0x08},
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{0x380f, 0x08},
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{0x3811, 0x04},
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{0x3813, 0x02},
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{0x3814, 0x01},
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{0x3815, 0x01},
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{0x3816, 0x00},
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{0x3817, 0x00},
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{0x3818, 0x00},
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{0x3819, 0x00},
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{0x3820, 0x84},
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{0x3821, 0x46},
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{0x3822, 0x48},
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{0x3826, 0x00},
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{0x3827, 0x08},
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{0x382a, 0x01},
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{0x382b, 0x01},
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{0x3830, 0x08},
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{0x3836, 0x02},
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{0x3837, 0x00},
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{0x3838, 0x10},
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{0x3841, 0xff},
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{0x3846, 0x48},
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{0x3861, 0x00},
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{0x3862, 0x04},
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{0x3863, 0x06},
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{0x3a11, 0x01},
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{0x3a12, 0x78},
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{0x3b00, 0x00},
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{0x3b02, 0x00},
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{0x3b03, 0x00},
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{0x3b04, 0x00},
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{0x3b05, 0x00},
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{0x3c00, 0x89},
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{0x3c01, 0xab},
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{0x3c02, 0x01},
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{0x3c03, 0x00},
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{0x3c04, 0x00},
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{0x3c05, 0x03},
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{0x3c06, 0x00},
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{0x3c07, 0x05},
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{0x3c0c, 0x00},
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{0x3c0d, 0x00},
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{0x3c0e, 0x00},
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{0x3c0f, 0x00},
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{0x3c40, 0x00},
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{0x3c41, 0xa3},
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{0x3c43, 0x7d},
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{0x3c45, 0xd7},
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{0x3c47, 0xfc},
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{0x3c50, 0x05},
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{0x3c52, 0xaa},
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{0x3c54, 0x71},
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{0x3c56, 0x80},
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{0x3d85, 0x17},
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{0x3f03, 0x00},
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{0x3f0a, 0x00},
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{0x3f0b, 0x00},
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{0x4001, 0x60},
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{0x4009, 0x0d},
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{0x4020, 0x00},
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{0x4021, 0x00},
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{0x4022, 0x00},
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{0x4023, 0x00},
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{0x4024, 0x00},
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{0x4025, 0x00},
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{0x4026, 0x00},
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{0x4027, 0x00},
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{0x4028, 0x00},
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{0x4029, 0x00},
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{0x402a, 0x00},
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{0x402b, 0x00},
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{0x402c, 0x00},
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{0x402d, 0x00},
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{0x402e, 0x00},
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{0x402f, 0x00},
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{0x4040, 0x00},
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{0x4041, 0x03},
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{0x4042, 0x00},
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{0x4043, 0x7A},
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{0x4044, 0x00},
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{0x4045, 0x7A},
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{0x4046, 0x00},
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{0x4047, 0x7A},
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{0x4048, 0x00},
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{0x4049, 0x7A},
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{0x4307, 0x30},
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{0x4500, 0x58},
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{0x4501, 0x04},
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{0x4502, 0x40},
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{0x4503, 0x10},
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{0x4508, 0xaa},
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{0x4509, 0xaa},
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{0x450a, 0x00},
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{0x450b, 0x00},
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{0x4600, 0x01},
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{0x4601, 0x03},
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{0x4700, 0xa4},
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{0x4800, 0x4c},
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{0x4816, 0x53},
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{0x481f, 0x40},
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{0x4837, 0x13},
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{0x5000, 0x56},
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{0x5001, 0x01},
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{0x5002, 0x28},
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{0x5004, 0x0c},
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{0x5006, 0x0c},
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{0x5007, 0xe0},
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{0x5008, 0x01},
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{0x5009, 0xb0},
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{0x5901, 0x00},
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{0x5a01, 0x00},
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{0x5a03, 0x00},
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{0x5a04, 0x0c},
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{0x5a05, 0xe0},
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{0x5a06, 0x09},
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{0x5a07, 0xb0},
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{0x5a08, 0x06},
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{0x5e00, 0x00},
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{0x3734, 0x40},
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{0x5b00, 0x01},
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{0x5b01, 0x10},
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{0x5b02, 0x01},
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{0x5b03, 0xdb},
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{0x3d8c, 0x71},
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{0x3d8d, 0xea},
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{0x4017, 0x08},
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{0x3618, 0x2a},
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{0x5780, 0x3e},
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{0x5781, 0x0f},
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{0x5782, 0x44},
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{0x5783, 0x02},
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{0x5784, 0x01},
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{0x5785, 0x01},
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{0x5786, 0x00},
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{0x5787, 0x04},
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{0x5788, 0x02},
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{0x5789, 0x0f},
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{0x578a, 0xfd},
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{0x578b, 0xf5},
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{0x578c, 0xf5},
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{0x578d, 0x03},
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{0x578e, 0x08},
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{0x578f, 0x0c},
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{0x5790, 0x08},
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{0x5791, 0x06},
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{0x5792, 0x00},
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{0x5793, 0x52},
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{0x5794, 0xa3},
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{0x3503, 0x00},
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{0x5045, 0x05},
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{0x4003, 0x40},
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{0x5048, 0x40}
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};
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static const struct ov5670_reg mode_1296x972_regs[] = {
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{0x3000, 0x00},
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{0x3002, 0x21},
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{0x3005, 0xf0},
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{0x3007, 0x00},
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{0x3015, 0x0f},
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{0x301a, 0xf0},
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{0x301b, 0xf0},
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{0x301c, 0xf0},
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{0x301d, 0xf0},
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{0x301e, 0xf0},
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{0x3030, 0x00},
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{0x3031, 0x0a},
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{0x303c, 0xff},
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{0x303e, 0xff},
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{0x3040, 0xf0},
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{0x3041, 0x00},
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{0x3042, 0xf0},
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{0x3106, 0x11},
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{0x3500, 0x00},
|
|
{0x3501, 0x80},
|
|
{0x3502, 0x00},
|
|
{0x3503, 0x04},
|
|
{0x3504, 0x03},
|
|
{0x3505, 0x83},
|
|
{0x3508, 0x07},
|
|
{0x3509, 0x80},
|
|
{0x350e, 0x04},
|
|
{0x350f, 0x00},
|
|
{0x3510, 0x00},
|
|
{0x3511, 0x02},
|
|
{0x3512, 0x00},
|
|
{0x3601, 0xc8},
|
|
{0x3610, 0x88},
|
|
{0x3612, 0x48},
|
|
{0x3614, 0x5b},
|
|
{0x3615, 0x96},
|
|
{0x3621, 0xd0},
|
|
{0x3622, 0x00},
|
|
{0x3623, 0x00},
|
|
{0x3633, 0x13},
|
|
{0x3634, 0x13},
|
|
{0x3635, 0x13},
|
|
{0x3636, 0x13},
|
|
{0x3645, 0x13},
|
|
{0x3646, 0x82},
|
|
{0x3650, 0x00},
|
|
{0x3652, 0xff},
|
|
{0x3655, 0x20},
|
|
{0x3656, 0xff},
|
|
{0x365a, 0xff},
|
|
{0x365e, 0xff},
|
|
{0x3668, 0x00},
|
|
{0x366a, 0x07},
|
|
{0x366e, 0x08},
|
|
{0x366d, 0x00},
|
|
{0x366f, 0x80},
|
|
{0x3700, 0x28},
|
|
{0x3701, 0x10},
|
|
{0x3702, 0x3a},
|
|
{0x3703, 0x19},
|
|
{0x3704, 0x10},
|
|
{0x3705, 0x00},
|
|
{0x3706, 0x66},
|
|
{0x3707, 0x08},
|
|
{0x3708, 0x34},
|
|
{0x3709, 0x40},
|
|
{0x370a, 0x01},
|
|
{0x370b, 0x1b},
|
|
{0x3714, 0x24},
|
|
{0x371a, 0x3e},
|
|
{0x3733, 0x00},
|
|
{0x3734, 0x00},
|
|
{0x373a, 0x05},
|
|
{0x373b, 0x06},
|
|
{0x373c, 0x0a},
|
|
{0x373f, 0xa0},
|
|
{0x3755, 0x00},
|
|
{0x3758, 0x00},
|
|
{0x375b, 0x0e},
|
|
{0x3766, 0x5f},
|
|
{0x3768, 0x00},
|
|
{0x3769, 0x22},
|
|
{0x3773, 0x08},
|
|
{0x3774, 0x1f},
|
|
{0x3776, 0x06},
|
|
{0x37a0, 0x88},
|
|
{0x37a1, 0x5c},
|
|
{0x37a7, 0x88},
|
|
{0x37a8, 0x70},
|
|
{0x37aa, 0x88},
|
|
{0x37ab, 0x48},
|
|
{0x37b3, 0x66},
|
|
{0x37c2, 0x04},
|
|
{0x37c5, 0x00},
|
|
{0x37c8, 0x00},
|
|
{0x3800, 0x00},
|
|
{0x3801, 0x0c},
|
|
{0x3802, 0x00},
|
|
{0x3803, 0x04},
|
|
{0x3804, 0x0a},
|
|
{0x3805, 0x33},
|
|
{0x3806, 0x07},
|
|
{0x3807, 0xa3},
|
|
{0x3808, 0x05},
|
|
{0x3809, 0x10},
|
|
{0x380a, 0x03},
|
|
{0x380b, 0xcc},
|
|
{0x380c, 0x06},
|
|
{0x380d, 0x90},
|
|
{0x380e, 0x08},
|
|
{0x380f, 0x08},
|
|
{0x3811, 0x04},
|
|
{0x3813, 0x04},
|
|
{0x3814, 0x03},
|
|
{0x3815, 0x01},
|
|
{0x3816, 0x00},
|
|
{0x3817, 0x00},
|
|
{0x3818, 0x00},
|
|
{0x3819, 0x00},
|
|
{0x3820, 0x94},
|
|
{0x3821, 0x47},
|
|
{0x3822, 0x48},
|
|
{0x3826, 0x00},
|
|
{0x3827, 0x08},
|
|
{0x382a, 0x03},
|
|
{0x382b, 0x01},
|
|
{0x3830, 0x08},
|
|
{0x3836, 0x02},
|
|
{0x3837, 0x00},
|
|
{0x3838, 0x10},
|
|
{0x3841, 0xff},
|
|
{0x3846, 0x48},
|
|
{0x3861, 0x00},
|
|
{0x3862, 0x04},
|
|
{0x3863, 0x06},
|
|
{0x3a11, 0x01},
|
|
{0x3a12, 0x78},
|
|
{0x3b00, 0x00},
|
|
{0x3b02, 0x00},
|
|
{0x3b03, 0x00},
|
|
{0x3b04, 0x00},
|
|
{0x3b05, 0x00},
|
|
{0x3c00, 0x89},
|
|
{0x3c01, 0xab},
|
|
{0x3c02, 0x01},
|
|
{0x3c03, 0x00},
|
|
{0x3c04, 0x00},
|
|
{0x3c05, 0x03},
|
|
{0x3c06, 0x00},
|
|
{0x3c07, 0x05},
|
|
{0x3c0c, 0x00},
|
|
{0x3c0d, 0x00},
|
|
{0x3c0e, 0x00},
|
|
{0x3c0f, 0x00},
|
|
{0x3c40, 0x00},
|
|
{0x3c41, 0xa3},
|
|
{0x3c43, 0x7d},
|
|
{0x3c45, 0xd7},
|
|
{0x3c47, 0xfc},
|
|
{0x3c50, 0x05},
|
|
{0x3c52, 0xaa},
|
|
{0x3c54, 0x71},
|
|
{0x3c56, 0x80},
|
|
{0x3d85, 0x17},
|
|
{0x3f03, 0x00},
|
|
{0x3f0a, 0x00},
|
|
{0x3f0b, 0x00},
|
|
{0x4001, 0x60},
|
|
{0x4009, 0x05},
|
|
{0x4020, 0x00},
|
|
{0x4021, 0x00},
|
|
{0x4022, 0x00},
|
|
{0x4023, 0x00},
|
|
{0x4024, 0x00},
|
|
{0x4025, 0x00},
|
|
{0x4026, 0x00},
|
|
{0x4027, 0x00},
|
|
{0x4028, 0x00},
|
|
{0x4029, 0x00},
|
|
{0x402a, 0x00},
|
|
{0x402b, 0x00},
|
|
{0x402c, 0x00},
|
|
{0x402d, 0x00},
|
|
{0x402e, 0x00},
|
|
{0x402f, 0x00},
|
|
{0x4040, 0x00},
|
|
{0x4041, 0x03},
|
|
{0x4042, 0x00},
|
|
{0x4043, 0x7A},
|
|
{0x4044, 0x00},
|
|
{0x4045, 0x7A},
|
|
{0x4046, 0x00},
|
|
{0x4047, 0x7A},
|
|
{0x4048, 0x00},
|
|
{0x4049, 0x7A},
|
|
{0x4307, 0x30},
|
|
{0x4500, 0x58},
|
|
{0x4501, 0x04},
|
|
{0x4502, 0x48},
|
|
{0x4503, 0x10},
|
|
{0x4508, 0x55},
|
|
{0x4509, 0x55},
|
|
{0x450a, 0x00},
|
|
{0x450b, 0x00},
|
|
{0x4600, 0x00},
|
|
{0x4601, 0x81},
|
|
{0x4700, 0xa4},
|
|
{0x4800, 0x4c},
|
|
{0x4816, 0x53},
|
|
{0x481f, 0x40},
|
|
{0x4837, 0x13},
|
|
{0x5000, 0x56},
|
|
{0x5001, 0x01},
|
|
{0x5002, 0x28},
|
|
{0x5004, 0x0c},
|
|
{0x5006, 0x0c},
|
|
{0x5007, 0xe0},
|
|
{0x5008, 0x01},
|
|
{0x5009, 0xb0},
|
|
{0x5901, 0x00},
|
|
{0x5a01, 0x00},
|
|
{0x5a03, 0x00},
|
|
{0x5a04, 0x0c},
|
|
{0x5a05, 0xe0},
|
|
{0x5a06, 0x09},
|
|
{0x5a07, 0xb0},
|
|
{0x5a08, 0x06},
|
|
{0x5e00, 0x00},
|
|
{0x3734, 0x40},
|
|
{0x5b00, 0x01},
|
|
{0x5b01, 0x10},
|
|
{0x5b02, 0x01},
|
|
{0x5b03, 0xdb},
|
|
{0x3d8c, 0x71},
|
|
{0x3d8d, 0xea},
|
|
{0x4017, 0x10},
|
|
{0x3618, 0x2a},
|
|
{0x5780, 0x3e},
|
|
{0x5781, 0x0f},
|
|
{0x5782, 0x44},
|
|
{0x5783, 0x02},
|
|
{0x5784, 0x01},
|
|
{0x5785, 0x01},
|
|
{0x5786, 0x00},
|
|
{0x5787, 0x04},
|
|
{0x5788, 0x02},
|
|
{0x5789, 0x0f},
|
|
{0x578a, 0xfd},
|
|
{0x578b, 0xf5},
|
|
{0x578c, 0xf5},
|
|
{0x578d, 0x03},
|
|
{0x578e, 0x08},
|
|
{0x578f, 0x0c},
|
|
{0x5790, 0x08},
|
|
{0x5791, 0x04},
|
|
{0x5792, 0x00},
|
|
{0x5793, 0x52},
|
|
{0x5794, 0xa3},
|
|
{0x3503, 0x00},
|
|
{0x5045, 0x05},
|
|
{0x4003, 0x40},
|
|
{0x5048, 0x40}
|
|
};
|
|
|
|
static const struct ov5670_reg mode_648x486_regs[] = {
|
|
{0x3000, 0x00},
|
|
{0x3002, 0x21},
|
|
{0x3005, 0xf0},
|
|
{0x3007, 0x00},
|
|
{0x3015, 0x0f},
|
|
{0x301a, 0xf0},
|
|
{0x301b, 0xf0},
|
|
{0x301c, 0xf0},
|
|
{0x301d, 0xf0},
|
|
{0x301e, 0xf0},
|
|
{0x3030, 0x00},
|
|
{0x3031, 0x0a},
|
|
{0x303c, 0xff},
|
|
{0x303e, 0xff},
|
|
{0x3040, 0xf0},
|
|
{0x3041, 0x00},
|
|
{0x3042, 0xf0},
|
|
{0x3106, 0x11},
|
|
{0x3500, 0x00},
|
|
{0x3501, 0x80},
|
|
{0x3502, 0x00},
|
|
{0x3503, 0x04},
|
|
{0x3504, 0x03},
|
|
{0x3505, 0x83},
|
|
{0x3508, 0x04},
|
|
{0x3509, 0x00},
|
|
{0x350e, 0x04},
|
|
{0x350f, 0x00},
|
|
{0x3510, 0x00},
|
|
{0x3511, 0x02},
|
|
{0x3512, 0x00},
|
|
{0x3601, 0xc8},
|
|
{0x3610, 0x88},
|
|
{0x3612, 0x48},
|
|
{0x3614, 0x5b},
|
|
{0x3615, 0x96},
|
|
{0x3621, 0xd0},
|
|
{0x3622, 0x00},
|
|
{0x3623, 0x04},
|
|
{0x3633, 0x13},
|
|
{0x3634, 0x13},
|
|
{0x3635, 0x13},
|
|
{0x3636, 0x13},
|
|
{0x3645, 0x13},
|
|
{0x3646, 0x82},
|
|
{0x3650, 0x00},
|
|
{0x3652, 0xff},
|
|
{0x3655, 0x20},
|
|
{0x3656, 0xff},
|
|
{0x365a, 0xff},
|
|
{0x365e, 0xff},
|
|
{0x3668, 0x00},
|
|
{0x366a, 0x07},
|
|
{0x366e, 0x08},
|
|
{0x366d, 0x00},
|
|
{0x366f, 0x80},
|
|
{0x3700, 0x28},
|
|
{0x3701, 0x10},
|
|
{0x3702, 0x3a},
|
|
{0x3703, 0x19},
|
|
{0x3704, 0x10},
|
|
{0x3705, 0x00},
|
|
{0x3706, 0x66},
|
|
{0x3707, 0x08},
|
|
{0x3708, 0x34},
|
|
{0x3709, 0x40},
|
|
{0x370a, 0x01},
|
|
{0x370b, 0x1b},
|
|
{0x3714, 0x24},
|
|
{0x371a, 0x3e},
|
|
{0x3733, 0x00},
|
|
{0x3734, 0x00},
|
|
{0x373a, 0x05},
|
|
{0x373b, 0x06},
|
|
{0x373c, 0x0a},
|
|
{0x373f, 0xa0},
|
|
{0x3755, 0x00},
|
|
{0x3758, 0x00},
|
|
{0x375b, 0x0e},
|
|
{0x3766, 0x5f},
|
|
{0x3768, 0x00},
|
|
{0x3769, 0x22},
|
|
{0x3773, 0x08},
|
|
{0x3774, 0x1f},
|
|
{0x3776, 0x06},
|
|
{0x37a0, 0x88},
|
|
{0x37a1, 0x5c},
|
|
{0x37a7, 0x88},
|
|
{0x37a8, 0x70},
|
|
{0x37aa, 0x88},
|
|
{0x37ab, 0x48},
|
|
{0x37b3, 0x66},
|
|
{0x37c2, 0x04},
|
|
{0x37c5, 0x00},
|
|
{0x37c8, 0x00},
|
|
{0x3800, 0x00},
|
|
{0x3801, 0x0c},
|
|
{0x3802, 0x00},
|
|
{0x3803, 0x04},
|
|
{0x3804, 0x0a},
|
|
{0x3805, 0x33},
|
|
{0x3806, 0x07},
|
|
{0x3807, 0xa3},
|
|
{0x3808, 0x02},
|
|
{0x3809, 0x88},
|
|
{0x380a, 0x01},
|
|
{0x380b, 0xe6},
|
|
{0x380c, 0x06},
|
|
{0x380d, 0x90},
|
|
{0x380e, 0x08},
|
|
{0x380f, 0x08},
|
|
{0x3811, 0x04},
|
|
{0x3813, 0x02},
|
|
{0x3814, 0x07},
|
|
{0x3815, 0x01},
|
|
{0x3816, 0x00},
|
|
{0x3817, 0x00},
|
|
{0x3818, 0x00},
|
|
{0x3819, 0x00},
|
|
{0x3820, 0x94},
|
|
{0x3821, 0xc6},
|
|
{0x3822, 0x48},
|
|
{0x3826, 0x00},
|
|
{0x3827, 0x08},
|
|
{0x382a, 0x07},
|
|
{0x382b, 0x01},
|
|
{0x3830, 0x08},
|
|
{0x3836, 0x02},
|
|
{0x3837, 0x00},
|
|
{0x3838, 0x10},
|
|
{0x3841, 0xff},
|
|
{0x3846, 0x48},
|
|
{0x3861, 0x00},
|
|
{0x3862, 0x04},
|
|
{0x3863, 0x06},
|
|
{0x3a11, 0x01},
|
|
{0x3a12, 0x78},
|
|
{0x3b00, 0x00},
|
|
{0x3b02, 0x00},
|
|
{0x3b03, 0x00},
|
|
{0x3b04, 0x00},
|
|
{0x3b05, 0x00},
|
|
{0x3c00, 0x89},
|
|
{0x3c01, 0xab},
|
|
{0x3c02, 0x01},
|
|
{0x3c03, 0x00},
|
|
{0x3c04, 0x00},
|
|
{0x3c05, 0x03},
|
|
{0x3c06, 0x00},
|
|
{0x3c07, 0x05},
|
|
{0x3c0c, 0x00},
|
|
{0x3c0d, 0x00},
|
|
{0x3c0e, 0x00},
|
|
{0x3c0f, 0x00},
|
|
{0x3c40, 0x00},
|
|
{0x3c41, 0xa3},
|
|
{0x3c43, 0x7d},
|
|
{0x3c45, 0xd7},
|
|
{0x3c47, 0xfc},
|
|
{0x3c50, 0x05},
|
|
{0x3c52, 0xaa},
|
|
{0x3c54, 0x71},
|
|
{0x3c56, 0x80},
|
|
{0x3d85, 0x17},
|
|
{0x3f03, 0x00},
|
|
{0x3f0a, 0x00},
|
|
{0x3f0b, 0x00},
|
|
{0x4001, 0x60},
|
|
{0x4009, 0x05},
|
|
{0x4020, 0x00},
|
|
{0x4021, 0x00},
|
|
{0x4022, 0x00},
|
|
{0x4023, 0x00},
|
|
{0x4024, 0x00},
|
|
{0x4025, 0x00},
|
|
{0x4026, 0x00},
|
|
{0x4027, 0x00},
|
|
{0x4028, 0x00},
|
|
{0x4029, 0x00},
|
|
{0x402a, 0x00},
|
|
{0x402b, 0x00},
|
|
{0x402c, 0x00},
|
|
{0x402d, 0x00},
|
|
{0x402e, 0x00},
|
|
{0x402f, 0x00},
|
|
{0x4040, 0x00},
|
|
{0x4041, 0x03},
|
|
{0x4042, 0x00},
|
|
{0x4043, 0x7A},
|
|
{0x4044, 0x00},
|
|
{0x4045, 0x7A},
|
|
{0x4046, 0x00},
|
|
{0x4047, 0x7A},
|
|
{0x4048, 0x00},
|
|
{0x4049, 0x7A},
|
|
{0x4307, 0x30},
|
|
{0x4500, 0x58},
|
|
{0x4501, 0x04},
|
|
{0x4502, 0x40},
|
|
{0x4503, 0x10},
|
|
{0x4508, 0x55},
|
|
{0x4509, 0x55},
|
|
{0x450a, 0x02},
|
|
{0x450b, 0x00},
|
|
{0x4600, 0x00},
|
|
{0x4601, 0x40},
|
|
{0x4700, 0xa4},
|
|
{0x4800, 0x4c},
|
|
{0x4816, 0x53},
|
|
{0x481f, 0x40},
|
|
{0x4837, 0x13},
|
|
{0x5000, 0x56},
|
|
{0x5001, 0x01},
|
|
{0x5002, 0x28},
|
|
{0x5004, 0x0c},
|
|
{0x5006, 0x0c},
|
|
{0x5007, 0xe0},
|
|
{0x5008, 0x01},
|
|
{0x5009, 0xb0},
|
|
{0x5901, 0x00},
|
|
{0x5a01, 0x00},
|
|
{0x5a03, 0x00},
|
|
{0x5a04, 0x0c},
|
|
{0x5a05, 0xe0},
|
|
{0x5a06, 0x09},
|
|
{0x5a07, 0xb0},
|
|
{0x5a08, 0x06},
|
|
{0x5e00, 0x00},
|
|
{0x3734, 0x40},
|
|
{0x5b00, 0x01},
|
|
{0x5b01, 0x10},
|
|
{0x5b02, 0x01},
|
|
{0x5b03, 0xdb},
|
|
{0x3d8c, 0x71},
|
|
{0x3d8d, 0xea},
|
|
{0x4017, 0x10},
|
|
{0x3618, 0x2a},
|
|
{0x5780, 0x3e},
|
|
{0x5781, 0x0f},
|
|
{0x5782, 0x44},
|
|
{0x5783, 0x02},
|
|
{0x5784, 0x01},
|
|
{0x5785, 0x01},
|
|
{0x5786, 0x00},
|
|
{0x5787, 0x04},
|
|
{0x5788, 0x02},
|
|
{0x5789, 0x0f},
|
|
{0x578a, 0xfd},
|
|
{0x578b, 0xf5},
|
|
{0x578c, 0xf5},
|
|
{0x578d, 0x03},
|
|
{0x578e, 0x08},
|
|
{0x578f, 0x0c},
|
|
{0x5790, 0x08},
|
|
{0x5791, 0x06},
|
|
{0x5792, 0x00},
|
|
{0x5793, 0x52},
|
|
{0x5794, 0xa3},
|
|
{0x3503, 0x00},
|
|
{0x5045, 0x05},
|
|
{0x4003, 0x40},
|
|
{0x5048, 0x40}
|
|
};
|
|
|
|
static const struct ov5670_reg mode_2560x1440_regs[] = {
|
|
{0x3000, 0x00},
|
|
{0x3002, 0x21},
|
|
{0x3005, 0xf0},
|
|
{0x3007, 0x00},
|
|
{0x3015, 0x0f},
|
|
{0x301a, 0xf0},
|
|
{0x301b, 0xf0},
|
|
{0x301c, 0xf0},
|
|
{0x301d, 0xf0},
|
|
{0x301e, 0xf0},
|
|
{0x3030, 0x00},
|
|
{0x3031, 0x0a},
|
|
{0x303c, 0xff},
|
|
{0x303e, 0xff},
|
|
{0x3040, 0xf0},
|
|
{0x3041, 0x00},
|
|
{0x3042, 0xf0},
|
|
{0x3106, 0x11},
|
|
{0x3500, 0x00},
|
|
{0x3501, 0x80},
|
|
{0x3502, 0x00},
|
|
{0x3503, 0x04},
|
|
{0x3504, 0x03},
|
|
{0x3505, 0x83},
|
|
{0x3508, 0x04},
|
|
{0x3509, 0x00},
|
|
{0x350e, 0x04},
|
|
{0x350f, 0x00},
|
|
{0x3510, 0x00},
|
|
{0x3511, 0x02},
|
|
{0x3512, 0x00},
|
|
{0x3601, 0xc8},
|
|
{0x3610, 0x88},
|
|
{0x3612, 0x48},
|
|
{0x3614, 0x5b},
|
|
{0x3615, 0x96},
|
|
{0x3621, 0xd0},
|
|
{0x3622, 0x00},
|
|
{0x3623, 0x00},
|
|
{0x3633, 0x13},
|
|
{0x3634, 0x13},
|
|
{0x3635, 0x13},
|
|
{0x3636, 0x13},
|
|
{0x3645, 0x13},
|
|
{0x3646, 0x82},
|
|
{0x3650, 0x00},
|
|
{0x3652, 0xff},
|
|
{0x3655, 0x20},
|
|
{0x3656, 0xff},
|
|
{0x365a, 0xff},
|
|
{0x365e, 0xff},
|
|
{0x3668, 0x00},
|
|
{0x366a, 0x07},
|
|
{0x366e, 0x10},
|
|
{0x366d, 0x00},
|
|
{0x366f, 0x80},
|
|
{0x3700, 0x28},
|
|
{0x3701, 0x10},
|
|
{0x3702, 0x3a},
|
|
{0x3703, 0x19},
|
|
{0x3704, 0x10},
|
|
{0x3705, 0x00},
|
|
{0x3706, 0x66},
|
|
{0x3707, 0x08},
|
|
{0x3708, 0x34},
|
|
{0x3709, 0x40},
|
|
{0x370a, 0x01},
|
|
{0x370b, 0x1b},
|
|
{0x3714, 0x24},
|
|
{0x371a, 0x3e},
|
|
{0x3733, 0x00},
|
|
{0x3734, 0x00},
|
|
{0x373a, 0x05},
|
|
{0x373b, 0x06},
|
|
{0x373c, 0x0a},
|
|
{0x373f, 0xa0},
|
|
{0x3755, 0x00},
|
|
{0x3758, 0x00},
|
|
{0x375b, 0x0e},
|
|
{0x3766, 0x5f},
|
|
{0x3768, 0x00},
|
|
{0x3769, 0x22},
|
|
{0x3773, 0x08},
|
|
{0x3774, 0x1f},
|
|
{0x3776, 0x06},
|
|
{0x37a0, 0x88},
|
|
{0x37a1, 0x5c},
|
|
{0x37a7, 0x88},
|
|
{0x37a8, 0x70},
|
|
{0x37aa, 0x88},
|
|
{0x37ab, 0x48},
|
|
{0x37b3, 0x66},
|
|
{0x37c2, 0x04},
|
|
{0x37c5, 0x00},
|
|
{0x37c8, 0x00},
|
|
{0x3800, 0x00},
|
|
{0x3801, 0x0c},
|
|
{0x3802, 0x00},
|
|
{0x3803, 0x04},
|
|
{0x3804, 0x0a},
|
|
{0x3805, 0x33},
|
|
{0x3806, 0x07},
|
|
{0x3807, 0xa3},
|
|
{0x3808, 0x0a},
|
|
{0x3809, 0x00},
|
|
{0x380a, 0x05},
|
|
{0x380b, 0xa0},
|
|
{0x380c, 0x06},
|
|
{0x380d, 0x90},
|
|
{0x380e, 0x08},
|
|
{0x380f, 0x08},
|
|
{0x3811, 0x04},
|
|
{0x3813, 0x02},
|
|
{0x3814, 0x01},
|
|
{0x3815, 0x01},
|
|
{0x3816, 0x00},
|
|
{0x3817, 0x00},
|
|
{0x3818, 0x00},
|
|
{0x3819, 0x00},
|
|
{0x3820, 0x84},
|
|
{0x3821, 0x46},
|
|
{0x3822, 0x48},
|
|
{0x3826, 0x00},
|
|
{0x3827, 0x08},
|
|
{0x382a, 0x01},
|
|
{0x382b, 0x01},
|
|
{0x3830, 0x08},
|
|
{0x3836, 0x02},
|
|
{0x3837, 0x00},
|
|
{0x3838, 0x10},
|
|
{0x3841, 0xff},
|
|
{0x3846, 0x48},
|
|
{0x3861, 0x00},
|
|
{0x3862, 0x04},
|
|
{0x3863, 0x06},
|
|
{0x3a11, 0x01},
|
|
{0x3a12, 0x78},
|
|
{0x3b00, 0x00},
|
|
{0x3b02, 0x00},
|
|
{0x3b03, 0x00},
|
|
{0x3b04, 0x00},
|
|
{0x3b05, 0x00},
|
|
{0x3c00, 0x89},
|
|
{0x3c01, 0xab},
|
|
{0x3c02, 0x01},
|
|
{0x3c03, 0x00},
|
|
{0x3c04, 0x00},
|
|
{0x3c05, 0x03},
|
|
{0x3c06, 0x00},
|
|
{0x3c07, 0x05},
|
|
{0x3c0c, 0x00},
|
|
{0x3c0d, 0x00},
|
|
{0x3c0e, 0x00},
|
|
{0x3c0f, 0x00},
|
|
{0x3c40, 0x00},
|
|
{0x3c41, 0xa3},
|
|
{0x3c43, 0x7d},
|
|
{0x3c45, 0xd7},
|
|
{0x3c47, 0xfc},
|
|
{0x3c50, 0x05},
|
|
{0x3c52, 0xaa},
|
|
{0x3c54, 0x71},
|
|
{0x3c56, 0x80},
|
|
{0x3d85, 0x17},
|
|
{0x3f03, 0x00},
|
|
{0x3f0a, 0x00},
|
|
{0x3f0b, 0x00},
|
|
{0x4001, 0x60},
|
|
{0x4009, 0x0d},
|
|
{0x4020, 0x00},
|
|
{0x4021, 0x00},
|
|
{0x4022, 0x00},
|
|
{0x4023, 0x00},
|
|
{0x4024, 0x00},
|
|
{0x4025, 0x00},
|
|
{0x4026, 0x00},
|
|
{0x4027, 0x00},
|
|
{0x4028, 0x00},
|
|
{0x4029, 0x00},
|
|
{0x402a, 0x00},
|
|
{0x402b, 0x00},
|
|
{0x402c, 0x00},
|
|
{0x402d, 0x00},
|
|
{0x402e, 0x00},
|
|
{0x402f, 0x00},
|
|
{0x4040, 0x00},
|
|
{0x4041, 0x03},
|
|
{0x4042, 0x00},
|
|
{0x4043, 0x7A},
|
|
{0x4044, 0x00},
|
|
{0x4045, 0x7A},
|
|
{0x4046, 0x00},
|
|
{0x4047, 0x7A},
|
|
{0x4048, 0x00},
|
|
{0x4049, 0x7A},
|
|
{0x4307, 0x30},
|
|
{0x4500, 0x58},
|
|
{0x4501, 0x04},
|
|
{0x4502, 0x40},
|
|
{0x4503, 0x10},
|
|
{0x4508, 0xaa},
|
|
{0x4509, 0xaa},
|
|
{0x450a, 0x00},
|
|
{0x450b, 0x00},
|
|
{0x4600, 0x01},
|
|
{0x4601, 0x00},
|
|
{0x4700, 0xa4},
|
|
{0x4800, 0x4c},
|
|
{0x4816, 0x53},
|
|
{0x481f, 0x40},
|
|
{0x4837, 0x13},
|
|
{0x5000, 0x56},
|
|
{0x5001, 0x01},
|
|
{0x5002, 0x28},
|
|
{0x5004, 0x0c},
|
|
{0x5006, 0x0c},
|
|
{0x5007, 0xe0},
|
|
{0x5008, 0x01},
|
|
{0x5009, 0xb0},
|
|
{0x5901, 0x00},
|
|
{0x5a01, 0x00},
|
|
{0x5a03, 0x00},
|
|
{0x5a04, 0x0c},
|
|
{0x5a05, 0xe0},
|
|
{0x5a06, 0x09},
|
|
{0x5a07, 0xb0},
|
|
{0x5a08, 0x06},
|
|
{0x5e00, 0x00},
|
|
{0x3734, 0x40},
|
|
{0x5b00, 0x01},
|
|
{0x5b01, 0x10},
|
|
{0x5b02, 0x01},
|
|
{0x5b03, 0xdb},
|
|
{0x3d8c, 0x71},
|
|
{0x3d8d, 0xea},
|
|
{0x4017, 0x08},
|
|
{0x3618, 0x2a},
|
|
{0x5780, 0x3e},
|
|
{0x5781, 0x0f},
|
|
{0x5782, 0x44},
|
|
{0x5783, 0x02},
|
|
{0x5784, 0x01},
|
|
{0x5785, 0x01},
|
|
{0x5786, 0x00},
|
|
{0x5787, 0x04},
|
|
{0x5788, 0x02},
|
|
{0x5789, 0x0f},
|
|
{0x578a, 0xfd},
|
|
{0x578b, 0xf5},
|
|
{0x578c, 0xf5},
|
|
{0x578d, 0x03},
|
|
{0x578e, 0x08},
|
|
{0x578f, 0x0c},
|
|
{0x5790, 0x08},
|
|
{0x5791, 0x06},
|
|
{0x5792, 0x00},
|
|
{0x5793, 0x52},
|
|
{0x5794, 0xa3},
|
|
{0x5045, 0x05},
|
|
{0x4003, 0x40},
|
|
{0x5048, 0x40}
|
|
};
|
|
|
|
static const struct ov5670_reg mode_1280x720_regs[] = {
|
|
{0x3000, 0x00},
|
|
{0x3002, 0x21},
|
|
{0x3005, 0xf0},
|
|
{0x3007, 0x00},
|
|
{0x3015, 0x0f},
|
|
{0x301a, 0xf0},
|
|
{0x301b, 0xf0},
|
|
{0x301c, 0xf0},
|
|
{0x301d, 0xf0},
|
|
{0x301e, 0xf0},
|
|
{0x3030, 0x00},
|
|
{0x3031, 0x0a},
|
|
{0x303c, 0xff},
|
|
{0x303e, 0xff},
|
|
{0x3040, 0xf0},
|
|
{0x3041, 0x00},
|
|
{0x3042, 0xf0},
|
|
{0x3106, 0x11},
|
|
{0x3500, 0x00},
|
|
{0x3501, 0x80},
|
|
{0x3502, 0x00},
|
|
{0x3503, 0x04},
|
|
{0x3504, 0x03},
|
|
{0x3505, 0x83},
|
|
{0x3508, 0x04},
|
|
{0x3509, 0x00},
|
|
{0x350e, 0x04},
|
|
{0x350f, 0x00},
|
|
{0x3510, 0x00},
|
|
{0x3511, 0x02},
|
|
{0x3512, 0x00},
|
|
{0x3601, 0xc8},
|
|
{0x3610, 0x88},
|
|
{0x3612, 0x48},
|
|
{0x3614, 0x5b},
|
|
{0x3615, 0x96},
|
|
{0x3621, 0xd0},
|
|
{0x3622, 0x00},
|
|
{0x3623, 0x00},
|
|
{0x3633, 0x13},
|
|
{0x3634, 0x13},
|
|
{0x3635, 0x13},
|
|
{0x3636, 0x13},
|
|
{0x3645, 0x13},
|
|
{0x3646, 0x82},
|
|
{0x3650, 0x00},
|
|
{0x3652, 0xff},
|
|
{0x3655, 0x20},
|
|
{0x3656, 0xff},
|
|
{0x365a, 0xff},
|
|
{0x365e, 0xff},
|
|
{0x3668, 0x00},
|
|
{0x366a, 0x07},
|
|
{0x366e, 0x08},
|
|
{0x366d, 0x00},
|
|
{0x366f, 0x80},
|
|
{0x3700, 0x28},
|
|
{0x3701, 0x10},
|
|
{0x3702, 0x3a},
|
|
{0x3703, 0x19},
|
|
{0x3704, 0x10},
|
|
{0x3705, 0x00},
|
|
{0x3706, 0x66},
|
|
{0x3707, 0x08},
|
|
{0x3708, 0x34},
|
|
{0x3709, 0x40},
|
|
{0x370a, 0x01},
|
|
{0x370b, 0x1b},
|
|
{0x3714, 0x24},
|
|
{0x371a, 0x3e},
|
|
{0x3733, 0x00},
|
|
{0x3734, 0x00},
|
|
{0x373a, 0x05},
|
|
{0x373b, 0x06},
|
|
{0x373c, 0x0a},
|
|
{0x373f, 0xa0},
|
|
{0x3755, 0x00},
|
|
{0x3758, 0x00},
|
|
{0x375b, 0x0e},
|
|
{0x3766, 0x5f},
|
|
{0x3768, 0x00},
|
|
{0x3769, 0x22},
|
|
{0x3773, 0x08},
|
|
{0x3774, 0x1f},
|
|
{0x3776, 0x06},
|
|
{0x37a0, 0x88},
|
|
{0x37a1, 0x5c},
|
|
{0x37a7, 0x88},
|
|
{0x37a8, 0x70},
|
|
{0x37aa, 0x88},
|
|
{0x37ab, 0x48},
|
|
{0x37b3, 0x66},
|
|
{0x37c2, 0x04},
|
|
{0x37c5, 0x00},
|
|
{0x37c8, 0x00},
|
|
{0x3800, 0x00},
|
|
{0x3801, 0x0c},
|
|
{0x3802, 0x00},
|
|
{0x3803, 0x04},
|
|
{0x3804, 0x0a},
|
|
{0x3805, 0x33},
|
|
{0x3806, 0x07},
|
|
{0x3807, 0xa3},
|
|
{0x3808, 0x05},
|
|
{0x3809, 0x00},
|
|
{0x380a, 0x02},
|
|
{0x380b, 0xd0},
|
|
{0x380c, 0x06},
|
|
{0x380d, 0x90},
|
|
{0x380e, 0x08},
|
|
{0x380f, 0x08},
|
|
{0x3811, 0x04},
|
|
{0x3813, 0x02},
|
|
{0x3814, 0x03},
|
|
{0x3815, 0x01},
|
|
{0x3816, 0x00},
|
|
{0x3817, 0x00},
|
|
{0x3818, 0x00},
|
|
{0x3819, 0x00},
|
|
{0x3820, 0x94},
|
|
{0x3821, 0x47},
|
|
{0x3822, 0x48},
|
|
{0x3826, 0x00},
|
|
{0x3827, 0x08},
|
|
{0x382a, 0x03},
|
|
{0x382b, 0x01},
|
|
{0x3830, 0x08},
|
|
{0x3836, 0x02},
|
|
{0x3837, 0x00},
|
|
{0x3838, 0x10},
|
|
{0x3841, 0xff},
|
|
{0x3846, 0x48},
|
|
{0x3861, 0x00},
|
|
{0x3862, 0x04},
|
|
{0x3863, 0x06},
|
|
{0x3a11, 0x01},
|
|
{0x3a12, 0x78},
|
|
{0x3b00, 0x00},
|
|
{0x3b02, 0x00},
|
|
{0x3b03, 0x00},
|
|
{0x3b04, 0x00},
|
|
{0x3b05, 0x00},
|
|
{0x3c00, 0x89},
|
|
{0x3c01, 0xab},
|
|
{0x3c02, 0x01},
|
|
{0x3c03, 0x00},
|
|
{0x3c04, 0x00},
|
|
{0x3c05, 0x03},
|
|
{0x3c06, 0x00},
|
|
{0x3c07, 0x05},
|
|
{0x3c0c, 0x00},
|
|
{0x3c0d, 0x00},
|
|
{0x3c0e, 0x00},
|
|
{0x3c0f, 0x00},
|
|
{0x3c40, 0x00},
|
|
{0x3c41, 0xa3},
|
|
{0x3c43, 0x7d},
|
|
{0x3c45, 0xd7},
|
|
{0x3c47, 0xfc},
|
|
{0x3c50, 0x05},
|
|
{0x3c52, 0xaa},
|
|
{0x3c54, 0x71},
|
|
{0x3c56, 0x80},
|
|
{0x3d85, 0x17},
|
|
{0x3f03, 0x00},
|
|
{0x3f0a, 0x00},
|
|
{0x3f0b, 0x00},
|
|
{0x4001, 0x60},
|
|
{0x4009, 0x05},
|
|
{0x4020, 0x00},
|
|
{0x4021, 0x00},
|
|
{0x4022, 0x00},
|
|
{0x4023, 0x00},
|
|
{0x4024, 0x00},
|
|
{0x4025, 0x00},
|
|
{0x4026, 0x00},
|
|
{0x4027, 0x00},
|
|
{0x4028, 0x00},
|
|
{0x4029, 0x00},
|
|
{0x402a, 0x00},
|
|
{0x402b, 0x00},
|
|
{0x402c, 0x00},
|
|
{0x402d, 0x00},
|
|
{0x402e, 0x00},
|
|
{0x402f, 0x00},
|
|
{0x4040, 0x00},
|
|
{0x4041, 0x03},
|
|
{0x4042, 0x00},
|
|
{0x4043, 0x7A},
|
|
{0x4044, 0x00},
|
|
{0x4045, 0x7A},
|
|
{0x4046, 0x00},
|
|
{0x4047, 0x7A},
|
|
{0x4048, 0x00},
|
|
{0x4049, 0x7A},
|
|
{0x4307, 0x30},
|
|
{0x4500, 0x58},
|
|
{0x4501, 0x04},
|
|
{0x4502, 0x48},
|
|
{0x4503, 0x10},
|
|
{0x4508, 0x55},
|
|
{0x4509, 0x55},
|
|
{0x450a, 0x00},
|
|
{0x450b, 0x00},
|
|
{0x4600, 0x00},
|
|
{0x4601, 0x80},
|
|
{0x4700, 0xa4},
|
|
{0x4800, 0x4c},
|
|
{0x4816, 0x53},
|
|
{0x481f, 0x40},
|
|
{0x4837, 0x13},
|
|
{0x5000, 0x56},
|
|
{0x5001, 0x01},
|
|
{0x5002, 0x28},
|
|
{0x5004, 0x0c},
|
|
{0x5006, 0x0c},
|
|
{0x5007, 0xe0},
|
|
{0x5008, 0x01},
|
|
{0x5009, 0xb0},
|
|
{0x5901, 0x00},
|
|
{0x5a01, 0x00},
|
|
{0x5a03, 0x00},
|
|
{0x5a04, 0x0c},
|
|
{0x5a05, 0xe0},
|
|
{0x5a06, 0x09},
|
|
{0x5a07, 0xb0},
|
|
{0x5a08, 0x06},
|
|
{0x5e00, 0x00},
|
|
{0x3734, 0x40},
|
|
{0x5b00, 0x01},
|
|
{0x5b01, 0x10},
|
|
{0x5b02, 0x01},
|
|
{0x5b03, 0xdb},
|
|
{0x3d8c, 0x71},
|
|
{0x3d8d, 0xea},
|
|
{0x4017, 0x10},
|
|
{0x3618, 0x2a},
|
|
{0x5780, 0x3e},
|
|
{0x5781, 0x0f},
|
|
{0x5782, 0x44},
|
|
{0x5783, 0x02},
|
|
{0x5784, 0x01},
|
|
{0x5785, 0x01},
|
|
{0x5786, 0x00},
|
|
{0x5787, 0x04},
|
|
{0x5788, 0x02},
|
|
{0x5789, 0x0f},
|
|
{0x578a, 0xfd},
|
|
{0x578b, 0xf5},
|
|
{0x578c, 0xf5},
|
|
{0x578d, 0x03},
|
|
{0x578e, 0x08},
|
|
{0x578f, 0x0c},
|
|
{0x5790, 0x08},
|
|
{0x5791, 0x06},
|
|
{0x5792, 0x00},
|
|
{0x5793, 0x52},
|
|
{0x5794, 0xa3},
|
|
{0x3503, 0x00},
|
|
{0x5045, 0x05},
|
|
{0x4003, 0x40},
|
|
{0x5048, 0x40}
|
|
};
|
|
|
|
static const struct ov5670_reg mode_640x360_regs[] = {
|
|
{0x3000, 0x00},
|
|
{0x3002, 0x21},
|
|
{0x3005, 0xf0},
|
|
{0x3007, 0x00},
|
|
{0x3015, 0x0f},
|
|
{0x301a, 0xf0},
|
|
{0x301b, 0xf0},
|
|
{0x301c, 0xf0},
|
|
{0x301d, 0xf0},
|
|
{0x301e, 0xf0},
|
|
{0x3030, 0x00},
|
|
{0x3031, 0x0a},
|
|
{0x303c, 0xff},
|
|
{0x303e, 0xff},
|
|
{0x3040, 0xf0},
|
|
{0x3041, 0x00},
|
|
{0x3042, 0xf0},
|
|
{0x3106, 0x11},
|
|
{0x3500, 0x00},
|
|
{0x3501, 0x80},
|
|
{0x3502, 0x00},
|
|
{0x3503, 0x04},
|
|
{0x3504, 0x03},
|
|
{0x3505, 0x83},
|
|
{0x3508, 0x04},
|
|
{0x3509, 0x00},
|
|
{0x350e, 0x04},
|
|
{0x350f, 0x00},
|
|
{0x3510, 0x00},
|
|
{0x3511, 0x02},
|
|
{0x3512, 0x00},
|
|
{0x3601, 0xc8},
|
|
{0x3610, 0x88},
|
|
{0x3612, 0x48},
|
|
{0x3614, 0x5b},
|
|
{0x3615, 0x96},
|
|
{0x3621, 0xd0},
|
|
{0x3622, 0x00},
|
|
{0x3623, 0x04},
|
|
{0x3633, 0x13},
|
|
{0x3634, 0x13},
|
|
{0x3635, 0x13},
|
|
{0x3636, 0x13},
|
|
{0x3645, 0x13},
|
|
{0x3646, 0x82},
|
|
{0x3650, 0x00},
|
|
{0x3652, 0xff},
|
|
{0x3655, 0x20},
|
|
{0x3656, 0xff},
|
|
{0x365a, 0xff},
|
|
{0x365e, 0xff},
|
|
{0x3668, 0x00},
|
|
{0x366a, 0x07},
|
|
{0x366e, 0x08},
|
|
{0x366d, 0x00},
|
|
{0x366f, 0x80},
|
|
{0x3700, 0x28},
|
|
{0x3701, 0x10},
|
|
{0x3702, 0x3a},
|
|
{0x3703, 0x19},
|
|
{0x3704, 0x10},
|
|
{0x3705, 0x00},
|
|
{0x3706, 0x66},
|
|
{0x3707, 0x08},
|
|
{0x3708, 0x34},
|
|
{0x3709, 0x40},
|
|
{0x370a, 0x01},
|
|
{0x370b, 0x1b},
|
|
{0x3714, 0x24},
|
|
{0x371a, 0x3e},
|
|
{0x3733, 0x00},
|
|
{0x3734, 0x00},
|
|
{0x373a, 0x05},
|
|
{0x373b, 0x06},
|
|
{0x373c, 0x0a},
|
|
{0x373f, 0xa0},
|
|
{0x3755, 0x00},
|
|
{0x3758, 0x00},
|
|
{0x375b, 0x0e},
|
|
{0x3766, 0x5f},
|
|
{0x3768, 0x00},
|
|
{0x3769, 0x22},
|
|
{0x3773, 0x08},
|
|
{0x3774, 0x1f},
|
|
{0x3776, 0x06},
|
|
{0x37a0, 0x88},
|
|
{0x37a1, 0x5c},
|
|
{0x37a7, 0x88},
|
|
{0x37a8, 0x70},
|
|
{0x37aa, 0x88},
|
|
{0x37ab, 0x48},
|
|
{0x37b3, 0x66},
|
|
{0x37c2, 0x04},
|
|
{0x37c5, 0x00},
|
|
{0x37c8, 0x00},
|
|
{0x3800, 0x00},
|
|
{0x3801, 0x0c},
|
|
{0x3802, 0x00},
|
|
{0x3803, 0x04},
|
|
{0x3804, 0x0a},
|
|
{0x3805, 0x33},
|
|
{0x3806, 0x07},
|
|
{0x3807, 0xa3},
|
|
{0x3808, 0x02},
|
|
{0x3809, 0x80},
|
|
{0x380a, 0x01},
|
|
{0x380b, 0x68},
|
|
{0x380c, 0x06},
|
|
{0x380d, 0x90},
|
|
{0x380e, 0x08},
|
|
{0x380f, 0x08},
|
|
{0x3811, 0x04},
|
|
{0x3813, 0x02},
|
|
{0x3814, 0x07},
|
|
{0x3815, 0x01},
|
|
{0x3816, 0x00},
|
|
{0x3817, 0x00},
|
|
{0x3818, 0x00},
|
|
{0x3819, 0x00},
|
|
{0x3820, 0x94},
|
|
{0x3821, 0xc6},
|
|
{0x3822, 0x48},
|
|
{0x3826, 0x00},
|
|
{0x3827, 0x08},
|
|
{0x382a, 0x07},
|
|
{0x382b, 0x01},
|
|
{0x3830, 0x08},
|
|
{0x3836, 0x02},
|
|
{0x3837, 0x00},
|
|
{0x3838, 0x10},
|
|
{0x3841, 0xff},
|
|
{0x3846, 0x48},
|
|
{0x3861, 0x00},
|
|
{0x3862, 0x04},
|
|
{0x3863, 0x06},
|
|
{0x3a11, 0x01},
|
|
{0x3a12, 0x78},
|
|
{0x3b00, 0x00},
|
|
{0x3b02, 0x00},
|
|
{0x3b03, 0x00},
|
|
{0x3b04, 0x00},
|
|
{0x3b05, 0x00},
|
|
{0x3c00, 0x89},
|
|
{0x3c01, 0xab},
|
|
{0x3c02, 0x01},
|
|
{0x3c03, 0x00},
|
|
{0x3c04, 0x00},
|
|
{0x3c05, 0x03},
|
|
{0x3c06, 0x00},
|
|
{0x3c07, 0x05},
|
|
{0x3c0c, 0x00},
|
|
{0x3c0d, 0x00},
|
|
{0x3c0e, 0x00},
|
|
{0x3c0f, 0x00},
|
|
{0x3c40, 0x00},
|
|
{0x3c41, 0xa3},
|
|
{0x3c43, 0x7d},
|
|
{0x3c45, 0xd7},
|
|
{0x3c47, 0xfc},
|
|
{0x3c50, 0x05},
|
|
{0x3c52, 0xaa},
|
|
{0x3c54, 0x71},
|
|
{0x3c56, 0x80},
|
|
{0x3d85, 0x17},
|
|
{0x3f03, 0x00},
|
|
{0x3f0a, 0x00},
|
|
{0x3f0b, 0x00},
|
|
{0x4001, 0x60},
|
|
{0x4009, 0x05},
|
|
{0x4020, 0x00},
|
|
{0x4021, 0x00},
|
|
{0x4022, 0x00},
|
|
{0x4023, 0x00},
|
|
{0x4024, 0x00},
|
|
{0x4025, 0x00},
|
|
{0x4026, 0x00},
|
|
{0x4027, 0x00},
|
|
{0x4028, 0x00},
|
|
{0x4029, 0x00},
|
|
{0x402a, 0x00},
|
|
{0x402b, 0x00},
|
|
{0x402c, 0x00},
|
|
{0x402d, 0x00},
|
|
{0x402e, 0x00},
|
|
{0x402f, 0x00},
|
|
{0x4040, 0x00},
|
|
{0x4041, 0x03},
|
|
{0x4042, 0x00},
|
|
{0x4043, 0x7A},
|
|
{0x4044, 0x00},
|
|
{0x4045, 0x7A},
|
|
{0x4046, 0x00},
|
|
{0x4047, 0x7A},
|
|
{0x4048, 0x00},
|
|
{0x4049, 0x7A},
|
|
{0x4307, 0x30},
|
|
{0x4500, 0x58},
|
|
{0x4501, 0x04},
|
|
{0x4502, 0x40},
|
|
{0x4503, 0x10},
|
|
{0x4508, 0x55},
|
|
{0x4509, 0x55},
|
|
{0x450a, 0x02},
|
|
{0x450b, 0x00},
|
|
{0x4600, 0x00},
|
|
{0x4601, 0x40},
|
|
{0x4700, 0xa4},
|
|
{0x4800, 0x4c},
|
|
{0x4816, 0x53},
|
|
{0x481f, 0x40},
|
|
{0x4837, 0x13},
|
|
{0x5000, 0x56},
|
|
{0x5001, 0x01},
|
|
{0x5002, 0x28},
|
|
{0x5004, 0x0c},
|
|
{0x5006, 0x0c},
|
|
{0x5007, 0xe0},
|
|
{0x5008, 0x01},
|
|
{0x5009, 0xb0},
|
|
{0x5901, 0x00},
|
|
{0x5a01, 0x00},
|
|
{0x5a03, 0x00},
|
|
{0x5a04, 0x0c},
|
|
{0x5a05, 0xe0},
|
|
{0x5a06, 0x09},
|
|
{0x5a07, 0xb0},
|
|
{0x5a08, 0x06},
|
|
{0x5e00, 0x00},
|
|
{0x3734, 0x40},
|
|
{0x5b00, 0x01},
|
|
{0x5b01, 0x10},
|
|
{0x5b02, 0x01},
|
|
{0x5b03, 0xdb},
|
|
{0x3d8c, 0x71},
|
|
{0x3d8d, 0xea},
|
|
{0x4017, 0x10},
|
|
{0x3618, 0x2a},
|
|
{0x5780, 0x3e},
|
|
{0x5781, 0x0f},
|
|
{0x5782, 0x44},
|
|
{0x5783, 0x02},
|
|
{0x5784, 0x01},
|
|
{0x5785, 0x01},
|
|
{0x5786, 0x00},
|
|
{0x5787, 0x04},
|
|
{0x5788, 0x02},
|
|
{0x5789, 0x0f},
|
|
{0x578a, 0xfd},
|
|
{0x578b, 0xf5},
|
|
{0x578c, 0xf5},
|
|
{0x578d, 0x03},
|
|
{0x578e, 0x08},
|
|
{0x578f, 0x0c},
|
|
{0x5790, 0x08},
|
|
{0x5791, 0x06},
|
|
{0x5792, 0x00},
|
|
{0x5793, 0x52},
|
|
{0x5794, 0xa3},
|
|
{0x3503, 0x00},
|
|
{0x5045, 0x05},
|
|
{0x4003, 0x40},
|
|
{0x5048, 0x40}
|
|
};
|
|
|
|
static const char * const ov5670_test_pattern_menu[] = {
|
|
"Disabled",
|
|
"Vertical Color Bar Type 1",
|
|
};
|
|
|
|
/* Supported link frequencies */
|
|
#define OV5670_LINK_FREQ_422MHZ 422400000
|
|
#define OV5670_LINK_FREQ_422MHZ_INDEX 0
|
|
static const struct ov5670_link_freq_config link_freq_configs[] = {
|
|
{
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mipi_data_rate_840mbps),
|
|
.regs = mipi_data_rate_840mbps,
|
|
}
|
|
}
|
|
};
|
|
|
|
static const s64 link_freq_menu_items[] = {
|
|
OV5670_LINK_FREQ_422MHZ
|
|
};
|
|
|
|
/*
|
|
* OV5670 sensor supports following resolutions with full FOV:
|
|
* 4:3 ==> {2592x1944, 1296x972, 648x486}
|
|
* 16:9 ==> {2560x1440, 1280x720, 640x360}
|
|
*/
|
|
static const struct ov5670_mode supported_modes[] = {
|
|
{
|
|
.width = 2592,
|
|
.height = 1944,
|
|
.vts_def = OV5670_VTS_30FPS,
|
|
.vts_min = OV5670_VTS_30FPS,
|
|
.link_freq_index = OV5670_LINK_FREQ_422MHZ_INDEX,
|
|
.analog_crop = &ov5670_analog_crop,
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mode_2592x1944_regs),
|
|
.regs = mode_2592x1944_regs,
|
|
},
|
|
},
|
|
{
|
|
.width = 1296,
|
|
.height = 972,
|
|
.vts_def = OV5670_VTS_30FPS,
|
|
.vts_min = 996,
|
|
.link_freq_index = OV5670_LINK_FREQ_422MHZ_INDEX,
|
|
.analog_crop = &ov5670_analog_crop,
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mode_1296x972_regs),
|
|
.regs = mode_1296x972_regs,
|
|
},
|
|
},
|
|
{
|
|
.width = 648,
|
|
.height = 486,
|
|
.vts_def = OV5670_VTS_30FPS,
|
|
.vts_min = 516,
|
|
.link_freq_index = OV5670_LINK_FREQ_422MHZ_INDEX,
|
|
.analog_crop = &ov5670_analog_crop,
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mode_648x486_regs),
|
|
.regs = mode_648x486_regs,
|
|
},
|
|
},
|
|
{
|
|
.width = 2560,
|
|
.height = 1440,
|
|
.vts_def = OV5670_VTS_30FPS,
|
|
.vts_min = OV5670_VTS_30FPS,
|
|
.link_freq_index = OV5670_LINK_FREQ_422MHZ_INDEX,
|
|
.analog_crop = &ov5670_analog_crop,
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mode_2560x1440_regs),
|
|
.regs = mode_2560x1440_regs,
|
|
},
|
|
},
|
|
{
|
|
.width = 1280,
|
|
.height = 720,
|
|
.vts_def = OV5670_VTS_30FPS,
|
|
.vts_min = 1020,
|
|
|
|
.link_freq_index = OV5670_LINK_FREQ_422MHZ_INDEX,
|
|
.analog_crop = &ov5670_analog_crop,
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mode_1280x720_regs),
|
|
.regs = mode_1280x720_regs,
|
|
},
|
|
},
|
|
{
|
|
.width = 640,
|
|
.height = 360,
|
|
.vts_def = OV5670_VTS_30FPS,
|
|
.vts_min = 510,
|
|
.link_freq_index = OV5670_LINK_FREQ_422MHZ_INDEX,
|
|
.analog_crop = &ov5670_analog_crop,
|
|
.reg_list = {
|
|
.num_of_regs = ARRAY_SIZE(mode_640x360_regs),
|
|
.regs = mode_640x360_regs,
|
|
},
|
|
}
|
|
};
|
|
|
|
struct ov5670 {
|
|
struct v4l2_subdev sd;
|
|
struct media_pad pad;
|
|
struct v4l2_fwnode_endpoint endpoint;
|
|
|
|
struct v4l2_ctrl_handler ctrl_handler;
|
|
/* V4L2 Controls */
|
|
struct v4l2_ctrl *link_freq;
|
|
struct v4l2_ctrl *pixel_rate;
|
|
struct v4l2_ctrl *vblank;
|
|
struct v4l2_ctrl *hblank;
|
|
struct v4l2_ctrl *exposure;
|
|
|
|
/* Current mode */
|
|
const struct ov5670_mode *cur_mode;
|
|
|
|
/* xvclk input clock */
|
|
struct clk *xvclk;
|
|
|
|
/* Regulators */
|
|
struct regulator_bulk_data supplies[OV5670_NUM_SUPPLIES];
|
|
|
|
/* Power-down and reset gpios. */
|
|
struct gpio_desc *pwdn_gpio; /* PWDNB pin. */
|
|
struct gpio_desc *reset_gpio; /* XSHUTDOWN pin. */
|
|
|
|
/* To serialize asynchronus callbacks */
|
|
struct mutex mutex;
|
|
|
|
/* True if the device has been identified */
|
|
bool identified;
|
|
};
|
|
|
|
#define to_ov5670(_sd) container_of(_sd, struct ov5670, sd)
|
|
|
|
/* Read registers up to 4 at a time */
|
|
static int ov5670_read_reg(struct ov5670 *ov5670, u16 reg, unsigned int len,
|
|
u32 *val)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
struct i2c_msg msgs[2];
|
|
u8 *data_be_p;
|
|
__be32 data_be = 0;
|
|
__be16 reg_addr_be = cpu_to_be16(reg);
|
|
int ret;
|
|
|
|
if (len > 4)
|
|
return -EINVAL;
|
|
|
|
data_be_p = (u8 *)&data_be;
|
|
/* Write register address */
|
|
msgs[0].addr = client->addr;
|
|
msgs[0].flags = 0;
|
|
msgs[0].len = 2;
|
|
msgs[0].buf = (u8 *)®_addr_be;
|
|
|
|
/* Read data from register */
|
|
msgs[1].addr = client->addr;
|
|
msgs[1].flags = I2C_M_RD;
|
|
msgs[1].len = len;
|
|
msgs[1].buf = &data_be_p[4 - len];
|
|
|
|
ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
|
|
if (ret != ARRAY_SIZE(msgs))
|
|
return -EIO;
|
|
|
|
*val = be32_to_cpu(data_be);
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Write registers up to 4 at a time */
|
|
static int ov5670_write_reg(struct ov5670 *ov5670, u16 reg, unsigned int len,
|
|
u32 val)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
int buf_i;
|
|
int val_i;
|
|
u8 buf[6];
|
|
u8 *val_p;
|
|
__be32 tmp;
|
|
|
|
if (len > 4)
|
|
return -EINVAL;
|
|
|
|
buf[0] = reg >> 8;
|
|
buf[1] = reg & 0xff;
|
|
|
|
tmp = cpu_to_be32(val);
|
|
val_p = (u8 *)&tmp;
|
|
buf_i = 2;
|
|
val_i = 4 - len;
|
|
|
|
while (val_i < 4)
|
|
buf[buf_i++] = val_p[val_i++];
|
|
|
|
if (i2c_master_send(client, buf, len + 2) != len + 2)
|
|
return -EIO;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Write a list of registers */
|
|
static int ov5670_write_regs(struct ov5670 *ov5670,
|
|
const struct ov5670_reg *regs, unsigned int len)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
unsigned int i;
|
|
int ret;
|
|
|
|
for (i = 0; i < len; i++) {
|
|
ret = ov5670_write_reg(ov5670, regs[i].address, 1, regs[i].val);
|
|
if (ret) {
|
|
dev_err_ratelimited(
|
|
&client->dev,
|
|
"Failed to write reg 0x%4.4x. error = %d\n",
|
|
regs[i].address, ret);
|
|
|
|
return ret;
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_write_reg_list(struct ov5670 *ov5670,
|
|
const struct ov5670_reg_list *r_list)
|
|
{
|
|
return ov5670_write_regs(ov5670, r_list->regs, r_list->num_of_regs);
|
|
}
|
|
|
|
static int ov5670_update_digital_gain(struct ov5670 *ov5670, u32 d_gain)
|
|
{
|
|
int ret;
|
|
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_R_DGTL_GAIN,
|
|
OV5670_REG_VALUE_16BIT, d_gain);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_G_DGTL_GAIN,
|
|
OV5670_REG_VALUE_16BIT, d_gain);
|
|
if (ret)
|
|
return ret;
|
|
|
|
return ov5670_write_reg(ov5670, OV5670_REG_B_DGTL_GAIN,
|
|
OV5670_REG_VALUE_16BIT, d_gain);
|
|
}
|
|
|
|
static int ov5670_enable_test_pattern(struct ov5670 *ov5670, u32 pattern)
|
|
{
|
|
u32 val;
|
|
int ret;
|
|
|
|
/* Set the bayer order that we support */
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_TEST_PATTERN_CTRL,
|
|
OV5670_REG_VALUE_08BIT, 0);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = ov5670_read_reg(ov5670, OV5670_REG_TEST_PATTERN,
|
|
OV5670_REG_VALUE_08BIT, &val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (pattern)
|
|
val |= OV5670_TEST_PATTERN_ENABLE;
|
|
else
|
|
val &= ~OV5670_TEST_PATTERN_ENABLE;
|
|
|
|
return ov5670_write_reg(ov5670, OV5670_REG_TEST_PATTERN,
|
|
OV5670_REG_VALUE_08BIT, val);
|
|
}
|
|
|
|
/* Initialize control handlers */
|
|
static int ov5670_set_ctrl(struct v4l2_ctrl *ctrl)
|
|
{
|
|
struct ov5670 *ov5670 = container_of(ctrl->handler,
|
|
struct ov5670, ctrl_handler);
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
s64 max;
|
|
int ret;
|
|
|
|
/* Propagate change of current control to all related controls */
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_VBLANK:
|
|
/* Update max exposure while meeting expected vblanking */
|
|
max = ov5670->cur_mode->height + ctrl->val - 8;
|
|
__v4l2_ctrl_modify_range(ov5670->exposure,
|
|
ov5670->exposure->minimum, max,
|
|
ov5670->exposure->step, max);
|
|
break;
|
|
}
|
|
|
|
/* V4L2 controls values will be applied only when power is already up */
|
|
if (!pm_runtime_get_if_in_use(&client->dev))
|
|
return 0;
|
|
|
|
switch (ctrl->id) {
|
|
case V4L2_CID_ANALOGUE_GAIN:
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_ANALOG_GAIN,
|
|
OV5670_REG_VALUE_16BIT, ctrl->val);
|
|
break;
|
|
case V4L2_CID_DIGITAL_GAIN:
|
|
ret = ov5670_update_digital_gain(ov5670, ctrl->val);
|
|
break;
|
|
case V4L2_CID_EXPOSURE:
|
|
/* 4 least significant bits of expsoure are fractional part */
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_EXPOSURE,
|
|
OV5670_REG_VALUE_24BIT, ctrl->val << 4);
|
|
break;
|
|
case V4L2_CID_VBLANK:
|
|
/* Update VTS that meets expected vertical blanking */
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_VTS,
|
|
OV5670_REG_VALUE_16BIT,
|
|
ov5670->cur_mode->height + ctrl->val);
|
|
break;
|
|
case V4L2_CID_TEST_PATTERN:
|
|
ret = ov5670_enable_test_pattern(ov5670, ctrl->val);
|
|
break;
|
|
case V4L2_CID_HBLANK:
|
|
case V4L2_CID_LINK_FREQ:
|
|
case V4L2_CID_PIXEL_RATE:
|
|
ret = 0;
|
|
break;
|
|
default:
|
|
ret = -EINVAL;
|
|
dev_info(&client->dev, "%s Unhandled id:0x%x, val:0x%x\n",
|
|
__func__, ctrl->id, ctrl->val);
|
|
break;
|
|
}
|
|
|
|
pm_runtime_put(&client->dev);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static const struct v4l2_ctrl_ops ov5670_ctrl_ops = {
|
|
.s_ctrl = ov5670_set_ctrl,
|
|
};
|
|
|
|
/* Initialize control handlers */
|
|
static int ov5670_init_controls(struct ov5670 *ov5670)
|
|
{
|
|
struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
|
|
&ov5670->endpoint.bus.mipi_csi2;
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
struct v4l2_fwnode_device_properties props;
|
|
struct v4l2_ctrl_handler *ctrl_hdlr;
|
|
unsigned int lanes_count;
|
|
s64 mipi_pixel_rate;
|
|
s64 vblank_max;
|
|
s64 vblank_def;
|
|
s64 vblank_min;
|
|
s64 exposure_max;
|
|
int ret;
|
|
|
|
ctrl_hdlr = &ov5670->ctrl_handler;
|
|
ret = v4l2_ctrl_handler_init(ctrl_hdlr, 10);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ctrl_hdlr->lock = &ov5670->mutex;
|
|
ov5670->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
|
|
&ov5670_ctrl_ops,
|
|
V4L2_CID_LINK_FREQ,
|
|
0, 0, link_freq_menu_items);
|
|
if (ov5670->link_freq)
|
|
ov5670->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
/* By default, V4L2_CID_PIXEL_RATE is read only */
|
|
lanes_count = bus_mipi_csi2->num_data_lanes;
|
|
mipi_pixel_rate = OV5670_LINK_FREQ_422MHZ * 2 * lanes_count / 10;
|
|
|
|
ov5670->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov5670_ctrl_ops,
|
|
V4L2_CID_PIXEL_RATE,
|
|
mipi_pixel_rate,
|
|
mipi_pixel_rate,
|
|
1,
|
|
mipi_pixel_rate);
|
|
|
|
vblank_max = OV5670_VTS_MAX - ov5670->cur_mode->height;
|
|
vblank_def = ov5670->cur_mode->vts_def - ov5670->cur_mode->height;
|
|
vblank_min = ov5670->cur_mode->vts_min - ov5670->cur_mode->height;
|
|
ov5670->vblank = v4l2_ctrl_new_std(ctrl_hdlr, &ov5670_ctrl_ops,
|
|
V4L2_CID_VBLANK, vblank_min,
|
|
vblank_max, 1, vblank_def);
|
|
|
|
ov5670->hblank = v4l2_ctrl_new_std(
|
|
ctrl_hdlr, &ov5670_ctrl_ops, V4L2_CID_HBLANK,
|
|
OV5670_FIXED_PPL - ov5670->cur_mode->width,
|
|
OV5670_FIXED_PPL - ov5670->cur_mode->width, 1,
|
|
OV5670_FIXED_PPL - ov5670->cur_mode->width);
|
|
if (ov5670->hblank)
|
|
ov5670->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
|
|
|
|
/* Get min, max, step, default from sensor */
|
|
v4l2_ctrl_new_std(ctrl_hdlr, &ov5670_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
|
|
ANALOG_GAIN_MIN, ANALOG_GAIN_MAX, ANALOG_GAIN_STEP,
|
|
ANALOG_GAIN_DEFAULT);
|
|
|
|
/* Digital gain */
|
|
v4l2_ctrl_new_std(ctrl_hdlr, &ov5670_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
|
|
OV5670_DGTL_GAIN_MIN, OV5670_DGTL_GAIN_MAX,
|
|
OV5670_DGTL_GAIN_STEP, OV5670_DGTL_GAIN_DEFAULT);
|
|
|
|
/* Get min, max, step, default from sensor */
|
|
exposure_max = ov5670->cur_mode->vts_def - 8;
|
|
ov5670->exposure = v4l2_ctrl_new_std(ctrl_hdlr, &ov5670_ctrl_ops,
|
|
V4L2_CID_EXPOSURE,
|
|
OV5670_EXPOSURE_MIN,
|
|
exposure_max, OV5670_EXPOSURE_STEP,
|
|
exposure_max);
|
|
|
|
v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov5670_ctrl_ops,
|
|
V4L2_CID_TEST_PATTERN,
|
|
ARRAY_SIZE(ov5670_test_pattern_menu) - 1,
|
|
0, 0, ov5670_test_pattern_menu);
|
|
|
|
if (ctrl_hdlr->error) {
|
|
ret = ctrl_hdlr->error;
|
|
goto error;
|
|
}
|
|
|
|
ret = v4l2_fwnode_device_parse(&client->dev, &props);
|
|
if (ret)
|
|
goto error;
|
|
|
|
ret = v4l2_ctrl_new_fwnode_properties(ctrl_hdlr, &ov5670_ctrl_ops,
|
|
&props);
|
|
if (ret)
|
|
goto error;
|
|
|
|
ov5670->sd.ctrl_handler = ctrl_hdlr;
|
|
|
|
return 0;
|
|
|
|
error:
|
|
v4l2_ctrl_handler_free(ctrl_hdlr);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov5670_init_cfg(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *state)
|
|
{
|
|
struct v4l2_mbus_framefmt *fmt =
|
|
v4l2_subdev_get_try_format(sd, state, 0);
|
|
const struct ov5670_mode *default_mode = &supported_modes[0];
|
|
struct v4l2_rect *crop = v4l2_subdev_get_try_crop(sd, state, 0);
|
|
|
|
fmt->width = default_mode->width;
|
|
fmt->height = default_mode->height;
|
|
fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
|
|
fmt->field = V4L2_FIELD_NONE;
|
|
fmt->colorspace = V4L2_COLORSPACE_SRGB;
|
|
fmt->ycbcr_enc = V4L2_MAP_YCBCR_ENC_DEFAULT(V4L2_COLORSPACE_SRGB);
|
|
fmt->quantization = V4L2_QUANTIZATION_FULL_RANGE;
|
|
fmt->xfer_func = V4L2_MAP_XFER_FUNC_DEFAULT(V4L2_COLORSPACE_SRGB);
|
|
|
|
*crop = *default_mode->analog_crop;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_enum_mbus_code(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_mbus_code_enum *code)
|
|
{
|
|
/* Only one bayer order GRBG is supported */
|
|
if (code->index > 0)
|
|
return -EINVAL;
|
|
|
|
code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_enum_frame_size(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_frame_size_enum *fse)
|
|
{
|
|
if (fse->index >= ARRAY_SIZE(supported_modes))
|
|
return -EINVAL;
|
|
|
|
if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
|
|
return -EINVAL;
|
|
|
|
fse->min_width = supported_modes[fse->index].width;
|
|
fse->max_width = fse->min_width;
|
|
fse->min_height = supported_modes[fse->index].height;
|
|
fse->max_height = fse->min_height;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void ov5670_update_pad_format(const struct ov5670_mode *mode,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
fmt->format.width = mode->width;
|
|
fmt->format.height = mode->height;
|
|
fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
|
|
fmt->format.field = V4L2_FIELD_NONE;
|
|
}
|
|
|
|
static int ov5670_do_get_pad_format(struct ov5670 *ov5670,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY)
|
|
fmt->format = *v4l2_subdev_get_try_format(&ov5670->sd,
|
|
sd_state,
|
|
fmt->pad);
|
|
else
|
|
ov5670_update_pad_format(ov5670->cur_mode, fmt);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_get_pad_format(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct ov5670 *ov5670 = to_ov5670(sd);
|
|
int ret;
|
|
|
|
mutex_lock(&ov5670->mutex);
|
|
ret = ov5670_do_get_pad_format(ov5670, sd_state, fmt);
|
|
mutex_unlock(&ov5670->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int ov5670_set_pad_format(struct v4l2_subdev *sd,
|
|
struct v4l2_subdev_state *sd_state,
|
|
struct v4l2_subdev_format *fmt)
|
|
{
|
|
struct ov5670 *ov5670 = to_ov5670(sd);
|
|
struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
|
|
&ov5670->endpoint.bus.mipi_csi2;
|
|
const struct ov5670_mode *mode;
|
|
unsigned int lanes_count;
|
|
s64 mipi_pixel_rate;
|
|
s32 vblank_def;
|
|
s64 link_freq;
|
|
s32 h_blank;
|
|
|
|
mutex_lock(&ov5670->mutex);
|
|
|
|
fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
|
|
|
|
mode = v4l2_find_nearest_size(supported_modes,
|
|
ARRAY_SIZE(supported_modes),
|
|
width, height,
|
|
fmt->format.width, fmt->format.height);
|
|
ov5670_update_pad_format(mode, fmt);
|
|
if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
|
|
*v4l2_subdev_get_try_format(sd, sd_state, fmt->pad) = fmt->format;
|
|
} else {
|
|
ov5670->cur_mode = mode;
|
|
__v4l2_ctrl_s_ctrl(ov5670->link_freq, mode->link_freq_index);
|
|
|
|
lanes_count = bus_mipi_csi2->num_data_lanes;
|
|
link_freq = link_freq_menu_items[mode->link_freq_index];
|
|
/* pixel_rate = link_freq * 2 * nr_of_lanes / bits_per_sample */
|
|
mipi_pixel_rate = div_s64(link_freq * 2 * lanes_count, 10);
|
|
__v4l2_ctrl_s_ctrl_int64(
|
|
ov5670->pixel_rate,
|
|
mipi_pixel_rate);
|
|
/* Update limits and set FPS to default */
|
|
vblank_def = ov5670->cur_mode->vts_def -
|
|
ov5670->cur_mode->height;
|
|
__v4l2_ctrl_modify_range(
|
|
ov5670->vblank,
|
|
ov5670->cur_mode->vts_min - ov5670->cur_mode->height,
|
|
OV5670_VTS_MAX - ov5670->cur_mode->height, 1,
|
|
vblank_def);
|
|
__v4l2_ctrl_s_ctrl(ov5670->vblank, vblank_def);
|
|
h_blank = OV5670_FIXED_PPL - ov5670->cur_mode->width;
|
|
__v4l2_ctrl_modify_range(ov5670->hblank, h_blank, h_blank, 1,
|
|
h_blank);
|
|
}
|
|
|
|
mutex_unlock(&ov5670->mutex);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_get_skip_frames(struct v4l2_subdev *sd, u32 *frames)
|
|
{
|
|
*frames = OV5670_NUM_OF_SKIP_FRAMES;
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Verify chip ID */
|
|
static int ov5670_identify_module(struct ov5670 *ov5670)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
int ret;
|
|
u32 val;
|
|
|
|
if (ov5670->identified)
|
|
return 0;
|
|
|
|
ret = ov5670_read_reg(ov5670, OV5670_REG_CHIP_ID,
|
|
OV5670_REG_VALUE_24BIT, &val);
|
|
if (ret)
|
|
return ret;
|
|
|
|
if (val != OV5670_CHIP_ID) {
|
|
dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
|
|
OV5670_CHIP_ID, val);
|
|
return -ENXIO;
|
|
}
|
|
|
|
ov5670->identified = true;
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_mipi_configure(struct ov5670 *ov5670)
|
|
{
|
|
struct v4l2_mbus_config_mipi_csi2 *bus_mipi_csi2 =
|
|
&ov5670->endpoint.bus.mipi_csi2;
|
|
unsigned int lanes_count = bus_mipi_csi2->num_data_lanes;
|
|
|
|
return ov5670_write_reg(ov5670, OV5670_MIPI_SC_CTRL0_REG,
|
|
OV5670_REG_VALUE_08BIT,
|
|
OV5670_MIPI_SC_CTRL0_LANES(lanes_count) |
|
|
OV5670_MIPI_SC_CTRL0_MIPI_EN |
|
|
OV5670_MIPI_SC_CTRL0_RESERVED);
|
|
}
|
|
|
|
/* Prepare streaming by writing default values and customized values */
|
|
static int ov5670_start_streaming(struct ov5670 *ov5670)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
const struct ov5670_reg_list *reg_list;
|
|
int link_freq_index;
|
|
int ret;
|
|
|
|
ret = ov5670_identify_module(ov5670);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Get out of from software reset */
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_SOFTWARE_RST,
|
|
OV5670_REG_VALUE_08BIT, OV5670_SOFTWARE_RST);
|
|
if (ret) {
|
|
dev_err(&client->dev, "%s failed to set powerup registers\n",
|
|
__func__);
|
|
return ret;
|
|
}
|
|
|
|
/* Setup PLL */
|
|
link_freq_index = ov5670->cur_mode->link_freq_index;
|
|
reg_list = &link_freq_configs[link_freq_index].reg_list;
|
|
ret = ov5670_write_reg_list(ov5670, reg_list);
|
|
if (ret) {
|
|
dev_err(&client->dev, "%s failed to set plls\n", __func__);
|
|
return ret;
|
|
}
|
|
|
|
/* Apply default values of current mode */
|
|
reg_list = &ov5670->cur_mode->reg_list;
|
|
ret = ov5670_write_reg_list(ov5670, reg_list);
|
|
if (ret) {
|
|
dev_err(&client->dev, "%s failed to set mode\n", __func__);
|
|
return ret;
|
|
}
|
|
|
|
ret = ov5670_mipi_configure(ov5670);
|
|
if (ret) {
|
|
dev_err(&client->dev, "%s failed to configure MIPI\n", __func__);
|
|
return ret;
|
|
}
|
|
|
|
ret = __v4l2_ctrl_handler_setup(ov5670->sd.ctrl_handler);
|
|
if (ret)
|
|
return ret;
|
|
|
|
/* Write stream on list */
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_MODE_SELECT,
|
|
OV5670_REG_VALUE_08BIT, OV5670_MODE_STREAMING);
|
|
if (ret) {
|
|
dev_err(&client->dev, "%s failed to set stream\n", __func__);
|
|
return ret;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_stop_streaming(struct ov5670 *ov5670)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
int ret;
|
|
|
|
ret = ov5670_write_reg(ov5670, OV5670_REG_MODE_SELECT,
|
|
OV5670_REG_VALUE_08BIT, OV5670_MODE_STANDBY);
|
|
if (ret)
|
|
dev_err(&client->dev, "%s failed to set stream\n", __func__);
|
|
|
|
/* Return success even if it was an error, as there is nothing the
|
|
* caller can do about it.
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_set_stream(struct v4l2_subdev *sd, int enable)
|
|
{
|
|
struct ov5670 *ov5670 = to_ov5670(sd);
|
|
struct i2c_client *client = v4l2_get_subdevdata(sd);
|
|
int ret = 0;
|
|
|
|
mutex_lock(&ov5670->mutex);
|
|
|
|
if (enable) {
|
|
ret = pm_runtime_resume_and_get(&client->dev);
|
|
if (ret < 0)
|
|
goto unlock_and_return;
|
|
|
|
ret = ov5670_start_streaming(ov5670);
|
|
if (ret)
|
|
goto error;
|
|
} else {
|
|
ret = ov5670_stop_streaming(ov5670);
|
|
pm_runtime_put(&client->dev);
|
|
}
|
|
goto unlock_and_return;
|
|
|
|
error:
|
|
pm_runtime_put(&client->dev);
|
|
|
|
unlock_and_return:
|
|
mutex_unlock(&ov5670->mutex);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static int __maybe_unused ov5670_runtime_resume(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov5670 *ov5670 = to_ov5670(sd);
|
|
unsigned long delay_us;
|
|
int ret;
|
|
|
|
ret = clk_prepare_enable(ov5670->xvclk);
|
|
if (ret)
|
|
return ret;
|
|
|
|
ret = regulator_bulk_enable(OV5670_NUM_SUPPLIES, ov5670->supplies);
|
|
if (ret) {
|
|
clk_disable_unprepare(ov5670->xvclk);
|
|
return ret;
|
|
}
|
|
|
|
gpiod_set_value_cansleep(ov5670->pwdn_gpio, 0);
|
|
gpiod_set_value_cansleep(ov5670->reset_gpio, 0);
|
|
|
|
/* 8192 * 2 clock pulses before the first SCCB transaction. */
|
|
delay_us = DIV_ROUND_UP(8192 * 2 * 1000,
|
|
DIV_ROUND_UP(OV5670_XVCLK_FREQ, 1000));
|
|
fsleep(delay_us);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int __maybe_unused ov5670_runtime_suspend(struct device *dev)
|
|
{
|
|
struct i2c_client *client = to_i2c_client(dev);
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov5670 *ov5670 = to_ov5670(sd);
|
|
|
|
gpiod_set_value_cansleep(ov5670->reset_gpio, 1);
|
|
gpiod_set_value_cansleep(ov5670->pwdn_gpio, 1);
|
|
regulator_bulk_disable(OV5670_NUM_SUPPLIES, ov5670->supplies);
|
|
clk_disable_unprepare(ov5670->xvclk);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct v4l2_subdev_core_ops ov5670_core_ops = {
|
|
.log_status = v4l2_ctrl_subdev_log_status,
|
|
.subscribe_event = v4l2_ctrl_subdev_subscribe_event,
|
|
.unsubscribe_event = v4l2_event_subdev_unsubscribe,
|
|
};
|
|
|
|
static const struct v4l2_rect *
|
|
__ov5670_get_pad_crop(struct ov5670 *sensor, struct v4l2_subdev_state *state,
|
|
unsigned int pad, enum v4l2_subdev_format_whence which)
|
|
{
|
|
const struct ov5670_mode *mode = sensor->cur_mode;
|
|
|
|
switch (which) {
|
|
case V4L2_SUBDEV_FORMAT_TRY:
|
|
return v4l2_subdev_get_try_crop(&sensor->sd, state, pad);
|
|
case V4L2_SUBDEV_FORMAT_ACTIVE:
|
|
return mode->analog_crop;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static int ov5670_get_selection(struct v4l2_subdev *subdev,
|
|
struct v4l2_subdev_state *state,
|
|
struct v4l2_subdev_selection *sel)
|
|
{
|
|
struct ov5670 *sensor = to_ov5670(subdev);
|
|
|
|
switch (sel->target) {
|
|
case V4L2_SEL_TGT_CROP:
|
|
mutex_lock(&sensor->mutex);
|
|
sel->r = *__ov5670_get_pad_crop(sensor, state, sel->pad,
|
|
sel->which);
|
|
mutex_unlock(&sensor->mutex);
|
|
break;
|
|
case V4L2_SEL_TGT_NATIVE_SIZE:
|
|
case V4L2_SEL_TGT_CROP_BOUNDS:
|
|
sel->r.top = 0;
|
|
sel->r.left = 0;
|
|
sel->r.width = OV5670_NATIVE_WIDTH;
|
|
sel->r.height = OV5670_NATIVE_HEIGHT;
|
|
break;
|
|
case V4L2_SEL_TGT_CROP_DEFAULT:
|
|
sel->r = ov5670_analog_crop;
|
|
break;
|
|
default:
|
|
return -EINVAL;
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static const struct v4l2_subdev_video_ops ov5670_video_ops = {
|
|
.s_stream = ov5670_set_stream,
|
|
};
|
|
|
|
static const struct v4l2_subdev_pad_ops ov5670_pad_ops = {
|
|
.init_cfg = ov5670_init_cfg,
|
|
.enum_mbus_code = ov5670_enum_mbus_code,
|
|
.get_fmt = ov5670_get_pad_format,
|
|
.set_fmt = ov5670_set_pad_format,
|
|
.enum_frame_size = ov5670_enum_frame_size,
|
|
.get_selection = ov5670_get_selection,
|
|
.set_selection = ov5670_get_selection,
|
|
};
|
|
|
|
static const struct v4l2_subdev_sensor_ops ov5670_sensor_ops = {
|
|
.g_skip_frames = ov5670_get_skip_frames,
|
|
};
|
|
|
|
static const struct v4l2_subdev_ops ov5670_subdev_ops = {
|
|
.core = &ov5670_core_ops,
|
|
.video = &ov5670_video_ops,
|
|
.pad = &ov5670_pad_ops,
|
|
.sensor = &ov5670_sensor_ops,
|
|
};
|
|
|
|
static const struct media_entity_operations ov5670_subdev_entity_ops = {
|
|
.link_validate = v4l2_subdev_link_validate,
|
|
};
|
|
|
|
static int ov5670_regulators_probe(struct ov5670 *ov5670)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < OV5670_NUM_SUPPLIES; i++)
|
|
ov5670->supplies[i].supply = ov5670_supply_names[i];
|
|
|
|
return devm_regulator_bulk_get(&client->dev, OV5670_NUM_SUPPLIES,
|
|
ov5670->supplies);
|
|
}
|
|
|
|
static int ov5670_gpio_probe(struct ov5670 *ov5670)
|
|
{
|
|
struct i2c_client *client = v4l2_get_subdevdata(&ov5670->sd);
|
|
|
|
ov5670->pwdn_gpio = devm_gpiod_get_optional(&client->dev, "powerdown",
|
|
GPIOD_OUT_LOW);
|
|
if (IS_ERR(ov5670->pwdn_gpio))
|
|
return PTR_ERR(ov5670->pwdn_gpio);
|
|
|
|
ov5670->reset_gpio = devm_gpiod_get_optional(&client->dev, "reset",
|
|
GPIOD_OUT_LOW);
|
|
if (IS_ERR(ov5670->reset_gpio))
|
|
return PTR_ERR(ov5670->reset_gpio);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int ov5670_probe(struct i2c_client *client)
|
|
{
|
|
struct fwnode_handle *handle;
|
|
struct ov5670 *ov5670;
|
|
u32 input_clk = 0;
|
|
bool full_power;
|
|
int ret;
|
|
|
|
ov5670 = devm_kzalloc(&client->dev, sizeof(*ov5670), GFP_KERNEL);
|
|
if (!ov5670)
|
|
return -ENOMEM;
|
|
|
|
ov5670->xvclk = devm_clk_get_optional(&client->dev, NULL);
|
|
if (!IS_ERR_OR_NULL(ov5670->xvclk))
|
|
input_clk = clk_get_rate(ov5670->xvclk);
|
|
else if (!ov5670->xvclk || PTR_ERR(ov5670->xvclk) == -ENOENT)
|
|
device_property_read_u32(&client->dev, "clock-frequency",
|
|
&input_clk);
|
|
else
|
|
return dev_err_probe(&client->dev, PTR_ERR(ov5670->xvclk),
|
|
"error getting clock\n");
|
|
|
|
if (input_clk != OV5670_XVCLK_FREQ) {
|
|
dev_err(&client->dev,
|
|
"Unsupported clock frequency %u\n", input_clk);
|
|
return -EINVAL;
|
|
}
|
|
|
|
/* Initialize subdev */
|
|
v4l2_i2c_subdev_init(&ov5670->sd, client, &ov5670_subdev_ops);
|
|
|
|
ret = ov5670_regulators_probe(ov5670);
|
|
if (ret)
|
|
return dev_err_probe(&client->dev, ret, "Regulators probe failed\n");
|
|
|
|
ret = ov5670_gpio_probe(ov5670);
|
|
if (ret)
|
|
return dev_err_probe(&client->dev, ret, "GPIO probe failed\n");
|
|
|
|
/* Graph Endpoint */
|
|
handle = fwnode_graph_get_next_endpoint(dev_fwnode(&client->dev), NULL);
|
|
if (!handle)
|
|
return dev_err_probe(&client->dev, -ENXIO, "Endpoint for node get failed\n");
|
|
|
|
ov5670->endpoint.bus_type = V4L2_MBUS_CSI2_DPHY;
|
|
ov5670->endpoint.bus.mipi_csi2.num_data_lanes = 2;
|
|
|
|
ret = v4l2_fwnode_endpoint_alloc_parse(handle, &ov5670->endpoint);
|
|
fwnode_handle_put(handle);
|
|
if (ret)
|
|
return dev_err_probe(&client->dev, ret, "Endpoint parse failed\n");
|
|
|
|
full_power = acpi_dev_state_d0(&client->dev);
|
|
if (full_power) {
|
|
ret = ov5670_runtime_resume(&client->dev);
|
|
if (ret) {
|
|
dev_err_probe(&client->dev, ret, "Power up failed\n");
|
|
goto error_endpoint;
|
|
}
|
|
|
|
/* Check module identity */
|
|
ret = ov5670_identify_module(ov5670);
|
|
if (ret) {
|
|
dev_err_probe(&client->dev, ret, "ov5670_identify_module() error\n");
|
|
goto error_power_off;
|
|
}
|
|
}
|
|
|
|
mutex_init(&ov5670->mutex);
|
|
|
|
/* Set default mode to max resolution */
|
|
ov5670->cur_mode = &supported_modes[0];
|
|
|
|
ret = ov5670_init_controls(ov5670);
|
|
if (ret) {
|
|
dev_err_probe(&client->dev, ret, "ov5670_init_controls() error\n");
|
|
goto error_mutex_destroy;
|
|
}
|
|
|
|
ov5670->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE |
|
|
V4L2_SUBDEV_FL_HAS_EVENTS;
|
|
ov5670->sd.entity.ops = &ov5670_subdev_entity_ops;
|
|
ov5670->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
|
|
|
|
/* Source pad initialization */
|
|
ov5670->pad.flags = MEDIA_PAD_FL_SOURCE;
|
|
ret = media_entity_pads_init(&ov5670->sd.entity, 1, &ov5670->pad);
|
|
if (ret) {
|
|
dev_err_probe(&client->dev, ret, "media_entity_pads_init() error\n");
|
|
goto error_handler_free;
|
|
}
|
|
|
|
/* Set the device's state to active if it's in D0 state. */
|
|
if (full_power)
|
|
pm_runtime_set_active(&client->dev);
|
|
pm_runtime_enable(&client->dev);
|
|
|
|
/* Async register for subdev */
|
|
ret = v4l2_async_register_subdev_sensor(&ov5670->sd);
|
|
if (ret < 0) {
|
|
dev_err_probe(&client->dev, ret, "v4l2_async_register_subdev() error\n");
|
|
goto error_pm_disable;
|
|
}
|
|
|
|
pm_runtime_idle(&client->dev);
|
|
|
|
return 0;
|
|
|
|
error_pm_disable:
|
|
pm_runtime_disable(&client->dev);
|
|
|
|
media_entity_cleanup(&ov5670->sd.entity);
|
|
|
|
error_handler_free:
|
|
v4l2_ctrl_handler_free(ov5670->sd.ctrl_handler);
|
|
|
|
error_mutex_destroy:
|
|
mutex_destroy(&ov5670->mutex);
|
|
|
|
error_power_off:
|
|
if (full_power)
|
|
ov5670_runtime_suspend(&client->dev);
|
|
|
|
error_endpoint:
|
|
v4l2_fwnode_endpoint_free(&ov5670->endpoint);
|
|
|
|
return ret;
|
|
}
|
|
|
|
static void ov5670_remove(struct i2c_client *client)
|
|
{
|
|
struct v4l2_subdev *sd = i2c_get_clientdata(client);
|
|
struct ov5670 *ov5670 = to_ov5670(sd);
|
|
|
|
v4l2_async_unregister_subdev(sd);
|
|
media_entity_cleanup(&sd->entity);
|
|
v4l2_ctrl_handler_free(sd->ctrl_handler);
|
|
mutex_destroy(&ov5670->mutex);
|
|
|
|
pm_runtime_disable(&client->dev);
|
|
ov5670_runtime_suspend(&client->dev);
|
|
|
|
v4l2_fwnode_endpoint_free(&ov5670->endpoint);
|
|
}
|
|
|
|
static const struct dev_pm_ops ov5670_pm_ops = {
|
|
SET_RUNTIME_PM_OPS(ov5670_runtime_suspend, ov5670_runtime_resume, NULL)
|
|
};
|
|
|
|
#ifdef CONFIG_ACPI
|
|
static const struct acpi_device_id ov5670_acpi_ids[] = {
|
|
{ "INT3479" },
|
|
{ /* sentinel */ }
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(acpi, ov5670_acpi_ids);
|
|
#endif
|
|
|
|
static const struct of_device_id ov5670_of_ids[] = {
|
|
{ .compatible = "ovti,ov5670" },
|
|
{ /* sentinel */ }
|
|
};
|
|
MODULE_DEVICE_TABLE(of, ov5670_of_ids);
|
|
|
|
static struct i2c_driver ov5670_i2c_driver = {
|
|
.driver = {
|
|
.name = "ov5670",
|
|
.pm = &ov5670_pm_ops,
|
|
.acpi_match_table = ACPI_PTR(ov5670_acpi_ids),
|
|
.of_match_table = ov5670_of_ids,
|
|
},
|
|
.probe = ov5670_probe,
|
|
.remove = ov5670_remove,
|
|
.flags = I2C_DRV_ACPI_WAIVE_D0_PROBE,
|
|
};
|
|
|
|
module_i2c_driver(ov5670_i2c_driver);
|
|
|
|
MODULE_AUTHOR("Rapolu, Chiranjeevi");
|
|
MODULE_AUTHOR("Yang, Hyungwoo");
|
|
MODULE_DESCRIPTION("Omnivision ov5670 sensor driver");
|
|
MODULE_LICENSE("GPL v2");
|