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c736c9a955
SM8650 based on the diffstat. Otherwise this is a collection of non-critical fixes and cleanups to various clk drivers and their DT bindings. Nothing is changed in the core clk framework this time, although there's a patch to fix a basic clk type initialization function. In general, this pile looks to be on the smaller side. New Drivers: - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650 - Mediatek MT7988 SoC clocks Updates: - Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP - Support for stm32mp25 clks - Add glitch free PLL setting support to si5351 clk driver - Add DSI clocks on Amlogic g12/sm1 - Add CSI and ISP clocks on Amlogic g12/sm1 - Document bindings for i.MX93 ANATOP clock driver - Free clk_node in i.MX SCU driver for resource with different owner - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15 - Fix the name of the fvco in i.MX pll14xx by renaming it to fout - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S - Check reset monitor registers on Renesas RZ/G2L-alike SoCs - Reuse reset functionality in the Renesas RZ/G2L clock driver - Global and RPMh clock support for the Qualcomm X1E80100 SoC - Support for the Stromer APCS PLL found in Qualcomm IPQ5018 - Add a new type of branch clock, with support for controlling separate memory control bits, to the Qualcomm clk driver - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and QRU1000 - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939 - Add support for the camera clock controller on Qualcomm SC8280XP - Correct PLL configuration in GPU and video clock controllers for Qualcomm SM8150 - Add runtime PM support and a few missing resets to Qualcomm SM8150 video clock controller - Fix configuration of various GCC GDSCs on Qualcomm SM8550 - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver - Fix up GPU and display clock controllers PLL configuration settings on Qualcomm SM8550 - Cleanup variable init in Allwinner nkm module - Convert various DT bindings to YAML - A few kernel-doc fixes for Samsung SoC clock controllers -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmWdydURHHNib3lkQGtl cm5lbC5vcmcACgkQrQKIl8bklSXvtQ//eoF6kwlLT9knQIE9sYQAPJrHytObVpSl 3htHQBvSMKwJNTmzWbKWIUw9T7JliYU+aho768zKqVMVLd6PWk1eOL0NIKB/jSSz /OIWxS9hrcTXm/GAKX+0jyAxw97pq0Qb82PNpD+QuLAcVw/5rMVl/+pMNqeVeqjK 2aN4QfaL7B1F1vV/rBtniG1//Hwwr7IMIT3wIBE6W4jlw84N2gayqEl/EaXabF6F +9Wh8bPS1ny206XGtI8KNcFkv/uFoqWjO7g/hPgXMQcVSd50oV02iJPf6HaWBx4L 9podF3uhNuNk5v02fp1nCygzRn2YDa4eMwMjJtSxU0Inq9s01u8dWNkIgwuCJMjv jSKMMgxa9rHhJ7+xiYi1pQ23fHG1tx600u1zKWMkO1a0U80KeeynGFpdfhUzsD6E ZNUkEee2Ehw1nDMfrUqUt9dWLnRutCXa5jTvgKBWFM7hs9W+ErudAKwP0x2hNl3Z q8Z6RpCoGNnb1e0nw407j3AsXJkbzg9D4KGMlNNEVmuP0iZY3IsVIWrhszx0Zmi4 M3sNNtTskbD4nX42JADhZgVpql2rSikxjfnaBsSXYSJu9SGkCF9clOSb1lKGgKmk gCWcGpmxdmVbTNYCgsZ/jUBs8QDgOxcyFJYLys7/tkjDec9IuxeB37vkaXv2rqU8 t0VzUVWUqYw= =t0CI -----END PGP SIGNATURE----- Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux Pull clk updates from Stephen Boyd: "Only a couple new SoCs have support added this time, primarily for Qualcomm SM8650 based on the diffstat. Otherwise this is a collection of non-critical fixes and cleanups to various clk drivers and their DT bindings. Nothing is changed in the core clk framework this time, although there's a patch to fix a basic clk type initialization function. In general, this pile looks to be on the smaller side. New Drivers: - Global, display, gpu, tcsr, and rpmh clocks on Qualcomm SM8650 - Mediatek MT7988 SoC clocks Updates: - Update Zynqmp driver for Versal NET platforms - Add clk driver for Versal clocking wizard IP - Support for stm32mp25 clks - Add glitch free PLL setting support to si5351 clk driver - Add DSI clocks on Amlogic g12/sm1 - Add CSI and ISP clocks on Amlogic g12/sm1 - Document bindings for i.MX93 ANATOP clock driver - Free clk_node in i.MX SCU driver for resource with different owner - Update the LVDS clocks to be compatible with i.MX SCU firmware 1.15 - Fix the name of the fvco in i.MX pll14xx by renaming it to fout - Add EtherNet TSN and PCIe clocks on the Renesas R-Car V4H SoC - Add interrupt controller and Ethernet clocks and resets on Renesas RZ/G3S - Check reset monitor registers on Renesas RZ/G2L-alike SoCs - Reuse reset functionality in the Renesas RZ/G2L clock driver - Global and RPMh clock support for the Qualcomm X1E80100 SoC - Support for the Stromer APCS PLL found in Qualcomm IPQ5018 - Add a new type of branch clock, with support for controlling separate memory control bits, to the Qualcomm clk driver - Use above new branch type in Qualcomm ECPRI clk driver for QDU1000 and QRU1000 - Add a number of missing clocks related to CSI2 on Qualcomm MSM8939 - Add support for the camera clock controller on Qualcomm SC8280XP - Correct PLL configuration in GPU and video clock controllers for Qualcomm SM8150 - Add runtime PM support and a few missing resets to Qualcomm SM8150 video clock controller - Fix configuration of various GCC GDSCs on Qualcomm SM8550 - Mark shared RCGs appropriately in the Qualcomm SM8550 GCC driver - Fix up GPU and display clock controllers PLL configuration settings on Qualcomm SM8550 - Cleanup variable init in Allwinner nkm module - Convert various DT bindings to YAML - A few kernel-doc fixes for Samsung SoC clock controllers" * tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (93 commits) clk: mediatek: add drivers for MT7988 SoC clk: mediatek: add pcw_chg_bit control for PLLs of MT7988 dt-bindings: clock: mediatek: add clock controllers of MT7988 dt-bindings: reset: mediatek: add MT7988 ethwarp reset IDs dt-bindings: clock: mediatek: add MT7988 clock IDs clk: mediatek: mt8188-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: mt8195-topckgen: Refactor parents for top_dp/edp muxes clk: mediatek: clk-mux: Support custom parent indices for muxes dt-bindings: clock: sophgo: Add clock controller of CV1800 series SoC clk: starfive: jh7100: Add CLK_SET_RATE_PARENT to gmac_tx clk: starfive: Add flags argument to JH71X0__MUX macro clk: imx: pll14xx: change naming of fvco to fout clk: imx: clk-imx8qxp: fix LVDS bypass, pixel and phy clocks clk: imx: scu: Fix memory leak in __imx_clk_gpr_scu() clk: fixed-rate: fix clk_hw_register_fixed_rate_with_accuracy_parent_hw clk: qcom: dispcc-sm8650: Add test_ctl parameters to PLL config clk: qcom: gpucc-sm8650: Add test_ctl parameters to PLL config clk: qcom: dispcc-sm8550: Use the correct PLL configuration function clk: qcom: dispcc-sm8550: Update disp PLL settings clk: qcom: gpucc-sm8550: Update GPU PLL settings ... |
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.. | ||
actions,s500-reset.h | ||
actions,s700-reset.h | ||
actions,s900-reset.h | ||
altr,rst-mgr-a10.h | ||
altr,rst-mgr-a10sr.h | ||
altr,rst-mgr-s10.h | ||
altr,rst-mgr.h | ||
amlogic,c3-reset.h | ||
amlogic,meson8b-clkc-reset.h | ||
amlogic,meson8b-reset.h | ||
amlogic,meson-a1-reset.h | ||
amlogic,meson-axg-audio-arb.h | ||
amlogic,meson-axg-reset.h | ||
amlogic,meson-g12a-audio-reset.h | ||
amlogic,meson-g12a-reset.h | ||
amlogic,meson-gxbb-reset.h | ||
amlogic,meson-s4-reset.h | ||
axg-aoclkc.h | ||
bcm6318-reset.h | ||
bcm6328-reset.h | ||
bcm6358-reset.h | ||
bcm6362-reset.h | ||
bcm6368-reset.h | ||
bcm63268-reset.h | ||
bitmain,bm1880-reset.h | ||
bt1-ccu.h | ||
cortina,gemini-reset.h | ||
delta,tn48m-reset.h | ||
g12a-aoclkc.h | ||
gxbb-aoclkc.h | ||
hisi,hi6220-resets.h | ||
imx7-reset.h | ||
imx8mp-reset.h | ||
imx8mq-reset.h | ||
imx8ulp-pcc-reset.h | ||
k210-rst.h | ||
mediatek,mt6735-wdt.h | ||
mediatek,mt6795-resets.h | ||
mediatek,mt7988-resets.h | ||
mt2701-resets.h | ||
mt2712-resets.h | ||
mt7621-reset.h | ||
mt7622-reset.h | ||
mt7629-resets.h | ||
mt7986-resets.h | ||
mt8135-resets.h | ||
mt8173-resets.h | ||
mt8183-resets.h | ||
mt8186-resets.h | ||
mt8188-resets.h | ||
mt8192-resets.h | ||
mt8195-resets.h | ||
nuvoton,ma35d1-reset.h | ||
nuvoton,npcm7xx-reset.h | ||
oxsemi,ox810se.h | ||
oxsemi,ox820.h | ||
pistachio-resets.h | ||
qcom,gcc-apq8084.h | ||
qcom,gcc-ipq806x.h | ||
qcom,gcc-ipq5018.h | ||
qcom,gcc-ipq6018.h | ||
qcom,gcc-mdm9615.h | ||
qcom,gcc-msm8660.h | ||
qcom,gcc-msm8916.h | ||
qcom,gcc-msm8939.h | ||
qcom,gcc-msm8960.h | ||
qcom,gcc-msm8974.h | ||
qcom,ipq9574-gcc.h | ||
qcom,mmcc-apq8084.h | ||
qcom,mmcc-msm8960.h | ||
qcom,mmcc-msm8974.h | ||
qcom,sdm845-aoss.h | ||
qcom,sdm845-pdc.h | ||
qcom,sm8350-videocc.h | ||
qcom,sm8450-gpucc.h | ||
qcom,sm8650-gpucc.h | ||
raspberrypi,firmware-reset.h | ||
realtek,rtd1195.h | ||
realtek,rtd1295.h | ||
rockchip,rk3588-cru.h | ||
sama7g5-reset.h | ||
snps,hsdk-reset.h | ||
st,stm32mp25-rcc.h | ||
starfive-jh7100.h | ||
starfive,jh7110-crg.h | ||
stericsson,db8500-prcc-reset.h | ||
stih407-resets.h | ||
stm32mp1-resets.h | ||
stm32mp13-resets.h | ||
sun4i-a10-ccu.h | ||
sun5i-ccu.h | ||
sun6i-a31-ccu.h | ||
sun8i-a23-a33-ccu.h | ||
sun8i-a83t-ccu.h | ||
sun8i-de2.h | ||
sun8i-h3-ccu.h | ||
sun8i-r40-ccu.h | ||
sun8i-r-ccu.h | ||
sun8i-v3s-ccu.h | ||
sun9i-a80-ccu.h | ||
sun9i-a80-de.h | ||
sun9i-a80-usb.h | ||
sun20i-d1-ccu.h | ||
sun20i-d1-r-ccu.h | ||
sun50i-a64-ccu.h | ||
sun50i-a100-ccu.h | ||
sun50i-a100-r-ccu.h | ||
sun50i-h6-ccu.h | ||
sun50i-h6-r-ccu.h | ||
sun50i-h616-ccu.h | ||
suniv-ccu-f1c100s.h | ||
sunplus,sp7021-reset.h | ||
tegra124-car.h | ||
tegra186-reset.h | ||
tegra194-reset.h | ||
tegra210-car.h | ||
tegra234-reset.h | ||
ti-syscon.h | ||
toshiba,tmpv770x.h | ||
xlnx-versal-resets.h | ||
xlnx-zynqmp-resets.h |