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176bb179f1
The cs35l32 can only support single register read and write operations so does not benefit from block writes. This means it gets no benefit from using the rbtree register cache over the maple tree register cache so convert it to use maple trees instead, it is more modern. Acked-by: David Rhodes <david.rhodes@cirrus.com> Signed-off-by: Mark Brown <broonie@kernel.org> Link: https://lore.kernel.org/r/20230609-asoc-cirrus-maple-v1-1-b806c4cbd1d4@kernel.org Signed-off-by: Mark Brown <broonie@kernel.org>
584 lines
15 KiB
C
584 lines
15 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* cs35l32.c -- CS35L32 ALSA SoC audio driver
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*
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* Copyright 2014 CirrusLogic, Inc.
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*
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* Author: Brian Austin <brian.austin@cirrus.com>
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*/
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#include <linux/module.h>
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#include <linux/moduleparam.h>
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/delay.h>
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#include <linux/i2c.h>
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#include <linux/gpio.h>
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#include <linux/regmap.h>
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#include <linux/slab.h>
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#include <linux/platform_device.h>
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#include <linux/regulator/consumer.h>
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#include <linux/gpio/consumer.h>
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#include <linux/of_device.h>
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#include <sound/core.h>
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#include <sound/pcm.h>
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#include <sound/pcm_params.h>
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#include <sound/soc.h>
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#include <sound/soc-dapm.h>
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#include <sound/initval.h>
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#include <sound/tlv.h>
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#include <dt-bindings/sound/cs35l32.h>
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#include "cs35l32.h"
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#include "cirrus_legacy.h"
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#define CS35L32_NUM_SUPPLIES 2
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static const char *const cs35l32_supply_names[CS35L32_NUM_SUPPLIES] = {
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"VA",
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"VP",
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};
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struct cs35l32_private {
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struct regmap *regmap;
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struct snd_soc_component *component;
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struct regulator_bulk_data supplies[CS35L32_NUM_SUPPLIES];
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struct cs35l32_platform_data pdata;
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struct gpio_desc *reset_gpio;
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};
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static const struct reg_default cs35l32_reg_defaults[] = {
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{ 0x06, 0x04 }, /* Power Ctl 1 */
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{ 0x07, 0xE8 }, /* Power Ctl 2 */
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{ 0x08, 0x40 }, /* Clock Ctl */
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{ 0x09, 0x20 }, /* Low Battery Threshold */
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{ 0x0A, 0x00 }, /* Voltage Monitor [RO] */
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{ 0x0B, 0x40 }, /* Conv Peak Curr Protection CTL */
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{ 0x0C, 0x07 }, /* IMON Scaling */
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{ 0x0D, 0x03 }, /* Audio/LED Pwr Manager */
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{ 0x0F, 0x20 }, /* Serial Port Control */
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{ 0x10, 0x14 }, /* Class D Amp CTL */
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{ 0x11, 0x00 }, /* Protection Release CTL */
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{ 0x12, 0xFF }, /* Interrupt Mask 1 */
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{ 0x13, 0xFF }, /* Interrupt Mask 2 */
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{ 0x14, 0xFF }, /* Interrupt Mask 3 */
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{ 0x19, 0x00 }, /* LED Flash Mode Current */
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{ 0x1A, 0x00 }, /* LED Movie Mode Current */
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{ 0x1B, 0x20 }, /* LED Flash Timer */
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{ 0x1C, 0x00 }, /* LED Flash Inhibit Current */
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};
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static bool cs35l32_readable_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case CS35L32_DEVID_AB ... CS35L32_AUDIO_LED_MNGR:
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case CS35L32_ADSP_CTL ... CS35L32_FLASH_INHIBIT:
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return true;
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default:
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return false;
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}
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}
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static bool cs35l32_volatile_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case CS35L32_DEVID_AB ... CS35L32_REV_ID:
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case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
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return true;
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default:
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return false;
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}
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}
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static bool cs35l32_precious_register(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case CS35L32_INT_STATUS_1 ... CS35L32_LED_STATUS:
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return true;
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default:
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return false;
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}
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}
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static DECLARE_TLV_DB_SCALE(classd_ctl_tlv, 900, 300, 0);
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static const struct snd_kcontrol_new imon_ctl =
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SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 6, 1, 1);
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static const struct snd_kcontrol_new vmon_ctl =
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SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 7, 1, 1);
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static const struct snd_kcontrol_new vpmon_ctl =
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SOC_DAPM_SINGLE("Switch", CS35L32_PWRCTL2, 5, 1, 1);
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static const struct snd_kcontrol_new cs35l32_snd_controls[] = {
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SOC_SINGLE_TLV("Speaker Volume", CS35L32_CLASSD_CTL,
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3, 0x04, 1, classd_ctl_tlv),
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SOC_SINGLE("Zero Cross Switch", CS35L32_CLASSD_CTL, 2, 1, 0),
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SOC_SINGLE("Gain Manager Switch", CS35L32_AUDIO_LED_MNGR, 3, 1, 0),
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};
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static const struct snd_soc_dapm_widget cs35l32_dapm_widgets[] = {
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SND_SOC_DAPM_SUPPLY("BOOST", CS35L32_PWRCTL1, 2, 1, NULL, 0),
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SND_SOC_DAPM_OUT_DRV("Speaker", CS35L32_PWRCTL1, 7, 1, NULL, 0),
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SND_SOC_DAPM_AIF_OUT("SDOUT", NULL, 0, CS35L32_PWRCTL2, 3, 1),
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SND_SOC_DAPM_INPUT("VP"),
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SND_SOC_DAPM_INPUT("ISENSE"),
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SND_SOC_DAPM_INPUT("VSENSE"),
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SND_SOC_DAPM_SWITCH("VMON ADC", CS35L32_PWRCTL2, 7, 1, &vmon_ctl),
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SND_SOC_DAPM_SWITCH("IMON ADC", CS35L32_PWRCTL2, 6, 1, &imon_ctl),
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SND_SOC_DAPM_SWITCH("VPMON ADC", CS35L32_PWRCTL2, 5, 1, &vpmon_ctl),
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};
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static const struct snd_soc_dapm_route cs35l32_audio_map[] = {
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{"Speaker", NULL, "BOOST"},
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{"VMON ADC", NULL, "VSENSE"},
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{"IMON ADC", NULL, "ISENSE"},
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{"VPMON ADC", NULL, "VP"},
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{"SDOUT", "Switch", "VMON ADC"},
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{"SDOUT", "Switch", "IMON ADC"},
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{"SDOUT", "Switch", "VPMON ADC"},
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{"Capture", NULL, "SDOUT"},
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};
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static int cs35l32_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt)
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{
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struct snd_soc_component *component = codec_dai->component;
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switch (fmt & SND_SOC_DAIFMT_MASTER_MASK) {
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case SND_SOC_DAIFMT_CBM_CFM:
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snd_soc_component_update_bits(component, CS35L32_ADSP_CTL,
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CS35L32_ADSP_MASTER_MASK,
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CS35L32_ADSP_MASTER_MASK);
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break;
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case SND_SOC_DAIFMT_CBS_CFS:
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snd_soc_component_update_bits(component, CS35L32_ADSP_CTL,
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CS35L32_ADSP_MASTER_MASK, 0);
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break;
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default:
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return -EINVAL;
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}
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return 0;
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}
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static int cs35l32_set_tristate(struct snd_soc_dai *dai, int tristate)
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{
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struct snd_soc_component *component = dai->component;
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return snd_soc_component_update_bits(component, CS35L32_PWRCTL2,
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CS35L32_SDOUT_3ST, tristate << 3);
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}
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static const struct snd_soc_dai_ops cs35l32_ops = {
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.set_fmt = cs35l32_set_dai_fmt,
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.set_tristate = cs35l32_set_tristate,
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};
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static struct snd_soc_dai_driver cs35l32_dai[] = {
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{
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.name = "cs35l32-monitor",
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.id = 0,
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.capture = {
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.stream_name = "Capture",
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.channels_min = 2,
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.channels_max = 2,
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.rates = CS35L32_RATES,
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.formats = CS35L32_FORMATS,
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},
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.ops = &cs35l32_ops,
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.symmetric_rate = 1,
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}
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};
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static int cs35l32_component_set_sysclk(struct snd_soc_component *component,
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int clk_id, int source, unsigned int freq, int dir)
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{
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unsigned int val;
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switch (freq) {
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case 6000000:
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val = CS35L32_MCLK_RATIO;
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break;
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case 12000000:
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val = CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO;
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break;
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case 6144000:
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val = 0;
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break;
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case 12288000:
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val = CS35L32_MCLK_DIV2_MASK;
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break;
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default:
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return -EINVAL;
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}
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return snd_soc_component_update_bits(component, CS35L32_CLK_CTL,
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CS35L32_MCLK_DIV2_MASK | CS35L32_MCLK_RATIO_MASK, val);
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}
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static const struct snd_soc_component_driver soc_component_dev_cs35l32 = {
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.set_sysclk = cs35l32_component_set_sysclk,
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.controls = cs35l32_snd_controls,
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.num_controls = ARRAY_SIZE(cs35l32_snd_controls),
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.dapm_widgets = cs35l32_dapm_widgets,
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.num_dapm_widgets = ARRAY_SIZE(cs35l32_dapm_widgets),
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.dapm_routes = cs35l32_audio_map,
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.num_dapm_routes = ARRAY_SIZE(cs35l32_audio_map),
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.idle_bias_on = 1,
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.use_pmdown_time = 1,
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.endianness = 1,
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};
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/* Current and threshold powerup sequence Pg37 in datasheet */
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static const struct reg_sequence cs35l32_monitor_patch[] = {
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{ 0x00, 0x99 },
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{ 0x48, 0x17 },
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{ 0x49, 0x56 },
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{ 0x43, 0x01 },
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{ 0x3B, 0x62 },
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{ 0x3C, 0x80 },
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{ 0x00, 0x00 },
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};
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static const struct regmap_config cs35l32_regmap = {
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = CS35L32_MAX_REGISTER,
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.reg_defaults = cs35l32_reg_defaults,
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.num_reg_defaults = ARRAY_SIZE(cs35l32_reg_defaults),
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.volatile_reg = cs35l32_volatile_register,
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.readable_reg = cs35l32_readable_register,
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.precious_reg = cs35l32_precious_register,
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.cache_type = REGCACHE_MAPLE,
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.use_single_read = true,
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.use_single_write = true,
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};
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static int cs35l32_handle_of_data(struct i2c_client *i2c_client,
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struct cs35l32_platform_data *pdata)
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{
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struct device_node *np = i2c_client->dev.of_node;
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unsigned int val;
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if (of_property_read_u32(np, "cirrus,sdout-share", &val) >= 0)
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pdata->sdout_share = val;
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if (of_property_read_u32(np, "cirrus,boost-manager", &val))
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val = -1u;
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switch (val) {
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case CS35L32_BOOST_MGR_AUTO:
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case CS35L32_BOOST_MGR_AUTO_AUDIO:
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case CS35L32_BOOST_MGR_BYPASS:
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case CS35L32_BOOST_MGR_FIXED:
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pdata->boost_mng = val;
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break;
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case -1u:
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default:
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dev_err(&i2c_client->dev,
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"Wrong cirrus,boost-manager DT value %d\n", val);
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pdata->boost_mng = CS35L32_BOOST_MGR_BYPASS;
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}
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if (of_property_read_u32(np, "cirrus,sdout-datacfg", &val))
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val = -1u;
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switch (val) {
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case CS35L32_DATA_CFG_LR_VP:
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case CS35L32_DATA_CFG_LR_STAT:
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case CS35L32_DATA_CFG_LR:
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case CS35L32_DATA_CFG_LR_VPSTAT:
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pdata->sdout_datacfg = val;
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break;
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case -1u:
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default:
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dev_err(&i2c_client->dev,
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"Wrong cirrus,sdout-datacfg DT value %d\n", val);
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pdata->sdout_datacfg = CS35L32_DATA_CFG_LR;
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}
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if (of_property_read_u32(np, "cirrus,battery-threshold", &val))
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val = -1u;
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switch (val) {
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case CS35L32_BATT_THRESH_3_1V:
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case CS35L32_BATT_THRESH_3_2V:
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case CS35L32_BATT_THRESH_3_3V:
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case CS35L32_BATT_THRESH_3_4V:
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pdata->batt_thresh = val;
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break;
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case -1u:
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default:
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dev_err(&i2c_client->dev,
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"Wrong cirrus,battery-threshold DT value %d\n", val);
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pdata->batt_thresh = CS35L32_BATT_THRESH_3_3V;
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}
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if (of_property_read_u32(np, "cirrus,battery-recovery", &val))
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val = -1u;
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switch (val) {
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case CS35L32_BATT_RECOV_3_1V:
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case CS35L32_BATT_RECOV_3_2V:
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case CS35L32_BATT_RECOV_3_3V:
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case CS35L32_BATT_RECOV_3_4V:
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case CS35L32_BATT_RECOV_3_5V:
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case CS35L32_BATT_RECOV_3_6V:
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pdata->batt_recov = val;
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break;
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case -1u:
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default:
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dev_err(&i2c_client->dev,
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"Wrong cirrus,battery-recovery DT value %d\n", val);
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pdata->batt_recov = CS35L32_BATT_RECOV_3_4V;
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}
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return 0;
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}
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static int cs35l32_i2c_probe(struct i2c_client *i2c_client)
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{
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struct cs35l32_private *cs35l32;
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struct cs35l32_platform_data *pdata =
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dev_get_platdata(&i2c_client->dev);
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int ret, i, devid;
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unsigned int reg;
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cs35l32 = devm_kzalloc(&i2c_client->dev, sizeof(*cs35l32), GFP_KERNEL);
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if (!cs35l32)
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return -ENOMEM;
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i2c_set_clientdata(i2c_client, cs35l32);
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cs35l32->regmap = devm_regmap_init_i2c(i2c_client, &cs35l32_regmap);
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if (IS_ERR(cs35l32->regmap)) {
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ret = PTR_ERR(cs35l32->regmap);
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dev_err(&i2c_client->dev, "regmap_init() failed: %d\n", ret);
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return ret;
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}
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if (pdata) {
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cs35l32->pdata = *pdata;
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} else {
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pdata = devm_kzalloc(&i2c_client->dev, sizeof(*pdata),
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GFP_KERNEL);
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if (!pdata)
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return -ENOMEM;
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if (i2c_client->dev.of_node) {
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ret = cs35l32_handle_of_data(i2c_client,
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&cs35l32->pdata);
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if (ret != 0)
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return ret;
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}
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}
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for (i = 0; i < ARRAY_SIZE(cs35l32->supplies); i++)
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cs35l32->supplies[i].supply = cs35l32_supply_names[i];
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ret = devm_regulator_bulk_get(&i2c_client->dev,
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ARRAY_SIZE(cs35l32->supplies),
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cs35l32->supplies);
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if (ret != 0) {
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dev_err(&i2c_client->dev,
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"Failed to request supplies: %d\n", ret);
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return ret;
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}
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ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
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cs35l32->supplies);
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if (ret != 0) {
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dev_err(&i2c_client->dev,
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"Failed to enable supplies: %d\n", ret);
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return ret;
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}
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/* Reset the Device */
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cs35l32->reset_gpio = devm_gpiod_get_optional(&i2c_client->dev,
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"reset", GPIOD_OUT_LOW);
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if (IS_ERR(cs35l32->reset_gpio)) {
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ret = PTR_ERR(cs35l32->reset_gpio);
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goto err_supplies;
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}
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gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
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/* initialize codec */
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devid = cirrus_read_device_id(cs35l32->regmap, CS35L32_DEVID_AB);
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if (devid < 0) {
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ret = devid;
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dev_err(&i2c_client->dev, "Failed to read device ID: %d\n", ret);
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goto err_disable;
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}
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if (devid != CS35L32_CHIP_ID) {
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ret = -ENODEV;
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dev_err(&i2c_client->dev,
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"CS35L32 Device ID (%X). Expected %X\n",
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devid, CS35L32_CHIP_ID);
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goto err_disable;
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}
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ret = regmap_read(cs35l32->regmap, CS35L32_REV_ID, ®);
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if (ret < 0) {
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dev_err(&i2c_client->dev, "Get Revision ID failed\n");
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goto err_disable;
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}
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ret = regmap_register_patch(cs35l32->regmap, cs35l32_monitor_patch,
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ARRAY_SIZE(cs35l32_monitor_patch));
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if (ret < 0) {
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dev_err(&i2c_client->dev, "Failed to apply errata patch\n");
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goto err_disable;
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}
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dev_info(&i2c_client->dev,
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"Cirrus Logic CS35L32, Revision: %02X\n", reg & 0xFF);
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/* Setup VBOOST Management */
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if (cs35l32->pdata.boost_mng)
|
|
regmap_update_bits(cs35l32->regmap, CS35L32_AUDIO_LED_MNGR,
|
|
CS35L32_BOOST_MASK,
|
|
cs35l32->pdata.boost_mng);
|
|
|
|
/* Setup ADSP Format Config */
|
|
if (cs35l32->pdata.sdout_share)
|
|
regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
|
|
CS35L32_ADSP_SHARE_MASK,
|
|
cs35l32->pdata.sdout_share << 3);
|
|
|
|
/* Setup ADSP Data Configuration */
|
|
if (cs35l32->pdata.sdout_datacfg)
|
|
regmap_update_bits(cs35l32->regmap, CS35L32_ADSP_CTL,
|
|
CS35L32_ADSP_DATACFG_MASK,
|
|
cs35l32->pdata.sdout_datacfg << 4);
|
|
|
|
/* Setup Low Battery Recovery */
|
|
if (cs35l32->pdata.batt_recov)
|
|
regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
|
|
CS35L32_BATT_REC_MASK,
|
|
cs35l32->pdata.batt_recov << 1);
|
|
|
|
/* Setup Low Battery Threshold */
|
|
if (cs35l32->pdata.batt_thresh)
|
|
regmap_update_bits(cs35l32->regmap, CS35L32_BATT_THRESHOLD,
|
|
CS35L32_BATT_THRESH_MASK,
|
|
cs35l32->pdata.batt_thresh << 4);
|
|
|
|
/* Power down the AMP */
|
|
regmap_update_bits(cs35l32->regmap, CS35L32_PWRCTL1, CS35L32_PDN_AMP,
|
|
CS35L32_PDN_AMP);
|
|
|
|
/* Clear MCLK Error Bit since we don't have the clock yet */
|
|
regmap_read(cs35l32->regmap, CS35L32_INT_STATUS_1, ®);
|
|
|
|
ret = devm_snd_soc_register_component(&i2c_client->dev,
|
|
&soc_component_dev_cs35l32, cs35l32_dai,
|
|
ARRAY_SIZE(cs35l32_dai));
|
|
if (ret < 0)
|
|
goto err_disable;
|
|
|
|
return 0;
|
|
|
|
err_disable:
|
|
gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
|
|
err_supplies:
|
|
regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
|
|
cs35l32->supplies);
|
|
return ret;
|
|
}
|
|
|
|
static void cs35l32_i2c_remove(struct i2c_client *i2c_client)
|
|
{
|
|
struct cs35l32_private *cs35l32 = i2c_get_clientdata(i2c_client);
|
|
|
|
/* Hold down reset */
|
|
gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
|
|
}
|
|
|
|
#ifdef CONFIG_PM
|
|
static int cs35l32_runtime_suspend(struct device *dev)
|
|
{
|
|
struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
|
|
|
|
regcache_cache_only(cs35l32->regmap, true);
|
|
regcache_mark_dirty(cs35l32->regmap);
|
|
|
|
/* Hold down reset */
|
|
gpiod_set_value_cansleep(cs35l32->reset_gpio, 0);
|
|
|
|
/* remove power */
|
|
regulator_bulk_disable(ARRAY_SIZE(cs35l32->supplies),
|
|
cs35l32->supplies);
|
|
|
|
return 0;
|
|
}
|
|
|
|
static int cs35l32_runtime_resume(struct device *dev)
|
|
{
|
|
struct cs35l32_private *cs35l32 = dev_get_drvdata(dev);
|
|
int ret;
|
|
|
|
/* Enable power */
|
|
ret = regulator_bulk_enable(ARRAY_SIZE(cs35l32->supplies),
|
|
cs35l32->supplies);
|
|
if (ret != 0) {
|
|
dev_err(dev, "Failed to enable supplies: %d\n",
|
|
ret);
|
|
return ret;
|
|
}
|
|
|
|
gpiod_set_value_cansleep(cs35l32->reset_gpio, 1);
|
|
|
|
regcache_cache_only(cs35l32->regmap, false);
|
|
regcache_sync(cs35l32->regmap);
|
|
|
|
return 0;
|
|
}
|
|
#endif
|
|
|
|
static const struct dev_pm_ops cs35l32_runtime_pm = {
|
|
SET_RUNTIME_PM_OPS(cs35l32_runtime_suspend, cs35l32_runtime_resume,
|
|
NULL)
|
|
};
|
|
|
|
static const struct of_device_id cs35l32_of_match[] = {
|
|
{ .compatible = "cirrus,cs35l32", },
|
|
{},
|
|
};
|
|
MODULE_DEVICE_TABLE(of, cs35l32_of_match);
|
|
|
|
|
|
static const struct i2c_device_id cs35l32_id[] = {
|
|
{"cs35l32", 0},
|
|
{}
|
|
};
|
|
|
|
MODULE_DEVICE_TABLE(i2c, cs35l32_id);
|
|
|
|
static struct i2c_driver cs35l32_i2c_driver = {
|
|
.driver = {
|
|
.name = "cs35l32",
|
|
.pm = &cs35l32_runtime_pm,
|
|
.of_match_table = cs35l32_of_match,
|
|
},
|
|
.id_table = cs35l32_id,
|
|
.probe = cs35l32_i2c_probe,
|
|
.remove = cs35l32_i2c_remove,
|
|
};
|
|
|
|
module_i2c_driver(cs35l32_i2c_driver);
|
|
|
|
MODULE_DESCRIPTION("ASoC CS35L32 driver");
|
|
MODULE_AUTHOR("Brian Austin, Cirrus Logic Inc, <brian.austin@cirrus.com>");
|
|
MODULE_LICENSE("GPL");
|