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e6999e7cca
Add support for Richtek RT6190 4-Switch BuckBoost controller. Signed-off-by: ChiYuan Huang <cy_huang@richtek.com> Link: https://lore.kernel.org/r/1667183334-16511-3-git-send-email-u0084500@gmail.com Signed-off-by: Mark Brown <broonie@kernel.org>
496 lines
12 KiB
C
496 lines
12 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2022 Richtek Technology Corp.
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*
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* Author: ChiYuan Huang <cy_huang@richtek.com>
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*
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*/
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#include <linux/bits.h>
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#include <linux/delay.h>
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#include <linux/gpio/consumer.h>
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#include <linux/i2c.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/mod_devicetable.h>
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#include <linux/module.h>
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#include <linux/pm_runtime.h>
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#include <linux/regmap.h>
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#include <linux/regulator/consumer.h>
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#include <linux/regulator/driver.h>
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#include <linux/regulator/of_regulator.h>
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#define RT6190_REG_VID 0x00
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#define RT6190_REG_OUTV 0x01
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#define RT6190_REG_OUTC 0x03
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#define RT6190_REG_SET1 0x0D
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#define RT6190_REG_SET2 0x0E
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#define RT6190_REG_SET4 0x10
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#define RT6190_REG_RATIO 0x11
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#define RT6190_REG_OUT_VOLT_L 0x12
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#define RT6190_REG_TEMP_H 0x1B
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#define RT6190_REG_STAT1 0x1C
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#define RT6190_REG_ALERT1 0x1E
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#define RT6190_REG_ALERT2 0x1F
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#define RT6190_REG_MASK2 0x21
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#define RT6190_REG_OCPEN 0x28
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#define RT6190_REG_SET5 0x29
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#define RT6190_REG_VBUSC_ADC 0x32
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#define RT6190_REG_BUSC_VOLT_L 0x33
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#define RT6190_REG_BUSC_VOLT_H 0x34
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#define RT6190_REG_STAT3 0x37
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#define RT6190_REG_ALERT3 0x38
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#define RT6190_REG_MASK3 0x39
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#define RT6190_ENPWM_MASK BIT(7)
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#define RT6190_ENDCHG_MASK BIT(4)
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#define RT6190_ALERT_OTPEVT BIT(6)
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#define RT6190_ALERT_UVPEVT BIT(5)
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#define RT6190_ALERT_OVPEVT BIT(4)
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#define RT6190_ENGCP_MASK BIT(1)
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#define RT6190_FCCM_MASK BIT(7)
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#define RICHTEK_VID 0x82
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#define RT6190_OUT_MIN_UV 3000000
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#define RT6190_OUT_MAX_UV 32000000
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#define RT6190_OUT_STEP_UV 20000
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#define RT6190_OUT_N_VOLT (RT6190_OUT_MAX_UV / RT6190_OUT_STEP_UV + 1)
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#define RT6190_OUTV_MINSEL 150
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#define RT6190_OUT_MIN_UA 306000
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#define RT6190_OUT_MAX_UA 12114000
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#define RT6190_OUT_STEP_UA 24000
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#define RT6190_OUTC_MINSEL 19
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#define RT6190_EN_TIME_US 500
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#define RT6190_PSM_MODE 0
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#define RT6190_FCCM_MODE 1
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struct rt6190_data {
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struct device *dev;
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struct regmap *regmap;
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struct gpio_desc *enable_gpio;
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unsigned int cached_alert_evt;
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};
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static int rt6190_out_set_voltage_sel(struct regulator_dev *rdev,
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unsigned int selector)
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{
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struct regmap *regmap = rdev_get_regmap(rdev);
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__le16 le_sel = cpu_to_le16(selector);
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return regmap_raw_write(regmap, RT6190_REG_OUTV, &le_sel,
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sizeof(le_sel));
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}
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static int rt6190_out_get_voltage_sel(struct regulator_dev *rdev)
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{
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struct regmap *regmap = rdev_get_regmap(rdev);
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__le16 le_sel;
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int ret;
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ret = regmap_raw_read(regmap, RT6190_REG_OUTV, &le_sel, sizeof(le_sel));
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return ret ?: le16_to_cpu(le_sel);
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}
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static int rt6190_out_enable(struct regulator_dev *rdev)
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{
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struct rt6190_data *data = rdev_get_drvdata(rdev);
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struct regmap *regmap = rdev_get_regmap(rdev);
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u8 out_cfg[4];
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int ret;
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pm_runtime_get_sync(data->dev);
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/*
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* From off to on, vout config will restore to IC default.
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* Read vout configs before enable, and restore them after enable
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*/
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ret = regmap_raw_read(regmap, RT6190_REG_OUTV, out_cfg,
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sizeof(out_cfg));
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if (ret)
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return ret;
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ret = regulator_enable_regmap(rdev);
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if (ret)
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return ret;
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ret = regmap_raw_write(regmap, RT6190_REG_OUTV, out_cfg,
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sizeof(out_cfg));
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if (ret)
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return ret;
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return regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK,
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RT6190_ENGCP_MASK);
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}
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static int rt6190_out_disable(struct regulator_dev *rdev)
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{
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struct rt6190_data *data = rdev_get_drvdata(rdev);
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struct regmap *regmap = rdev_get_regmap(rdev);
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int ret;
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ret = regmap_update_bits(regmap, RT6190_REG_SET5, RT6190_ENGCP_MASK, 0);
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if (ret)
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return ret;
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ret = regulator_disable_regmap(rdev);
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if (ret)
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return ret;
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/* cleared cached alert event */
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data->cached_alert_evt = 0;
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pm_runtime_put(data->dev);
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return 0;
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}
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static int rt6190_out_set_current_limit(struct regulator_dev *rdev, int min_uA,
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int max_uA)
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{
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struct regmap *regmap = rdev_get_regmap(rdev);
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int csel, clim;
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__le16 le_csel;
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if (min_uA < RT6190_OUT_MIN_UA || max_uA > RT6190_OUT_MAX_UA)
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return -EINVAL;
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csel = DIV_ROUND_UP(min_uA - RT6190_OUT_MIN_UA, RT6190_OUT_STEP_UA);
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clim = RT6190_OUT_MIN_UA + RT6190_OUT_STEP_UA * csel;
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if (clim > max_uA)
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return -EINVAL;
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csel += RT6190_OUTC_MINSEL;
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le_csel = cpu_to_le16(csel);
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return regmap_raw_write(regmap, RT6190_REG_OUTC, &le_csel,
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sizeof(le_csel));
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}
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static int rt6190_out_get_current_limit(struct regulator_dev *rdev)
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{
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struct regmap *regmap = rdev_get_regmap(rdev);
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__le16 le_csel;
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int csel, ret;
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ret = regmap_raw_read(regmap, RT6190_REG_OUTC, &le_csel,
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sizeof(le_csel));
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if (ret)
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return ret;
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csel = le16_to_cpu(le_csel);
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csel -= RT6190_OUTC_MINSEL;
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return RT6190_OUT_MIN_UA + RT6190_OUT_STEP_UA * csel;
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}
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static int rt6190_out_set_mode(struct regulator_dev *rdev, unsigned int mode)
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{
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struct regmap *regmap = rdev_get_regmap(rdev);
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unsigned int val;
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switch (mode) {
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case REGULATOR_MODE_FAST:
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val = RT6190_FCCM_MASK;
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break;
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case REGULATOR_MODE_NORMAL:
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val = 0;
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break;
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default:
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return -EINVAL;
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}
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return regmap_update_bits(regmap, RT6190_REG_SET1, RT6190_FCCM_MASK,
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val);
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}
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static unsigned int rt6190_out_get_mode(struct regulator_dev *rdev)
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{
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struct regmap *regmap = rdev_get_regmap(rdev);
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unsigned int config;
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int ret;
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ret = regmap_read(regmap, RT6190_REG_SET1, &config);
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if (ret)
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return REGULATOR_MODE_INVALID;
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if (config & RT6190_FCCM_MASK)
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return REGULATOR_MODE_FAST;
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return REGULATOR_MODE_NORMAL;
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}
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static int rt6190_out_get_error_flags(struct regulator_dev *rdev,
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unsigned int *flags)
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{
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struct rt6190_data *data = rdev_get_drvdata(rdev);
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unsigned int state, rpt_flags = 0;
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int ret;
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ret = regmap_read(data->regmap, RT6190_REG_STAT1, &state);
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if (ret)
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return ret;
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state |= data->cached_alert_evt;
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if (state & RT6190_ALERT_OTPEVT)
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rpt_flags |= REGULATOR_ERROR_OVER_TEMP;
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if (state & RT6190_ALERT_UVPEVT)
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rpt_flags |= REGULATOR_ERROR_UNDER_VOLTAGE;
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if (state & RT6190_ALERT_OVPEVT)
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rpt_flags |= REGULATOR_ERROR_REGULATION_OUT;
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*flags = rpt_flags;
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return 0;
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}
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static unsigned int rt6190_out_of_map_mode(unsigned int mode)
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{
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switch (mode) {
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case RT6190_PSM_MODE:
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return REGULATOR_MODE_NORMAL;
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case RT6190_FCCM_MODE:
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return REGULATOR_MODE_FAST;
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default:
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return REGULATOR_MODE_INVALID;
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}
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}
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static const struct regulator_ops rt6190_regulator_ops = {
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.list_voltage = regulator_list_voltage_linear,
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.set_voltage_sel = rt6190_out_set_voltage_sel,
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.get_voltage_sel = rt6190_out_get_voltage_sel,
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.enable = rt6190_out_enable,
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.disable = rt6190_out_disable,
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.is_enabled = regulator_is_enabled_regmap,
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.set_current_limit = rt6190_out_set_current_limit,
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.get_current_limit = rt6190_out_get_current_limit,
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.set_active_discharge = regulator_set_active_discharge_regmap,
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.set_mode = rt6190_out_set_mode,
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.get_mode = rt6190_out_get_mode,
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.get_error_flags = rt6190_out_get_error_flags,
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};
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static const struct regulator_desc rt6190_regulator_desc = {
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.name = "rt6190-regulator",
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.type = REGULATOR_VOLTAGE,
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.owner = THIS_MODULE,
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.ops = &rt6190_regulator_ops,
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.min_uV = RT6190_OUT_MIN_UV,
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.uV_step = RT6190_OUT_STEP_UV,
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.n_voltages = RT6190_OUT_N_VOLT,
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.linear_min_sel = RT6190_OUTV_MINSEL,
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.enable_reg = RT6190_REG_SET2,
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.enable_mask = RT6190_ENPWM_MASK,
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.active_discharge_reg = RT6190_REG_SET2,
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.active_discharge_mask = RT6190_ENDCHG_MASK,
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.active_discharge_on = RT6190_ENDCHG_MASK,
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.of_map_mode = rt6190_out_of_map_mode,
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};
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static bool rt6190_is_volatile_reg(struct device *dev, unsigned int reg)
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{
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switch (reg) {
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case RT6190_REG_OUT_VOLT_L ... RT6190_REG_ALERT2:
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case RT6190_REG_BUSC_VOLT_L ... RT6190_REG_BUSC_VOLT_H:
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case RT6190_REG_STAT3 ... RT6190_REG_ALERT3:
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return true;
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default:
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return false;
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}
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}
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static const struct regmap_config rt6190_regmap_config = {
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.name = "rt6190",
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.cache_type = REGCACHE_FLAT,
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.reg_bits = 8,
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.val_bits = 8,
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.max_register = RT6190_REG_MASK3,
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.num_reg_defaults_raw = RT6190_REG_MASK3 + 1,
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.volatile_reg = rt6190_is_volatile_reg,
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};
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static irqreturn_t rt6190_irq_handler(int irq, void *devid)
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{
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struct regulator_dev *rdev = devid;
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struct rt6190_data *data = rdev_get_drvdata(rdev);
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unsigned int alert;
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int ret;
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ret = regmap_read(data->regmap, RT6190_REG_ALERT1, &alert);
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if (ret)
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return IRQ_NONE;
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/* Write clear alert events */
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ret = regmap_write(data->regmap, RT6190_REG_ALERT1, alert);
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if (ret)
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return IRQ_NONE;
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data->cached_alert_evt |= alert;
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if (alert & RT6190_ALERT_OTPEVT)
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regulator_notifier_call_chain(rdev, REGULATOR_EVENT_OVER_TEMP, NULL);
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if (alert & RT6190_ALERT_UVPEVT)
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regulator_notifier_call_chain(rdev, REGULATOR_EVENT_UNDER_VOLTAGE, NULL);
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if (alert & RT6190_ALERT_OVPEVT)
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regulator_notifier_call_chain(rdev, REGULATOR_EVENT_REGULATION_OUT, NULL);
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return IRQ_HANDLED;
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}
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static int rt6190_init_registers(struct regmap *regmap)
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{
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int ret;
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/* Enable_ADC = 1 */
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ret = regmap_write(regmap, RT6190_REG_SET4, 0x82);
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if (ret)
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return ret;
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/* Config default VOUT ratio to be higher */
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ret = regmap_write(regmap, RT6190_REG_RATIO, 0x20);
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/* Mask unused alert */
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ret = regmap_write(regmap, RT6190_REG_MASK2, 0);
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if (ret)
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return ret;
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/* OCP config */
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ret = regmap_write(regmap, RT6190_REG_OCPEN, 0);
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if (ret)
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return ret;
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/* Enable VBUSC ADC */
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return regmap_write(regmap, RT6190_REG_VBUSC_ADC, 0x02);
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}
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static int rt6190_probe(struct i2c_client *i2c)
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{
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struct device *dev = &i2c->dev;
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struct rt6190_data *data;
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struct gpio_desc *enable_gpio;
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struct regmap *regmap;
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struct regulator_dev *rdev;
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struct regulator_config cfg = {};
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unsigned int vid;
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int ret;
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data = devm_kzalloc(dev, sizeof(*data), GFP_KERNEL);
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if (!data)
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return -ENOMEM;
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enable_gpio = devm_gpiod_get_optional(dev, "enable", GPIOD_OUT_HIGH);
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if (IS_ERR(enable_gpio))
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return dev_err_probe(dev, PTR_ERR(enable_gpio), "Failed to get 'enable' gpio\n");
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else if (enable_gpio)
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usleep_range(RT6190_EN_TIME_US, RT6190_EN_TIME_US * 2);
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regmap = devm_regmap_init_i2c(i2c, &rt6190_regmap_config);
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if (IS_ERR(regmap))
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return dev_err_probe(dev, PTR_ERR(regmap), "Failed to init regmap\n");
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data->dev = dev;
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data->enable_gpio = enable_gpio;
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data->regmap = regmap;
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i2c_set_clientdata(i2c, data);
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ret = regmap_read(regmap, RT6190_REG_VID, &vid);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to read VID\n");
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if (vid != RICHTEK_VID)
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return dev_err_probe(dev, -ENODEV, "Incorrect VID 0x%02x\n", vid);
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ret = rt6190_init_registers(regmap);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to init registers\n");
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pm_runtime_set_active(dev);
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ret = devm_pm_runtime_enable(dev);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to set pm_runtime enable\n");
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cfg.dev = dev;
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cfg.of_node = dev->of_node;
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cfg.driver_data = data;
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cfg.init_data = of_get_regulator_init_data(dev, dev->of_node,
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&rt6190_regulator_desc);
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rdev = devm_regulator_register(dev, &rt6190_regulator_desc, &cfg);
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if (IS_ERR(rdev))
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return dev_err_probe(dev, PTR_ERR(rdev), "Failed to register regulator\n");
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if (i2c->irq) {
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ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
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rt6190_irq_handler,
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IRQF_ONESHOT, dev_name(dev),
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rdev);
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if (ret)
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return dev_err_probe(dev, ret, "Failed to register interrupt\n");
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}
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return 0;
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}
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static int rt6190_runtime_suspend(struct device *dev)
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{
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struct rt6190_data *data = dev_get_drvdata(dev);
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struct regmap *regmap = data->regmap;
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if (!data->enable_gpio)
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return 0;
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regcache_cache_only(regmap, true);
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regcache_mark_dirty(regmap);
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gpiod_set_value(data->enable_gpio, 0);
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return 0;
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}
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static int rt6190_runtime_resume(struct device *dev)
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{
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struct rt6190_data *data = dev_get_drvdata(dev);
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struct regmap *regmap = data->regmap;
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if (!data->enable_gpio)
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return 0;
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gpiod_set_value(data->enable_gpio, 1);
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usleep_range(RT6190_EN_TIME_US, RT6190_EN_TIME_US * 2);
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regcache_cache_only(regmap, false);
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return regcache_sync(regmap);
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}
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static const struct dev_pm_ops __maybe_unused rt6190_dev_pm = {
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RUNTIME_PM_OPS(rt6190_runtime_suspend, rt6190_runtime_resume, NULL)
|
|
};
|
|
|
|
static const struct of_device_id rt6190_of_dev_table[] = {
|
|
{ .compatible = "richtek,rt6190" },
|
|
{}
|
|
};
|
|
MODULE_DEVICE_TABLE(of, rt6190_of_dev_table);
|
|
|
|
static struct i2c_driver rt6190_driver = {
|
|
.driver = {
|
|
.name = "rt6190",
|
|
.of_match_table = rt6190_of_dev_table,
|
|
.pm = pm_ptr(&rt6190_dev_pm),
|
|
},
|
|
.probe_new = rt6190_probe,
|
|
};
|
|
module_i2c_driver(rt6190_driver);
|
|
|
|
MODULE_DESCRIPTION("Richtek RT6190 regulator driver");
|
|
MODULE_AUTHOR("ChiYuan Huang <cy_huang@richtek.com>");
|
|
MODULE_LICENSE("GPL");
|