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a47b44fbb1
tegra-bpmp clocks driver makes implicit conversion of signed error
code to unsigned value in recalc_rate operation. The behavior for
recalc_rate, according to it's specification, should be that "If the
driver cannot figure out a rate for this clock, it must return 0."
Fixes: ca6f2796ee
("clk: tegra: Add BPMP clock driver")
Signed-off-by: Timo Alho <talho@nvidia.com>
Signed-off-by: Mikko Perttunen <mperttunen@nvidia.com>
Link: https://lore.kernel.org/r/20230912112951.2330497-1-cyndis@kapsi.fi
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
706 lines
16 KiB
C
706 lines
16 KiB
C
// SPDX-License-Identifier: GPL-2.0-only
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/*
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* Copyright (C) 2016-2022 NVIDIA Corporation
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*/
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#include <linux/clk-provider.h>
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#include <linux/device.h>
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#include <linux/seq_buf.h>
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#include <linux/slab.h>
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#include <soc/tegra/bpmp.h>
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#include <soc/tegra/bpmp-abi.h>
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#define TEGRA_BPMP_DUMP_CLOCK_INFO 0
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#define TEGRA_BPMP_CLK_HAS_MUX BIT(0)
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#define TEGRA_BPMP_CLK_HAS_SET_RATE BIT(1)
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#define TEGRA_BPMP_CLK_IS_ROOT BIT(2)
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struct tegra_bpmp_clk_info {
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unsigned int id;
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char name[MRQ_CLK_NAME_MAXLEN];
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unsigned int parents[MRQ_CLK_MAX_PARENTS];
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unsigned int num_parents;
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unsigned long flags;
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};
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struct tegra_bpmp_clk {
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struct clk_hw hw;
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struct tegra_bpmp *bpmp;
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unsigned int id;
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unsigned int num_parents;
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unsigned int *parents;
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};
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static inline struct tegra_bpmp_clk *to_tegra_bpmp_clk(struct clk_hw *hw)
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{
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return container_of(hw, struct tegra_bpmp_clk, hw);
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}
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struct tegra_bpmp_clk_message {
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unsigned int cmd;
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unsigned int id;
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struct {
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const void *data;
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size_t size;
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} tx;
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struct {
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void *data;
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size_t size;
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int ret;
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} rx;
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};
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static int tegra_bpmp_clk_transfer(struct tegra_bpmp *bpmp,
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const struct tegra_bpmp_clk_message *clk)
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{
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struct mrq_clk_request request;
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struct tegra_bpmp_message msg;
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void *req = &request;
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int err;
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memset(&request, 0, sizeof(request));
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request.cmd_and_id = (clk->cmd << 24) | clk->id;
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/*
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* The mrq_clk_request structure has an anonymous union at offset 4
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* that contains all possible sub-command structures. Copy the data
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* to that union. Ideally we'd be able to refer to it by name, but
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* doing so would require changing the ABI header and increase the
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* maintenance burden.
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*/
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memcpy(req + 4, clk->tx.data, clk->tx.size);
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memset(&msg, 0, sizeof(msg));
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msg.mrq = MRQ_CLK;
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msg.tx.data = &request;
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msg.tx.size = sizeof(request);
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msg.rx.data = clk->rx.data;
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msg.rx.size = clk->rx.size;
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err = tegra_bpmp_transfer(bpmp, &msg);
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if (err < 0)
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return err;
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else if (msg.rx.ret < 0)
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return -EINVAL;
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return 0;
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}
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static int tegra_bpmp_clk_prepare(struct clk_hw *hw)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct tegra_bpmp_clk_message msg;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_ENABLE;
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msg.id = clk->id;
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return tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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}
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static void tegra_bpmp_clk_unprepare(struct clk_hw *hw)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct tegra_bpmp_clk_message msg;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_DISABLE;
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msg.id = clk->id;
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err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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if (err < 0)
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dev_err(clk->bpmp->dev, "failed to disable clock %s: %d\n",
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clk_hw_get_name(hw), err);
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}
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static int tegra_bpmp_clk_is_prepared(struct clk_hw *hw)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct cmd_clk_is_enabled_response response;
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struct tegra_bpmp_clk_message msg;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_IS_ENABLED;
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msg.id = clk->id;
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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if (err < 0)
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return err;
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return response.state;
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}
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static unsigned long tegra_bpmp_clk_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct cmd_clk_get_rate_response response;
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struct cmd_clk_get_rate_request request;
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struct tegra_bpmp_clk_message msg;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_GET_RATE;
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msg.id = clk->id;
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msg.tx.data = &request;
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msg.tx.size = sizeof(request);
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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if (err < 0)
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return 0;
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return response.rate;
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}
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static int tegra_bpmp_clk_determine_rate(struct clk_hw *hw,
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struct clk_rate_request *rate_req)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct cmd_clk_round_rate_response response;
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struct cmd_clk_round_rate_request request;
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struct tegra_bpmp_clk_message msg;
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unsigned long rate;
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int err;
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rate = min(max(rate_req->rate, rate_req->min_rate), rate_req->max_rate);
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memset(&request, 0, sizeof(request));
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request.rate = min_t(u64, rate, S64_MAX);
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_ROUND_RATE;
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msg.id = clk->id;
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msg.tx.data = &request;
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msg.tx.size = sizeof(request);
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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if (err < 0)
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return err;
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rate_req->rate = (unsigned long)response.rate;
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return 0;
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}
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static int tegra_bpmp_clk_set_parent(struct clk_hw *hw, u8 index)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct cmd_clk_set_parent_response response;
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struct cmd_clk_set_parent_request request;
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struct tegra_bpmp_clk_message msg;
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int err;
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memset(&request, 0, sizeof(request));
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request.parent_id = clk->parents[index];
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_SET_PARENT;
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msg.id = clk->id;
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msg.tx.data = &request;
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msg.tx.size = sizeof(request);
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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if (err < 0)
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return err;
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/* XXX check parent ID in response */
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return 0;
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}
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static u8 tegra_bpmp_clk_get_parent(struct clk_hw *hw)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct cmd_clk_get_parent_response response;
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struct tegra_bpmp_clk_message msg;
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unsigned int i;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_GET_PARENT;
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msg.id = clk->id;
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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if (err < 0) {
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dev_err(clk->bpmp->dev, "failed to get parent for %s: %d\n",
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clk_hw_get_name(hw), err);
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return U8_MAX;
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}
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for (i = 0; i < clk->num_parents; i++)
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if (clk->parents[i] == response.parent_id)
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return i;
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return U8_MAX;
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}
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static int tegra_bpmp_clk_set_rate(struct clk_hw *hw, unsigned long rate,
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unsigned long parent_rate)
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{
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struct tegra_bpmp_clk *clk = to_tegra_bpmp_clk(hw);
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struct cmd_clk_set_rate_response response;
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struct cmd_clk_set_rate_request request;
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struct tegra_bpmp_clk_message msg;
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memset(&request, 0, sizeof(request));
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request.rate = min_t(u64, rate, S64_MAX);
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_SET_RATE;
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msg.id = clk->id;
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msg.tx.data = &request;
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msg.tx.size = sizeof(request);
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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return tegra_bpmp_clk_transfer(clk->bpmp, &msg);
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}
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static const struct clk_ops tegra_bpmp_clk_gate_ops = {
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.prepare = tegra_bpmp_clk_prepare,
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.unprepare = tegra_bpmp_clk_unprepare,
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.is_prepared = tegra_bpmp_clk_is_prepared,
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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};
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static const struct clk_ops tegra_bpmp_clk_mux_ops = {
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.prepare = tegra_bpmp_clk_prepare,
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.unprepare = tegra_bpmp_clk_unprepare,
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.is_prepared = tegra_bpmp_clk_is_prepared,
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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.determine_rate = clk_hw_determine_rate_no_reparent,
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.set_parent = tegra_bpmp_clk_set_parent,
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.get_parent = tegra_bpmp_clk_get_parent,
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};
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static const struct clk_ops tegra_bpmp_clk_rate_ops = {
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.prepare = tegra_bpmp_clk_prepare,
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.unprepare = tegra_bpmp_clk_unprepare,
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.is_prepared = tegra_bpmp_clk_is_prepared,
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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.determine_rate = tegra_bpmp_clk_determine_rate,
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.set_rate = tegra_bpmp_clk_set_rate,
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};
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static const struct clk_ops tegra_bpmp_clk_mux_rate_ops = {
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.prepare = tegra_bpmp_clk_prepare,
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.unprepare = tegra_bpmp_clk_unprepare,
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.is_prepared = tegra_bpmp_clk_is_prepared,
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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.determine_rate = tegra_bpmp_clk_determine_rate,
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.set_parent = tegra_bpmp_clk_set_parent,
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.get_parent = tegra_bpmp_clk_get_parent,
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.set_rate = tegra_bpmp_clk_set_rate,
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};
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static const struct clk_ops tegra_bpmp_clk_mux_read_only_ops = {
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.get_parent = tegra_bpmp_clk_get_parent,
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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};
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static const struct clk_ops tegra_bpmp_clk_read_only_ops = {
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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};
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static const struct clk_ops tegra_bpmp_clk_gate_mux_read_only_ops = {
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.prepare = tegra_bpmp_clk_prepare,
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.unprepare = tegra_bpmp_clk_unprepare,
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.is_prepared = tegra_bpmp_clk_is_prepared,
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.recalc_rate = tegra_bpmp_clk_recalc_rate,
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.get_parent = tegra_bpmp_clk_get_parent,
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};
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static int tegra_bpmp_clk_get_max_id(struct tegra_bpmp *bpmp)
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{
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struct cmd_clk_get_max_clk_id_response response;
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struct tegra_bpmp_clk_message msg;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_GET_MAX_CLK_ID;
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(bpmp, &msg);
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if (err < 0)
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return err;
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if (response.max_id > INT_MAX)
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return -E2BIG;
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return response.max_id;
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}
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static int tegra_bpmp_clk_get_info(struct tegra_bpmp *bpmp, unsigned int id,
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struct tegra_bpmp_clk_info *info)
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{
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struct cmd_clk_get_all_info_response response;
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struct tegra_bpmp_clk_message msg;
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unsigned int i;
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int err;
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memset(&msg, 0, sizeof(msg));
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msg.cmd = CMD_CLK_GET_ALL_INFO;
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msg.id = id;
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msg.rx.data = &response;
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msg.rx.size = sizeof(response);
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err = tegra_bpmp_clk_transfer(bpmp, &msg);
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if (err < 0)
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return err;
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strscpy(info->name, response.name, MRQ_CLK_NAME_MAXLEN);
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info->num_parents = response.num_parents;
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for (i = 0; i < info->num_parents; i++)
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info->parents[i] = response.parents[i];
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info->flags = response.flags;
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return 0;
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}
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static void tegra_bpmp_clk_info_dump(struct tegra_bpmp *bpmp,
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const char *level,
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const struct tegra_bpmp_clk_info *info)
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{
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const char *prefix = "";
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struct seq_buf buf;
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unsigned int i;
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char flags[64];
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seq_buf_init(&buf, flags, sizeof(flags));
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if (info->flags)
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seq_buf_printf(&buf, "(");
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if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) {
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seq_buf_printf(&buf, "%smux", prefix);
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prefix = ", ";
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}
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if ((info->flags & TEGRA_BPMP_CLK_HAS_SET_RATE) == 0) {
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seq_buf_printf(&buf, "%sfixed", prefix);
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prefix = ", ";
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}
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if (info->flags & TEGRA_BPMP_CLK_IS_ROOT) {
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seq_buf_printf(&buf, "%sroot", prefix);
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prefix = ", ";
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}
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if (info->flags)
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seq_buf_printf(&buf, ")");
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dev_printk(level, bpmp->dev, "%03u: %s\n", info->id, info->name);
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dev_printk(level, bpmp->dev, " flags: %lx %s\n", info->flags, flags);
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dev_printk(level, bpmp->dev, " parents: %u\n", info->num_parents);
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for (i = 0; i < info->num_parents; i++)
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dev_printk(level, bpmp->dev, " %03u\n", info->parents[i]);
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}
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static int tegra_bpmp_probe_clocks(struct tegra_bpmp *bpmp,
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struct tegra_bpmp_clk_info **clocksp)
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{
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struct tegra_bpmp_clk_info *clocks;
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unsigned int max_id, id, count = 0;
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unsigned int holes = 0;
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int err;
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err = tegra_bpmp_clk_get_max_id(bpmp);
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if (err < 0)
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return err;
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max_id = err;
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dev_dbg(bpmp->dev, "maximum clock ID: %u\n", max_id);
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clocks = kcalloc(max_id + 1, sizeof(*clocks), GFP_KERNEL);
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if (!clocks)
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return -ENOMEM;
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for (id = 0; id <= max_id; id++) {
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struct tegra_bpmp_clk_info *info = &clocks[count];
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err = tegra_bpmp_clk_get_info(bpmp, id, info);
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if (err < 0)
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continue;
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if (info->num_parents >= U8_MAX) {
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dev_err(bpmp->dev,
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"clock %u has too many parents (%u, max: %u)\n",
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id, info->num_parents, U8_MAX);
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continue;
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}
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/* clock not exposed by BPMP */
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if (info->name[0] == '\0') {
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holes++;
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continue;
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}
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info->id = id;
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count++;
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if (TEGRA_BPMP_DUMP_CLOCK_INFO)
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tegra_bpmp_clk_info_dump(bpmp, KERN_DEBUG, info);
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}
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dev_dbg(bpmp->dev, "holes: %u\n", holes);
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*clocksp = clocks;
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return count;
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}
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static unsigned int
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tegra_bpmp_clk_id_to_index(const struct tegra_bpmp_clk_info *clocks,
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unsigned int num_clocks, unsigned int id)
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{
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unsigned int i;
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for (i = 0; i < num_clocks; i++)
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if (clocks[i].id == id)
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return i;
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return UINT_MAX;
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}
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static const struct tegra_bpmp_clk_info *
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tegra_bpmp_clk_find(const struct tegra_bpmp_clk_info *clocks,
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unsigned int num_clocks, unsigned int id)
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{
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unsigned int i;
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i = tegra_bpmp_clk_id_to_index(clocks, num_clocks, id);
|
|
|
|
if (i < num_clocks)
|
|
return &clocks[i];
|
|
|
|
return NULL;
|
|
}
|
|
|
|
static struct tegra_bpmp_clk *
|
|
tegra_bpmp_clk_register(struct tegra_bpmp *bpmp,
|
|
const struct tegra_bpmp_clk_info *info,
|
|
const struct tegra_bpmp_clk_info *clocks,
|
|
unsigned int num_clocks)
|
|
{
|
|
struct tegra_bpmp_clk *clk;
|
|
struct clk_init_data init;
|
|
const char **parents;
|
|
unsigned int i;
|
|
int err;
|
|
|
|
clk = devm_kzalloc(bpmp->dev, sizeof(*clk), GFP_KERNEL);
|
|
if (!clk)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
clk->id = info->id;
|
|
clk->bpmp = bpmp;
|
|
|
|
clk->parents = devm_kcalloc(bpmp->dev, info->num_parents,
|
|
sizeof(*clk->parents), GFP_KERNEL);
|
|
if (!clk->parents)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
clk->num_parents = info->num_parents;
|
|
|
|
/* hardware clock initialization */
|
|
memset(&init, 0, sizeof(init));
|
|
init.name = info->name;
|
|
clk->hw.init = &init;
|
|
if (info->flags & BPMP_CLK_STATE_CHANGE_DENIED) {
|
|
if ((info->flags & BPMP_CLK_RATE_PARENT_CHANGE_DENIED) == 0) {
|
|
dev_WARN(bpmp->dev,
|
|
"Firmware bug! Inconsistent permission bits for clock %s. State and parent/rate changes disabled.",
|
|
init.name);
|
|
}
|
|
if (info->flags & TEGRA_BPMP_CLK_HAS_MUX)
|
|
init.ops = &tegra_bpmp_clk_mux_read_only_ops;
|
|
else
|
|
init.ops = &tegra_bpmp_clk_read_only_ops;
|
|
} else if (info->flags & BPMP_CLK_RATE_PARENT_CHANGE_DENIED) {
|
|
if (info->flags & TEGRA_BPMP_CLK_HAS_MUX)
|
|
init.ops = &tegra_bpmp_clk_gate_mux_read_only_ops;
|
|
else
|
|
init.ops = &tegra_bpmp_clk_gate_ops;
|
|
} else if (info->flags & TEGRA_BPMP_CLK_HAS_MUX) {
|
|
if (info->flags & TEGRA_BPMP_CLK_HAS_SET_RATE)
|
|
init.ops = &tegra_bpmp_clk_mux_rate_ops;
|
|
else
|
|
init.ops = &tegra_bpmp_clk_mux_ops;
|
|
} else {
|
|
if (info->flags & TEGRA_BPMP_CLK_HAS_SET_RATE)
|
|
init.ops = &tegra_bpmp_clk_rate_ops;
|
|
else
|
|
init.ops = &tegra_bpmp_clk_gate_ops;
|
|
}
|
|
|
|
init.num_parents = info->num_parents;
|
|
|
|
parents = kcalloc(info->num_parents, sizeof(*parents), GFP_KERNEL);
|
|
if (!parents)
|
|
return ERR_PTR(-ENOMEM);
|
|
|
|
for (i = 0; i < info->num_parents; i++) {
|
|
const struct tegra_bpmp_clk_info *parent;
|
|
|
|
/* keep a private copy of the ID to parent index map */
|
|
clk->parents[i] = info->parents[i];
|
|
|
|
parent = tegra_bpmp_clk_find(clocks, num_clocks,
|
|
info->parents[i]);
|
|
if (!parent) {
|
|
dev_err(bpmp->dev, "no parent %u found for %u\n",
|
|
info->parents[i], info->id);
|
|
continue;
|
|
}
|
|
|
|
parents[i] = parent->name;
|
|
}
|
|
|
|
init.parent_names = parents;
|
|
|
|
err = devm_clk_hw_register(bpmp->dev, &clk->hw);
|
|
|
|
kfree(parents);
|
|
|
|
if (err < 0)
|
|
return ERR_PTR(err);
|
|
|
|
return clk;
|
|
}
|
|
|
|
static void tegra_bpmp_register_clocks_one(struct tegra_bpmp *bpmp,
|
|
struct tegra_bpmp_clk_info *infos,
|
|
unsigned int i,
|
|
unsigned int count)
|
|
{
|
|
unsigned int j;
|
|
struct tegra_bpmp_clk_info *info;
|
|
struct tegra_bpmp_clk *clk;
|
|
|
|
if (bpmp->clocks[i]) {
|
|
/* already registered */
|
|
return;
|
|
}
|
|
|
|
info = &infos[i];
|
|
for (j = 0; j < info->num_parents; ++j) {
|
|
unsigned int p_id = info->parents[j];
|
|
unsigned int p_i = tegra_bpmp_clk_id_to_index(infos, count,
|
|
p_id);
|
|
if (p_i < count)
|
|
tegra_bpmp_register_clocks_one(bpmp, infos, p_i, count);
|
|
}
|
|
|
|
clk = tegra_bpmp_clk_register(bpmp, info, infos, count);
|
|
if (IS_ERR(clk)) {
|
|
dev_err(bpmp->dev,
|
|
"failed to register clock %u (%s): %ld\n",
|
|
info->id, info->name, PTR_ERR(clk));
|
|
/* intentionally store the error pointer to
|
|
* bpmp->clocks[i] to avoid re-attempting the
|
|
* registration later
|
|
*/
|
|
}
|
|
|
|
bpmp->clocks[i] = clk;
|
|
}
|
|
|
|
static int tegra_bpmp_register_clocks(struct tegra_bpmp *bpmp,
|
|
struct tegra_bpmp_clk_info *infos,
|
|
unsigned int count)
|
|
{
|
|
unsigned int i;
|
|
|
|
bpmp->num_clocks = count;
|
|
|
|
bpmp->clocks = devm_kcalloc(bpmp->dev, count, sizeof(struct tegra_bpmp_clk), GFP_KERNEL);
|
|
if (!bpmp->clocks)
|
|
return -ENOMEM;
|
|
|
|
for (i = 0; i < count; i++) {
|
|
tegra_bpmp_register_clocks_one(bpmp, infos, i, count);
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
static void tegra_bpmp_unregister_clocks(struct tegra_bpmp *bpmp)
|
|
{
|
|
unsigned int i;
|
|
|
|
for (i = 0; i < bpmp->num_clocks; i++)
|
|
clk_hw_unregister(&bpmp->clocks[i]->hw);
|
|
}
|
|
|
|
static struct clk_hw *tegra_bpmp_clk_of_xlate(struct of_phandle_args *clkspec,
|
|
void *data)
|
|
{
|
|
unsigned int id = clkspec->args[0], i;
|
|
struct tegra_bpmp *bpmp = data;
|
|
|
|
for (i = 0; i < bpmp->num_clocks; i++) {
|
|
struct tegra_bpmp_clk *clk = bpmp->clocks[i];
|
|
|
|
if (!clk)
|
|
continue;
|
|
|
|
if (clk->id == id)
|
|
return &clk->hw;
|
|
}
|
|
|
|
return NULL;
|
|
}
|
|
|
|
int tegra_bpmp_init_clocks(struct tegra_bpmp *bpmp)
|
|
{
|
|
struct tegra_bpmp_clk_info *clocks;
|
|
unsigned int count;
|
|
int err;
|
|
|
|
err = tegra_bpmp_probe_clocks(bpmp, &clocks);
|
|
if (err < 0)
|
|
return err;
|
|
|
|
count = err;
|
|
|
|
dev_dbg(bpmp->dev, "%u clocks probed\n", count);
|
|
|
|
err = tegra_bpmp_register_clocks(bpmp, clocks, count);
|
|
if (err < 0)
|
|
goto free;
|
|
|
|
err = of_clk_add_hw_provider(bpmp->dev->of_node,
|
|
tegra_bpmp_clk_of_xlate,
|
|
bpmp);
|
|
if (err < 0) {
|
|
tegra_bpmp_unregister_clocks(bpmp);
|
|
goto free;
|
|
}
|
|
|
|
free:
|
|
kfree(clocks);
|
|
return err;
|
|
}
|