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24bb7a6efc
This patch adds panel_reverse variable to support reversed s6e8ax0 panel type. Signed-off-by: Donghwa Lee <dh09.lee@samsung.com> Signed-off-by: Inki Dae <inki.dae@samsung.com> Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Florian Tobias Schandinat <FlorianSchandinat@gmx.de>
361 lines
12 KiB
C
361 lines
12 KiB
C
/* include/video/exynos_mipi_dsim.h
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*
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* Platform data header for Samsung SoC MIPI-DSIM.
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*
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* Copyright (c) 2012 Samsung Electronics Co., Ltd
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*
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* InKi Dae <inki.dae@samsung.com>
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* Donghwa Lee <dh09.lee@samsung.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _EXYNOS_MIPI_DSIM_H
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#define _EXYNOS_MIPI_DSIM_H
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#include <linux/device.h>
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#include <linux/fb.h>
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#define PANEL_NAME_SIZE (32)
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/*
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* Enumerate display interface type.
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*
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* DSIM_COMMAND means cpu interface and rgb interface for DSIM_VIDEO.
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*
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* P.S. MIPI DSI Master has two display controller intefaces, RGB Interface
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* for main display and CPU Interface(same as I80 Interface) for main
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* and sub display.
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*/
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enum mipi_dsim_interface_type {
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DSIM_COMMAND,
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DSIM_VIDEO
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};
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enum mipi_dsim_virtual_ch_no {
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DSIM_VIRTUAL_CH_0,
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DSIM_VIRTUAL_CH_1,
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DSIM_VIRTUAL_CH_2,
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DSIM_VIRTUAL_CH_3
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};
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enum mipi_dsim_burst_mode_type {
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DSIM_NON_BURST_SYNC_EVENT,
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DSIM_BURST_SYNC_EVENT,
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DSIM_NON_BURST_SYNC_PULSE,
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DSIM_BURST,
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DSIM_NON_VIDEO_MODE
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};
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enum mipi_dsim_no_of_data_lane {
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DSIM_DATA_LANE_1,
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DSIM_DATA_LANE_2,
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DSIM_DATA_LANE_3,
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DSIM_DATA_LANE_4
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};
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enum mipi_dsim_byte_clk_src {
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DSIM_PLL_OUT_DIV8,
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DSIM_EXT_CLK_DIV8,
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DSIM_EXT_CLK_BYPASS
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};
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enum mipi_dsim_pixel_format {
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DSIM_CMD_3BPP,
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DSIM_CMD_8BPP,
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DSIM_CMD_12BPP,
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DSIM_CMD_16BPP,
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DSIM_VID_16BPP_565,
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DSIM_VID_18BPP_666PACKED,
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DSIM_18BPP_666LOOSELYPACKED,
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DSIM_24BPP_888
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};
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/*
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* struct mipi_dsim_config - interface for configuring mipi-dsi controller.
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*
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* @auto_flush: enable or disable Auto flush of MD FIFO using VSYNC pulse.
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* @eot_disable: enable or disable EoT packet in HS mode.
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* @auto_vertical_cnt: specifies auto vertical count mode.
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* in Video mode, the vertical line transition uses line counter
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* configured by VSA, VBP, and Vertical resolution.
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* If this bit is set to '1', the line counter does not use VSA and VBP
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* registers.(in command mode, this variable is ignored)
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* @hse: set horizontal sync event mode.
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* In VSYNC pulse and Vporch area, MIPI DSI master transfers only HSYNC
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* start packet to MIPI DSI slave at MIPI DSI spec1.1r02.
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* this bit transfers HSYNC end packet in VSYNC pulse and Vporch area
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* (in mommand mode, this variable is ignored)
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* @hfp: specifies HFP disable mode.
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* if this variable is set, DSI master ignores HFP area in VIDEO mode.
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* (in command mode, this variable is ignored)
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* @hbp: specifies HBP disable mode.
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* if this variable is set, DSI master ignores HBP area in VIDEO mode.
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* (in command mode, this variable is ignored)
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* @hsa: specifies HSA disable mode.
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* if this variable is set, DSI master ignores HSA area in VIDEO mode.
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* (in command mode, this variable is ignored)
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* @cma_allow: specifies the number of horizontal lines, where command packet
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* transmission is allowed after Stable VFP period.
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* @e_interface: specifies interface to be used.(CPU or RGB interface)
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* @e_virtual_ch: specifies virtual channel number that main or
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* sub diaplsy uses.
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* @e_pixel_format: specifies pixel stream format for main or sub display.
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* @e_burst_mode: selects Burst mode in Video mode.
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* in Non-burst mode, RGB data area is filled with RGB data and NULL
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* packets, according to input bandwidth of RGB interface.
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* In Burst mode, RGB data area is filled with RGB data only.
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* @e_no_data_lane: specifies data lane count to be used by Master.
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* @e_byte_clk: select byte clock source. (it must be DSIM_PLL_OUT_DIV8)
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* DSIM_EXT_CLK_DIV8 and DSIM_EXT_CLK_BYPASSS are not supported.
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* @pll_stable_time: specifies the PLL Timer for stability of the ganerated
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* clock(System clock cycle base)
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* if the timer value goes to 0x00000000, the clock stable bit of status
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* and interrupt register is set.
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* @esc_clk: specifies escape clock frequency for getting the escape clock
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* prescaler value.
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* @stop_holding_cnt: specifies the interval value between transmitting
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* read packet(or write "set_tear_on" command) and BTA request.
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* after transmitting read packet or write "set_tear_on" command,
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* BTA requests to D-PHY automatically. this counter value specifies
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* the interval between them.
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* @bta_timeout: specifies the timer for BTA.
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* this register specifies time out from BTA request to change
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* the direction with respect to Tx escape clock.
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* @rx_timeout: specifies the timer for LP Rx mode timeout.
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* this register specifies time out on how long RxValid deasserts,
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* after RxLpdt asserts with respect to Tx escape clock.
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* - RxValid specifies Rx data valid indicator.
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* - RxLpdt specifies an indicator that D-PHY is under RxLpdt mode.
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* - RxValid and RxLpdt specifies signal from D-PHY.
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*/
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struct mipi_dsim_config {
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unsigned char auto_flush;
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unsigned char eot_disable;
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unsigned char auto_vertical_cnt;
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unsigned char hse;
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unsigned char hfp;
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unsigned char hbp;
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unsigned char hsa;
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unsigned char cmd_allow;
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enum mipi_dsim_interface_type e_interface;
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enum mipi_dsim_virtual_ch_no e_virtual_ch;
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enum mipi_dsim_pixel_format e_pixel_format;
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enum mipi_dsim_burst_mode_type e_burst_mode;
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enum mipi_dsim_no_of_data_lane e_no_data_lane;
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enum mipi_dsim_byte_clk_src e_byte_clk;
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/*
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* ===========================================
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* | P | M | S | MHz |
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* -------------------------------------------
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* | 3 | 100 | 3 | 100 |
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* | 3 | 100 | 2 | 200 |
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* | 3 | 63 | 1 | 252 |
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* | 4 | 100 | 1 | 300 |
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* | 4 | 110 | 1 | 330 |
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* | 12 | 350 | 1 | 350 |
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* | 3 | 100 | 1 | 400 |
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* | 4 | 150 | 1 | 450 |
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* | 6 | 118 | 1 | 472 |
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* | 3 | 120 | 1 | 480 |
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* | 12 | 250 | 0 | 500 |
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* | 4 | 100 | 0 | 600 |
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* | 3 | 81 | 0 | 648 |
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* | 3 | 88 | 0 | 704 |
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* | 3 | 90 | 0 | 720 |
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* | 3 | 100 | 0 | 800 |
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* | 12 | 425 | 0 | 850 |
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* | 4 | 150 | 0 | 900 |
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* | 12 | 475 | 0 | 950 |
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* | 6 | 250 | 0 | 1000 |
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* -------------------------------------------
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*/
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/*
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* pms could be calculated as the following.
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* M * 24 / P * 2 ^ S = MHz
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*/
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unsigned char p;
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unsigned short m;
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unsigned char s;
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unsigned int pll_stable_time;
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unsigned long esc_clk;
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unsigned short stop_holding_cnt;
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unsigned char bta_timeout;
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unsigned short rx_timeout;
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};
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/*
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* struct mipi_dsim_device - global interface for mipi-dsi driver.
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*
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* @dev: driver model representation of the device.
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* @id: unique device id.
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* @clock: pointer to MIPI-DSI clock of clock framework.
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* @irq: interrupt number to MIPI-DSI controller.
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* @reg_base: base address to memory mapped SRF of MIPI-DSI controller.
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* (virtual address)
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* @lock: the mutex protecting this data structure.
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* @dsim_info: infomation for configuring mipi-dsi controller.
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* @master_ops: callbacks to mipi-dsi operations.
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* @dsim_lcd_dev: pointer to activated ddi device.
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* (it would be registered by mipi-dsi driver.)
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* @dsim_lcd_drv: pointer to activated_ddi driver.
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* (it would be registered by mipi-dsi driver.)
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* @lcd_info: pointer to mipi_lcd_info structure.
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* @state: specifies status of MIPI-DSI controller.
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* the status could be RESET, INIT, STOP, HSCLKEN and ULPS.
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* @data_lane: specifiec enabled data lane number.
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* this variable would be set by driver according to e_no_data_lane
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* automatically.
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* @e_clk_src: select byte clock source.
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* @pd: pointer to MIPI-DSI driver platform data.
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*/
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struct mipi_dsim_device {
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struct device *dev;
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int id;
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struct resource *res;
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struct clk *clock;
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unsigned int irq;
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void __iomem *reg_base;
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struct mutex lock;
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struct mipi_dsim_config *dsim_config;
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struct mipi_dsim_master_ops *master_ops;
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struct mipi_dsim_lcd_device *dsim_lcd_dev;
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struct mipi_dsim_lcd_driver *dsim_lcd_drv;
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unsigned int state;
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unsigned int data_lane;
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unsigned int e_clk_src;
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bool suspended;
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struct mipi_dsim_platform_data *pd;
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};
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/*
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* struct mipi_dsim_platform_data - interface to platform data
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* for mipi-dsi driver.
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*
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* @lcd_panel_name: specifies lcd panel name registered to mipi-dsi driver.
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* lcd panel driver searched would be actived.
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* @dsim_config: pointer of structure for configuring mipi-dsi controller.
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* @enabled: indicate whether mipi controller got enabled or not.
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* @lcd_panel_info: pointer for lcd panel specific structure.
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* this structure specifies width, height, timing and polarity and so on.
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* @phy_enable: pointer to a callback controlling D-PHY enable/reset
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*/
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struct mipi_dsim_platform_data {
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char lcd_panel_name[PANEL_NAME_SIZE];
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struct mipi_dsim_config *dsim_config;
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unsigned int enabled;
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void *lcd_panel_info;
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int (*phy_enable)(struct platform_device *pdev, bool on);
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};
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/*
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* struct mipi_dsim_master_ops - callbacks to mipi-dsi operations.
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*
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* @cmd_write: transfer command to lcd panel at LP mode.
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* @cmd_read: read command from rx register.
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* @get_dsim_frame_done: get the status that all screen data have been
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* transferred to mipi-dsi.
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* @clear_dsim_frame_done: clear frame done status.
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* @get_fb_frame_done: get frame done status of display controller.
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* @trigger: trigger display controller.
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* - this one would be used only in case of CPU mode.
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* @set_early_blank_mode: set framebuffer blank mode.
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* - this callback should be called prior to fb_blank() by a client driver
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* only if needing.
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* @set_blank_mode: set framebuffer blank mode.
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* - this callback should be called after fb_blank() by a client driver
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* only if needing.
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*/
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struct mipi_dsim_master_ops {
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int (*cmd_write)(struct mipi_dsim_device *dsim, unsigned int data_id,
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const unsigned char *data0, unsigned int data1);
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int (*cmd_read)(struct mipi_dsim_device *dsim, unsigned int data_id,
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unsigned int data0, unsigned int req_size, u8 *rx_buf);
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int (*get_dsim_frame_done)(struct mipi_dsim_device *dsim);
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int (*clear_dsim_frame_done)(struct mipi_dsim_device *dsim);
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int (*get_fb_frame_done)(struct fb_info *info);
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void (*trigger)(struct fb_info *info);
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int (*set_early_blank_mode)(struct mipi_dsim_device *dsim, int power);
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int (*set_blank_mode)(struct mipi_dsim_device *dsim, int power);
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};
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/*
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* device structure for mipi-dsi based lcd panel.
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*
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* @name: name of the device to use with this device, or an
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* alias for that name.
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* @dev: driver model representation of the device.
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* @id: id of device to be registered.
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* @bus_id: bus id for identifing connected bus
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* and this bus id should be same as id of mipi_dsim_device.
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* @irq: irq number for signaling when framebuffer transfer of
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* lcd panel module is completed.
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* this irq would be used only for MIPI-DSI based CPU mode lcd panel.
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* @master: pointer to mipi-dsi master device object.
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* @platform_data: lcd panel specific platform data.
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*/
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struct mipi_dsim_lcd_device {
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char *name;
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struct device dev;
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int id;
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int bus_id;
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int irq;
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int panel_reverse;
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struct mipi_dsim_device *master;
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void *platform_data;
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};
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/*
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* driver structure for mipi-dsi based lcd panel.
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*
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* this structure should be registered by lcd panel driver.
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* mipi-dsi driver seeks lcd panel registered through name field
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* and calls these callback functions in appropriate time.
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*
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* @name: name of the driver to use with this device, or an
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* alias for that name.
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* @id: id of driver to be registered.
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* this id would be used for finding device object registered.
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*/
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struct mipi_dsim_lcd_driver {
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char *name;
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int id;
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void (*power_on)(struct mipi_dsim_lcd_device *dsim_dev, int enable);
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void (*set_sequence)(struct mipi_dsim_lcd_device *dsim_dev);
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int (*probe)(struct mipi_dsim_lcd_device *dsim_dev);
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int (*remove)(struct mipi_dsim_lcd_device *dsim_dev);
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void (*shutdown)(struct mipi_dsim_lcd_device *dsim_dev);
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int (*suspend)(struct mipi_dsim_lcd_device *dsim_dev);
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int (*resume)(struct mipi_dsim_lcd_device *dsim_dev);
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};
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/*
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* register mipi_dsim_lcd_device to mipi-dsi master.
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*/
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int exynos_mipi_dsi_register_lcd_device(struct mipi_dsim_lcd_device
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*lcd_dev);
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/**
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* register mipi_dsim_lcd_driver object defined by lcd panel driver
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* to mipi-dsi driver.
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*/
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int exynos_mipi_dsi_register_lcd_driver(struct mipi_dsim_lcd_driver
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*lcd_drv);
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#endif /* _EXYNOS_MIPI_DSIM_H */
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