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f7c35abe93
Enable/disable the handling globally for now and print a warning when we enable it for the first time. v2: write to the correct register, adjust bits to that hw generation v3: fix compilation, add the missing register bit definitions Signed-off-by: Christian König <christian.koenig@amd.com> Reviewed-by: Nicolai Hähnle <nicolai.haehnle@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> |
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| .. | ||
| gmc_6_0_d.h | ||
| gmc_6_0_sh_mask.h | ||
| gmc_7_0_d.h | ||
| gmc_7_0_sh_mask.h | ||
| gmc_7_1_d.h | ||
| gmc_7_1_sh_mask.h | ||
| gmc_8_1_d.h | ||
| gmc_8_1_enum.h | ||
| gmc_8_1_sh_mask.h | ||
| gmc_8_2_d.h | ||
| gmc_8_2_enum.h | ||
| gmc_8_2_sh_mask.h | ||