korg/linux
0
0
Fork 0
mirror of https://mirrors.bfsu.edu.cn/git/linux.git synced 2024-11-11 12:28:41 +08:00
Code Issues Packages Projects Releases Wiki Activity
ce6106ffa9
linux/arch/x86/events
History
Dapeng Mi e8df9d9f42 perf/x86/intel: Correct incorrect 'or' operation for PMU capabilities 
When running perf-stat command on Intel hybrid platform, perf-stat
reports the following errors:

  sudo taskset -c 7 ./perf stat -vvvv -e cpu_atom/instructions/ sleep 1

  Opening: cpu/cycles/:HG
  ------------------------------------------------------------
  perf_event_attr:
    type                             0 (PERF_TYPE_HARDWARE)
    config                           0xa00000000
    disabled                         1
  ------------------------------------------------------------
  sys_perf_event_open: pid 0  cpu -1  group_fd -1  flags 0x8
  sys_perf_event_open failed, error -16

   Performance counter stats for 'sleep 1':

       <not counted>      cpu_atom/instructions/

It looks the cpu_atom/instructions/ event can't be enabled on atom PMU
even when the process is pinned on atom core. Investigation shows that
exclusive_event_init() helper always returns -EBUSY error in the perf
event creation. That's strange since the atom PMU should not be an
exclusive PMU.

Further investigation shows the issue was introduced by commit:

  97588df87b ("perf/x86/intel: Add common intel_pmu_init_hybrid()")

The commit originally intents to clear the bit PERF_PMU_CAP_AUX_OUTPUT
from PMU capabilities if intel_cap.pebs_output_pt_available is not set,
but it incorrectly uses 'or' operation and leads to all PMU capabilities
bits are set to 1 except bit PERF_PMU_CAP_AUX_OUTPUT.

Testing this fix on Intel hybrid platforms, the observed issues
disappear.

Fixes: 97588df87b ("perf/x86/intel: Add common intel_pmu_init_hybrid()")
Signed-off-by: Dapeng Mi <dapeng1.mi@linux.intel.com>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20231121014628.729989-1-dapeng1.mi@linux.intel.com
2023-11-21 13:44:36 +01:00
..
amd X86 core code updates: 2023-10-30 17:37:47 -10:00
intel perf/x86/intel: Correct incorrect 'or' operation for PMU capabilities 2023-11-21 13:44:36 +01:00
zhaoxin x86/perf/zhaoxin: Add stepping check for ZXC 2023-02-11 11:18:12 +01:00
core.c perf/x86/intel: Clean up the hybrid CPU type handling code 2023-08-29 20:59:23 +02:00
Kconfig perf/x86/Kconfig: Fix indentation in the Kconfig file 2022-05-25 15:54:26 +02:00
Makefile perf/x86: Move branch classifier 2022-08-27 00:05:44 +02:00
msr.c x86/cpu: Fix Gracemont uarch 2023-08-09 21:51:06 +02:00
perf_event_flags.h x86/perf: Assert all platform event flags are within PERF_EVENT_FLAG_ARCH 2022-09-07 21:54:01 +02:00
perf_event.h perf/x86/intel: Clean up the hybrid CPU type handling code 2023-08-29 20:59:23 +02:00
probe.c perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
probe.h perf/x86/rapl: Add msr mask support 2021-02-10 14:44:54 +01:00
rapl.c perf/x86/rapl: Annotate 'struct rapl_pmus' with __counted_by 2023-10-08 12:18:17 +02:00
utils.c perf/x86/lbr: Filter vsyscall addresses 2023-10-08 12:25:18 +02:00