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Some cards don't update the PISR properly when all SISR bits for Tx interrupts are being cleared and as a result we get interrupt storm. Since we handle all tx queues all together (so we don't really use the SISR bits to do per-queue interrupt handling), we can manualy update PISR by doing a write-to-clear on its Tx interrupt bits. Signed-off-by: Nick Kossifidis <mickflemm@gmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com> |
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ar5523 | ||
ath5k | ||
ath6kl | ||
ath9k | ||
ath10k | ||
carl9170 | ||
wcn36xx | ||
wil6210 | ||
ath.h | ||
debug.c | ||
dfs_pattern_detector.c | ||
dfs_pattern_detector.h | ||
dfs_pri_detector.c | ||
dfs_pri_detector.h | ||
hw.c | ||
Kconfig | ||
key.c | ||
main.c | ||
Makefile | ||
reg.h | ||
regd_common.h | ||
regd.c | ||
regd.h |