Krishna Yarlagadda c9fd37f926 dt-binding: serial: tegra: add new chips ... Add new compatible string for Tegra186. It differs from earlier chips as it has FIFO mode enable check and 8 byte DMA buffer. Add new compatible string for Tegra194. Tegra194 has different error tolerance levels for baud rate compared to older chips. Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/1567572187-29820-6-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		2019-09-05 10:00:04 +02:00
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bindings	dt-binding: serial: tegra: add new chips	2019-09-05 10:00:04 +02:00
booting-without-of.txt	docs: arm: convert docs to ReST and rename to *.rst	2019-07-15 09:20:24 -03:00
changesets.txt
dynamic-resolution-notes.txt
of_unittest.txt
overlay-notes.txt
usage-model.txt
writing-schema.md	dt-bindings: Update schema project location to devicetree.org github group	2019-05-01 14:27:58 -05:00