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885fe6932a
E810-T adapters have two external bidirectional SMA connectors and two internal unidirectional U.FL connectors. Multiplexing between U.FL and SMA and SMA direction is controlled using the PCA9575 expander. Add support for the PCA9575 detection and control of the respective pins of the SMA/U.FL multiplexer using the GPIO AQ API. Signed-off-by: Maciej Machnikowski <maciej.machnikowski@intel.com> Tested-by: Sunitha Mekala <sunithax.d.mekala@intel.com> Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
210 lines
8.1 KiB
C
210 lines
8.1 KiB
C
/* SPDX-License-Identifier: GPL-2.0 */
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/* Copyright (c) 2018, Intel Corporation. */
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#ifndef _ICE_COMMON_H_
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#define _ICE_COMMON_H_
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#include "ice.h"
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#include "ice_type.h"
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#include "ice_nvm.h"
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#include "ice_flex_pipe.h"
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#include "ice_switch.h"
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#include <linux/avf/virtchnl.h>
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#define ICE_SQ_SEND_DELAY_TIME_MS 10
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#define ICE_SQ_SEND_MAX_EXECUTE 3
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enum ice_status ice_init_hw(struct ice_hw *hw);
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void ice_deinit_hw(struct ice_hw *hw);
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enum ice_status ice_check_reset(struct ice_hw *hw);
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enum ice_status ice_reset(struct ice_hw *hw, enum ice_reset_req req);
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enum ice_status ice_create_all_ctrlq(struct ice_hw *hw);
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enum ice_status ice_init_all_ctrlq(struct ice_hw *hw);
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void ice_shutdown_all_ctrlq(struct ice_hw *hw);
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void ice_destroy_all_ctrlq(struct ice_hw *hw);
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enum ice_status
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ice_clean_rq_elem(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_rq_event_info *e, u16 *pending);
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enum ice_status
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ice_get_link_status(struct ice_port_info *pi, bool *link_up);
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enum ice_status ice_update_link_info(struct ice_port_info *pi);
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enum ice_status
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ice_acquire_res(struct ice_hw *hw, enum ice_aq_res_ids res,
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enum ice_aq_res_access_type access, u32 timeout);
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void ice_release_res(struct ice_hw *hw, enum ice_aq_res_ids res);
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enum ice_status
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ice_alloc_hw_res(struct ice_hw *hw, u16 type, u16 num, bool btm, u16 *res);
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enum ice_status
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ice_free_hw_res(struct ice_hw *hw, u16 type, u16 num, u16 *res);
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enum ice_status
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ice_aq_alloc_free_res(struct ice_hw *hw, u16 num_entries,
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struct ice_aqc_alloc_free_res_elem *buf, u16 buf_size,
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enum ice_adminq_opc opc, struct ice_sq_cd *cd);
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bool ice_is_sbq_supported(struct ice_hw *hw);
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struct ice_ctl_q_info *ice_get_sbq(struct ice_hw *hw);
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enum ice_status
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ice_sq_send_cmd(struct ice_hw *hw, struct ice_ctl_q_info *cq,
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struct ice_aq_desc *desc, void *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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void ice_clear_pxe_mode(struct ice_hw *hw);
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enum ice_status ice_get_caps(struct ice_hw *hw);
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void ice_set_safe_mode_caps(struct ice_hw *hw);
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enum ice_status
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ice_write_rxq_ctx(struct ice_hw *hw, struct ice_rlan_ctx *rlan_ctx,
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u32 rxq_index);
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enum ice_status
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ice_aq_get_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *get_params);
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enum ice_status
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ice_aq_set_rss_lut(struct ice_hw *hw, struct ice_aq_get_set_rss_lut_params *set_params);
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enum ice_status
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ice_aq_get_rss_key(struct ice_hw *hw, u16 vsi_handle,
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struct ice_aqc_get_set_rss_keys *keys);
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enum ice_status
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ice_aq_set_rss_key(struct ice_hw *hw, u16 vsi_handle,
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struct ice_aqc_get_set_rss_keys *keys);
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bool ice_check_sq_alive(struct ice_hw *hw, struct ice_ctl_q_info *cq);
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enum ice_status ice_aq_q_shutdown(struct ice_hw *hw, bool unloading);
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void ice_fill_dflt_direct_cmd_desc(struct ice_aq_desc *desc, u16 opcode);
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extern const struct ice_ctx_ele ice_tlan_ctx_info[];
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enum ice_status
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ice_set_ctx(struct ice_hw *hw, u8 *src_ctx, u8 *dest_ctx,
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const struct ice_ctx_ele *ce_info);
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extern struct mutex ice_global_cfg_lock_sw;
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enum ice_status
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ice_aq_send_cmd(struct ice_hw *hw, struct ice_aq_desc *desc,
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void *buf, u16 buf_size, struct ice_sq_cd *cd);
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enum ice_status ice_aq_get_fw_ver(struct ice_hw *hw, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_send_driver_ver(struct ice_hw *hw, struct ice_driver_ver *dv,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_get_phy_caps(struct ice_port_info *pi, bool qual_mods, u8 report_mode,
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struct ice_aqc_get_phy_caps_data *caps,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_list_caps(struct ice_hw *hw, void *buf, u16 buf_size, u32 *cap_count,
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enum ice_adminq_opc opc, struct ice_sq_cd *cd);
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enum ice_status
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ice_discover_dev_caps(struct ice_hw *hw, struct ice_hw_dev_caps *dev_caps);
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void
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ice_update_phy_type(u64 *phy_type_low, u64 *phy_type_high,
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u16 link_speeds_bitmap);
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enum ice_status
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ice_aq_manage_mac_write(struct ice_hw *hw, const u8 *mac_addr, u8 flags,
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struct ice_sq_cd *cd);
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bool ice_is_e810(struct ice_hw *hw);
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enum ice_status ice_clear_pf_cfg(struct ice_hw *hw);
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enum ice_status
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ice_aq_set_phy_cfg(struct ice_hw *hw, struct ice_port_info *pi,
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struct ice_aqc_set_phy_cfg_data *cfg, struct ice_sq_cd *cd);
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bool ice_fw_supports_link_override(struct ice_hw *hw);
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enum ice_status
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ice_get_link_default_override(struct ice_link_default_override_tlv *ldo,
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struct ice_port_info *pi);
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bool ice_is_phy_caps_an_enabled(struct ice_aqc_get_phy_caps_data *caps);
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enum ice_fc_mode ice_caps_to_fc_mode(u8 caps);
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enum ice_fec_mode ice_caps_to_fec_mode(u8 caps, u8 fec_options);
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enum ice_status
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ice_set_fc(struct ice_port_info *pi, u8 *aq_failures,
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bool ena_auto_link_update);
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enum ice_status
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ice_cfg_phy_fc(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
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enum ice_fc_mode fc);
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bool
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ice_phy_caps_equals_cfg(struct ice_aqc_get_phy_caps_data *caps,
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struct ice_aqc_set_phy_cfg_data *cfg);
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void
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ice_copy_phy_caps_to_cfg(struct ice_port_info *pi,
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struct ice_aqc_get_phy_caps_data *caps,
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struct ice_aqc_set_phy_cfg_data *cfg);
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enum ice_status
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ice_cfg_phy_fec(struct ice_port_info *pi, struct ice_aqc_set_phy_cfg_data *cfg,
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enum ice_fec_mode fec);
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enum ice_status
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ice_aq_set_link_restart_an(struct ice_port_info *pi, bool ena_link,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_set_mac_cfg(struct ice_hw *hw, u16 max_frame_size, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_get_link_info(struct ice_port_info *pi, bool ena_lse,
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struct ice_link_status *link, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_set_event_mask(struct ice_hw *hw, u8 port_num, u16 mask,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_set_mac_loopback(struct ice_hw *hw, bool ena_lpbk, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_set_port_id_led(struct ice_port_info *pi, bool is_orig_mode,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_sff_eeprom(struct ice_hw *hw, u16 lport, u8 bus_addr,
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u16 mem_addr, u8 page, u8 set_page, u8 *data, u8 length,
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bool write, struct ice_sq_cd *cd);
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int
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ice_cfg_vsi_rdma(struct ice_port_info *pi, u16 vsi_handle, u16 tc_bitmap,
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u16 *max_rdmaqs);
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int
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ice_ena_vsi_rdma_qset(struct ice_port_info *pi, u16 vsi_handle, u8 tc,
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u16 *rdma_qset, u16 num_qsets, u32 *qset_teid);
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int
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ice_dis_vsi_rdma_qset(struct ice_port_info *pi, u16 count, u32 *qset_teid,
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u16 *q_id);
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enum ice_status
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ice_dis_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u8 num_queues,
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u16 *q_handle, u16 *q_ids, u32 *q_teids,
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enum ice_disq_rst_src rst_src, u16 vmvf_num,
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struct ice_sq_cd *cd);
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enum ice_status
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ice_cfg_vsi_lan(struct ice_port_info *pi, u16 vsi_handle, u8 tc_bitmap,
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u16 *max_lanqs);
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enum ice_status
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ice_ena_vsi_txq(struct ice_port_info *pi, u16 vsi_handle, u8 tc, u16 q_handle,
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u8 num_qgrps, struct ice_aqc_add_tx_qgrp *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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enum ice_status ice_replay_vsi(struct ice_hw *hw, u16 vsi_handle);
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void ice_replay_post(struct ice_hw *hw);
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void ice_output_fw_log(struct ice_hw *hw, struct ice_aq_desc *desc, void *buf);
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struct ice_q_ctx *
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ice_get_lan_q_ctx(struct ice_hw *hw, u16 vsi_handle, u8 tc, u16 q_handle);
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int ice_sbq_rw_reg(struct ice_hw *hw, struct ice_sbq_msg_input *in);
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void
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ice_stat_update40(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
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u64 *prev_stat, u64 *cur_stat);
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void
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ice_stat_update32(struct ice_hw *hw, u32 reg, bool prev_stat_loaded,
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u64 *prev_stat, u64 *cur_stat);
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bool ice_is_e810t(struct ice_hw *hw);
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enum ice_status
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ice_sched_query_elem(struct ice_hw *hw, u32 node_teid,
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struct ice_aqc_txsched_elem_data *buf);
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int
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ice_aq_set_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
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u32 value, struct ice_sq_cd *cd);
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int
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ice_aq_get_driver_param(struct ice_hw *hw, enum ice_aqc_driver_params idx,
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u32 *value, struct ice_sq_cd *cd);
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int
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ice_aq_set_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx, bool value,
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struct ice_sq_cd *cd);
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int
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ice_aq_get_gpio(struct ice_hw *hw, u16 gpio_ctrl_handle, u8 pin_idx,
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bool *value, struct ice_sq_cd *cd);
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enum ice_status
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ice_aq_set_lldp_mib(struct ice_hw *hw, u8 mib_type, void *buf, u16 buf_size,
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struct ice_sq_cd *cd);
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bool ice_fw_supports_lldp_fltr_ctrl(struct ice_hw *hw);
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enum ice_status
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ice_lldp_fltr_add_remove(struct ice_hw *hw, u16 vsi_num, bool add);
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bool ice_fw_supports_report_dflt_cfg(struct ice_hw *hw);
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#endif /* _ICE_COMMON_H_ */
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